404 lines
8.1 KiB
C
404 lines
8.1 KiB
C
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/* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
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* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
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* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
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* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef N76E003_H
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#define N76E003_H
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#include <compiler.h>
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#define DEFINE_FIELD(reg, field, bit, len) \
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reg##_##field##_Pos = (bit), \
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reg##_##field##_Msk = (((1 << (len)) - 1) << (bit)),
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#define GET_FIELD(reg, field) \
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(((reg) & reg##_##field##_Msk) >> reg##_##field##_Pos)
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#define SET_FIELD(reg, field, val) \
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do { \
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(reg) = ((reg) & ~(reg##_##field##_Msk)) | \
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(((val) << (reg##_##field##_Pos)) & (reg##_##field##_Msk)); \
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} while(0)
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SFR(P0, 0x80);
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SFR(SP, 0x81);
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SFR(DPL, 0x82);
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SFR(DPH, 0x83);
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SFR(RCTRIM0, 0x84);
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SFR(RCTRIM1, 0x85);
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SFR(RWK, 0x86);
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SFR(PCON, 0x87);
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enum {
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DEFINE_FIELD(PCON, SMOD, 7, 1)
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DEFINE_FIELD(PCON, SMOD0, 6, 1)
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DEFINE_FIELD(PCON, POF, 4, 1)
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DEFINE_FIELD(PCON, GF1, 3, 1)
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DEFINE_FIELD(PCON, GF0, 2, 1)
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DEFINE_FIELD(PCON, PD, 1, 1)
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DEFINE_FIELD(PCON, IDL, 0, 1)
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};
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SFR(TCON, 0x88);
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SFR(TMOD, 0x89);
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enum {
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DEFINE_FIELD(TMOD, T0M, 0, 2)
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DEFINE_FIELD(TMOD, T0CT, 2, 1)
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DEFINE_FIELD(TMOD, T0GATE, 3, 1)
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DEFINE_FIELD(TMOD, T1M, 4, 2)
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DEFINE_FIELD(TMOD, T1CT, 6, 1)
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DEFINE_FIELD(TMOD, T1GATE, 7, 1)
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};
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SFR(TL0, 0x8A);
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SFR(TL1, 0x8B);
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SFR(TH0, 0x8C);
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SFR(TH1, 0x8D);
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SFR(CKCON, 0x8E);
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enum {
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DEFINE_FIELD(CKCON, PWMCKS, 6, 1)
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DEFINE_FIELD(CKCON, T1M, 4, 1)
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DEFINE_FIELD(CKCON, T0M, 3, 1)
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DEFINE_FIELD(CKCON, CLOEN, 1, 1)
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};
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SFR(WKCON, 0x8F);
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SFR(P1, 0x90);
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SFR(SFRS, 0x91); //TA Protection
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SFR(CAPCON0, 0x92);
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SFR(CAPCON1, 0x93);
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SFR(CAPCON2, 0x94);
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SFR(CKDIV, 0x95);
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SFR(CKSWT, 0x96); //TA Protection
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SFR(CKEN, 0x97); //TA Protection
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SFR(SCON, 0x98);
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SFR(SBUF, 0x99);
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SFR(SBUF_1, 0x9A);
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SFR(EIE, 0x9B);
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SFR(EIE1, 0x9C);
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SFR(CHPCON, 0x9F); //TA Protection
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enum {
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EIE_ET2_BIT = (1 << 7),
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EIE_ESPI_BIT = (1 << 6),
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EIE_EFB_BIT = (1 << 5),
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EIE_EWDT_BIT = (1 << 4),
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EIE_EPWM_BIT = (1 << 3),
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EIE_ECAP_BIT = (1 << 2),
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EIE_EPI_BIT = (1 << 1),
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EIE_EI2C_BIT = (1 << 1),
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};
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SFR(P2, 0xA0);
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SFR(AUXR1, 0xA2);
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SFR(BODCON0, 0xA3); //TA Protection
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SFR(IAPTRG, 0xA4); //TA Protection
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SFR(IAPUEN, 0xA5); //TA Protection
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SFR(IAPAL, 0xA6);
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SFR(IAPAH, 0xA7);
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SFR(IE, 0xA8);
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SFR(SADDR, 0xA9);
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SFR(WDCON, 0xAA); //TA Protection
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SFR(BODCON1, 0xAB); //TA Protection
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SFR(P3M1, 0xAC);
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SFR(P3S, 0xAC); //Page1
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SFR(P3M2, 0xAD);
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SFR(P3SR, 0xAD); //Page1
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SFR(IAPFD, 0xAE);
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SFR(IAPCN, 0xAF);
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SFR(P3, 0xB0);
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SFR(P0M1, 0xB1);
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SFR(P0S, 0xB1); //Page1
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SFR(P0M2, 0xB2);
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SFR(P0SR, 0xB2); //Page1
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SFR(P1M1, 0xB3);
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SFR(P1S, 0xB3); //Page1
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SFR(P1M2, 0xB4);
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SFR(P1SR, 0xB4); //Page1
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SFR(P2S, 0xB5);
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SFR(IPH, 0xB7);
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SFR(PWMINTC, 0xB7); //Page1
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SFR(IP, 0xB8);
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SFR(SADEN, 0xB9);
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SFR(SADEN_1, 0xBA);
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SFR(SADDR_1, 0xBB);
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SFR(I2DAT, 0xBC);
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SFR(I2STAT, 0xBD);
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SFR(I2CLK, 0xBE);
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SFR(I2TOC, 0xBF);
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SFR(I2CON, 0xC0);
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SFR(I2ADDR, 0xC1);
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enum {
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I2CSTAT_BUS_ERROR = 0x00,
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I2CSTAT_BUS_RELEASED = 0xF8,
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I2CSTAT_M_START = 0x08,
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I2CSTAT_M_REPEAT_START = 0x10,
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I2CSTAT_M_TX_ADDR_ACK = 0x18,
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I2CSTAT_M_TX_ADDR_NACK = 0x20,
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I2CSTAT_M_TX_DATA_ACK = 0x28,
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I2CSTAT_M_TX_DATA_NACK = 0x30,
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I2CSTAT_M_ARB_LOST = 0x38,
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I2CSTAT_M_RX_ADDR_ACK = 0x40,
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I2CSTAT_M_RX_ADDR_NACK = 0x48,
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I2CSTAT_M_RX_DATA_ACK = 0x50,
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I2CSTAT_M_RX_DATA_NACK = 0x58,
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I2CSTAT_S_TX_REPEAT_START_OR_STOP = 0xA0,
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I2CSTAT_S_TX_ARB_LOST = 0xB0,
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I2CSTAT_S_TX_DATA_ACK = 0xB8,
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I2CSTAT_S_TX_DATA_NACK = 0xC0,
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I2CSTAT_S_TX_LAST_DATA_ACK = 0xC8,
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I2CSTAT_S_RX_ACK = 0x60,
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I2CSTAT_S_RX_ARB_LOST = 0x68,
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I2CSTAT_S_RX_DATA_ACK = 0x80,
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I2CSTAT_S_RX_DATA_NACK = 0x88,
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I2CSTAT_GC_ADDR_ACK = 0x70,
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I2CSTAT_GC_ARB_LOST = 0x78,
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I2CSTAT_GC_DATA_ACK = 0x90,
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I2CSTAT_GC_DATA_NACK = 0x98,
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};
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SFR(ADCRL, 0xC2);
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SFR(ADCRH, 0xC3);
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SFR(T3CON, 0xC4);
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enum {
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DEFINE_FIELD(T3CON, SMOD_1, 7, 1)
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DEFINE_FIELD(T3CON, SMOD0_1, 6, 1)
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DEFINE_FIELD(T3CON, BRCK, 5, 1)
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DEFINE_FIELD(T3CON, TF3, 4, 1)
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DEFINE_FIELD(T3CON, TR3, 3, 1)
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DEFINE_FIELD(T3CON, T3PS, 0, 3)
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};
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SFR(PWM4H, 0xC4); //Page1
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SFR(RL3, 0xC5);
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SFR(PWM5H, 0xC5); //Page1
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SFR(RH3, 0xC6);
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SFR(PIOCON1, 0xC6); //Page1
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SFR(TA, 0xC7);
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SFR(T2CON, 0xC8);
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SFR(T2MOD, 0xC9);
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SFR(RCMP2L, 0xCA);
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SFR(RCMP2H, 0xCB);
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SFR(TL2, 0xCC);
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SFR(PWM4L, 0xCC); //Page1
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SFR(TH2, 0xCD);
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SFR(PWM5L, 0xCD); //Page1
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SFR(ADCMPL, 0xCE);
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SFR(ADCMPH, 0xCF);
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SFR(PSW, 0xD0);
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SFR(PWMPH, 0xD1);
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SFR(PWM0H, 0xD2);
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SFR(PWM1H, 0xD3);
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SFR(PWM2H, 0xD4);
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SFR(PWM3H, 0xD5);
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SFR(PNP, 0xD6);
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SFR(FBD, 0xD7);
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SFR(PWMCON0, 0xD8);
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SFR(PWMPL, 0xD9);
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SFR(PWM0L, 0xDA);
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SFR(PWM1L, 0xDB);
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SFR(PWM2L, 0xDC);
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SFR(PWM3L, 0xDD);
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SFR(PIOCON0, 0xDE);
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SFR(PWMCON1, 0xDF);
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SFR(ACC, 0xE0);
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SFR(ADCCON1, 0xE1);
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SFR(ADCCON2, 0xE2);
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SFR(ADCDLY, 0xE3);
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SFR(C0L, 0xE4);
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SFR(C0H, 0xE5);
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SFR(C1L, 0xE6);
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SFR(C1H, 0xE7);
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SFR(ADCCON0, 0xE8);
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SFR(PICON, 0xE9);
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SFR(PINEN, 0xEA);
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SFR(PIPEN, 0xEB);
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SFR(PIF, 0xEC);
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SFR(C2L, 0xED);
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SFR(C2H, 0xEE);
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SFR(EIP, 0xEF);
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SFR(B, 0xF0);
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SFR(CAPCON3, 0xF1);
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SFR(CAPCON4, 0xF2);
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SFR(SPCR, 0xF3);
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SFR(SPCR2, 0xF3); //Page1
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SFR(SPSR, 0xF4);
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SFR(SPDR, 0xF5);
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SFR(AINDIDS, 0xF6);
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SFR(EIPH, 0xF7);
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SFR(SCON_1, 0xF8);
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SFR(PDTEN, 0xF9); //TA Protection
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SFR(PDTCNT, 0xFA); //TA Protection
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SFR(PMEN, 0xFB);
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SFR(PMD, 0xFC);
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SFR(EIP1, 0xFE);
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SFR(EIPH1, 0xFF);
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/* BIT Registers */
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/* SCON_1 */
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SBIT(SM0_1, 0xF8, 7);
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SBIT(FE_1, 0xF8, 7);
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SBIT(SM1_1, 0xF8, 6);
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SBIT(SM2_1, 0xF8, 5);
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SBIT(REN_1, 0xF8, 4);
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SBIT(TB8_1, 0xF8, 3);
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SBIT(RB8_1, 0xF8, 2);
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SBIT(TI_1, 0xF8, 1);
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SBIT(RI_1, 0xF8, 0);
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/* ADCCON0 */
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SBIT(ADCF, 0xE8, 7);
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SBIT(ADCS, 0xE8, 6);
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SBIT(ETGSEL1,0xE8, 5);
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SBIT(ETGSEL0,0xE8, 4);
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SBIT(ADCHS3, 0xE8, 3);
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SBIT(ADCHS2, 0xE8, 2);
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SBIT(ADCHS1, 0xE8, 1);
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SBIT(ADCHS0, 0xE8, 0);
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/* PWMCON0 */
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SBIT(PWMRUN, 0xD8, 7);
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SBIT(LOAD, 0xD8, 6);
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SBIT(PWMF, 0xD8, 5);
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SBIT(CLRPWM, 0xD8, 4);
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/* PSW */
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SBIT(CY, 0xD0, 7);
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SBIT(AC, 0xD0, 6);
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SBIT(F0, 0xD0, 5);
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SBIT(RS1, 0xD0, 4);
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SBIT(RS0, 0xD0, 3);
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SBIT(OV, 0xD0, 2);
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SBIT(P, 0xD0, 0);
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/* T2CON */
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SBIT(TF2, 0xC8, 7);
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SBIT(TR2, 0xC8, 2);
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SBIT(CM_RL2, 0xC8, 0);
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/* I2CON
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* Naming differs from Nuvoton headers:
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* I2C prefixes added to ambiguous bits
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*/
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SBIT(I2CEN, 0xC0, 6);
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SBIT(I2CSTA, 0xC0, 5);
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SBIT(I2CSTO, 0xC0, 4);
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SBIT(I2CSI, 0xC0, 3);
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SBIT(I2CAA, 0xC0, 2);
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SBIT(I2CPX, 0xC0, 0);
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/* IP */
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SBIT(PADC, 0xB8, 6);
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SBIT(PBOD, 0xB8, 5);
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SBIT(PS, 0xB8, 4);
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SBIT(PT1, 0xB8, 3);
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SBIT(PX1, 0xB8, 2);
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SBIT(PT0, 0xB8, 1);
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SBIT(PX0, 0xB8, 0);
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/* P3 */
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SBIT(P30, 0xB0, 0);
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/* IE */
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SBIT(EA, 0xA8, 7);
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SBIT(EADC, 0xA8, 6);
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SBIT(EBOD, 0xA8, 5);
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SBIT(ES, 0xA8, 4);
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SBIT(ET1, 0xA8, 3);
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SBIT(EX1, 0xA8, 2);
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SBIT(ET0, 0xA8, 1);
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SBIT(EX0, 0xA8, 0);
|
||
|
|
|
||
|
|
/* P2 */
|
||
|
|
SBIT(P20, 0xA0, 0);
|
||
|
|
|
||
|
|
/* SCON */
|
||
|
|
SBIT(SM0, 0x98, 7);
|
||
|
|
SBIT(FE, 0x98, 7);
|
||
|
|
SBIT(SM1, 0x98, 6);
|
||
|
|
SBIT(SM2, 0x98, 5);
|
||
|
|
SBIT(REN, 0x98, 4);
|
||
|
|
SBIT(TB8, 0x98, 3);
|
||
|
|
SBIT(RB8, 0x98, 2);
|
||
|
|
SBIT(TI, 0x98, 1);
|
||
|
|
SBIT(RI, 0x98, 0);
|
||
|
|
|
||
|
|
/* P1 */
|
||
|
|
SBIT(P17, 0x90, 7);
|
||
|
|
SBIT(P16, 0x90, 6);
|
||
|
|
SBIT(TXD_1, 0x90, 6);
|
||
|
|
SBIT(P15, 0x90, 5);
|
||
|
|
SBIT(P14, 0x90, 4);
|
||
|
|
SBIT(SDA, 0x90, 4);
|
||
|
|
SBIT(P13, 0x90, 3);
|
||
|
|
SBIT(SCL, 0x90, 3);
|
||
|
|
SBIT(P12, 0x90, 2);
|
||
|
|
SBIT(P11, 0x90, 1);
|
||
|
|
SBIT(P10, 0x90, 0);
|
||
|
|
|
||
|
|
/* TCON */
|
||
|
|
SBIT(TF1, 0x88, 7);
|
||
|
|
SBIT(TR1, 0x88, 6);
|
||
|
|
SBIT(TF0, 0x88, 5);
|
||
|
|
SBIT(TR0, 0x88, 4);
|
||
|
|
SBIT(IE1, 0x88, 3);
|
||
|
|
SBIT(IT1, 0x88, 2);
|
||
|
|
SBIT(IE0, 0x88, 1);
|
||
|
|
SBIT(IT0, 0x88, 0);
|
||
|
|
|
||
|
|
/* P0 */
|
||
|
|
|
||
|
|
SBIT(P07, 0x80, 7);
|
||
|
|
SBIT(RXD, 0x80, 7);
|
||
|
|
SBIT(P06, 0x80, 6);
|
||
|
|
SBIT(TXD, 0x80, 6);
|
||
|
|
SBIT(P05, 0x80, 5);
|
||
|
|
SBIT(P04, 0x80, 4);
|
||
|
|
SBIT(STADC, 0x80, 4);
|
||
|
|
SBIT(P03, 0x80, 3);
|
||
|
|
SBIT(P02, 0x80, 2);
|
||
|
|
SBIT(RXD_1, 0x80, 2);
|
||
|
|
SBIT(P01, 0x80, 1);
|
||
|
|
SBIT(MISO, 0x80, 1);
|
||
|
|
SBIT(P00, 0x80, 0);
|
||
|
|
SBIT(MOSI, 0x80, 0);
|
||
|
|
|
||
|
|
#define TA_UNPROTECT() do { \
|
||
|
|
TA = 0xAA; \
|
||
|
|
TA = 0x55; \
|
||
|
|
} while(0)
|
||
|
|
|
||
|
|
#define SFR_PAGE(n) do { \
|
||
|
|
TA_UNPROTECT(); \
|
||
|
|
SFRS = n; \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#endif
|