392 lines
17 KiB
C
392 lines
17 KiB
C
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/**
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******************************************************************************
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* @file cbtl08gp053.c
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* @author MCD Application Team
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* @brief This file provides a set of functions needed to manage the CBTL08GP053
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* (Crossbar switch device for USB Type-C systems).
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "cbtl08gp053.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup Components
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* @{
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*/
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/** @defgroup CBTL08GP053
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* @brief This file provides a set of functions needed to drive the
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* CBTL08GP053 Crossbar switch device for USB Type-C systems.
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* @{
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*/
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/** @defgroup CBTL08GP053_Private_TypesDefinitions
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup CBTL08GP053_Private_Defines
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup CBTL08GP053_Private_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup CBTL08GP053_Private_Variables
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* @{
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*/
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#ifdef DBG_BSP_MUX
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CBTL08GP053_TypeDef CBTL08GP053 =
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{
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.SYS_CTRL = 0x00,
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.OP1_CTRL = 0x00,
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.OP2_CTRL = 0x00,
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.OP3_CTRL = 0x00,
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.OP4_CTRL = 0x00,
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.OP5_CTRL = 0x00,
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.CROSS5_CTRL = 0x01,
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.SW_CTRL = 0x00,
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.SW_CTRL = 0x00,
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.REVISION = 0xA0
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};
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#endif /* DBG_BSP_MUX */
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/* Type-C Crosspoint Switch Driver structure initialization */
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TYPECSWITCH_Drv_t cbtl08gp053_drv = {
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cbtl08gp053_Init,
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cbtl08gp053_DeInit,
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cbtl08gp053_PowerOn,
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cbtl08gp053_PowerOff,
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cbtl08gp053_SetMode,
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cbtl08gp053_IsSupportedMode
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};
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/* Supported USB Type-C pin assignments */
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static const uint32_t cbtl08gp053_SupportedModes =
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( 1 << USB_NORMAL |
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1 << USB_FLIPPED |
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1 << DFP_D_PIN_ASSIGNMENT_C_NORMAL |
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1 << DFP_D_PIN_ASSIGNMENT_C_FLIPPED |
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1 << DFP_D_PIN_ASSIGNMENT_D_NORMAL |
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1 << DFP_D_PIN_ASSIGNMENT_D_FLIPPED |
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1 << DFP_D_PIN_ASSIGNMENT_E_NORMAL |
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1 << DFP_D_PIN_ASSIGNMENT_E_FLIPPED |
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1 << DFP_D_PIN_ASSIGNMENT_F_NORMAL |
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1 << DFP_D_PIN_ASSIGNMENT_F_FLIPPED |
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1 << UFP_D_PIN_ASSIGNMENT_C_NORMAL |
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1 << UFP_D_PIN_ASSIGNMENT_C_FLIPPED |
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1 << UFP_D_PIN_ASSIGNMENT_D_NORMAL |
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1 << UFP_D_PIN_ASSIGNMENT_D_FLIPPED |
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1 << UFP_D_PIN_ASSIGNMENT_E_NORMAL |
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1 << UFP_D_PIN_ASSIGNMENT_E_FLIPPED );
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/**
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* @}
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*/
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/** @defgroup CBTL08GP053_Private_FunctionPrototypes
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup CBTL08GP053_Private_Functions
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* @{
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*/
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/**
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* @brief Initialize the CBTL08GP053 and configure the needed hardware resources.
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* @param Address CBTL08GP053 address on communication Bus.
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* @retval 0: successful, else failed
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*/
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uint32_t cbtl08gp053_Init(uint16_t Address)
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{
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uint32_t err_count = 0;
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/* Low level init */
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err_count += MUX_IO_Init();
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/* Restore CBTL08GP053 registers reset values */
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MUX_IO_Write(Address, CBTL08GP053_REG_SYS_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, 0x01);
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MUX_IO_Write(Address, CBTL08GP053_REG_SW_CTRL, 0x00);
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return err_count;
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}
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/**
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* @brief Release the hardware resources required to use the CBTL08GP053.
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* @param Address CBTL08GP053 address on communication Bus.
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* @retval none
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*/
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void cbtl08gp053_DeInit(uint16_t Address)
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{
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/* Restore CBTL08GP053 registers reset values */
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MUX_IO_Write(Address, CBTL08GP053_REG_SYS_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, 0x00);
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MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, 0x01);
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MUX_IO_Write(Address, CBTL08GP053_REG_SW_CTRL, 0x00);
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/* Low level de-init */
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MUX_IO_DeInit();
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}
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/**
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* @brief Power on the CBTL08GP053.
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* @param Address CBTL08GP053 address on communication Bus.
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* @retval 0: successful, else failed
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*/
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uint32_t cbtl08gp053_PowerOn(uint16_t Address)
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{
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uint32_t err_count = 0;
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/* Set SYS_CTRL.SWTICH_EN bit */
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_SYS_CTRL, CBTL08GP053_REG_SYS_CTRL_SWITCH_EN);
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return err_count;
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}
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/**
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* @brief Power down the CBTL08GP053.
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* @param Address CBTL08GP053 address on communication Bus.
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* @retval 0: successful, else failed
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*/
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uint32_t cbtl08gp053_PowerOff(uint16_t Address)
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{
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uint32_t err_count = 0;
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/* Clear SYS_CTRL.SWTICH_EN bit */
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_SYS_CTRL, 0x00);
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return err_count;
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}
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/**
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* @brief Configure the CBTL08GP053 according to the requested USB Type-C
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* connector pin assignment.
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* @param Address CBTL08GP053 address on communication Bus.
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* @param Mode USB Type-C connector pin assignment
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* @retval 0: success, else error
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*/
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uint32_t cbtl08gp053_SetMode(uint16_t Address, TYPECSWITCH_Mode_t Mode)
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{
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uint32_t err_count = 0;
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uint8_t sw_ctrl = (CBTL08GP053_REG_SW_X5_SET |
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CBTL08GP053_REG_SW_OP1_SET |
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CBTL08GP053_REG_SW_OP2_SET |
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CBTL08GP053_REG_SW_OP3_SET |
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CBTL08GP053_REG_SW_OP4_SET |
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CBTL08GP053_REG_SW_OP5_SET);
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/* Transition to safe mode prior updating cross switch configuration */
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, 0x00);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, 0x00);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, 0x00);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, 0x00);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, 0x00);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, 0x00);
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/* Configure cross switch */
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switch(Mode)
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{
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case USB_NORMAL:
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP1);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, 0x00);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP4);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, 0x00);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, 0x00);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, 0x00);
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break;
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case USB_FLIPPED:
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, 0x00);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP1);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, 0x00);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP4);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, 0x00);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, 0x00);
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break;
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case DFP_D_PIN_ASSIGNMENT_C_NORMAL:
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case DFP_D_PIN_ASSIGNMENT_E_NORMAL:
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP2);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, CBTL08GP053_REG_OP2_CTRL_EN_IP3);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP5);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, CBTL08GP053_REG_OP4_CTRL_EN_IP6);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, CBTL08GP053_REG_OP5_CTRL_EN_IP7);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, CBTL08GP053_REG_CROSS5_PASS);
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break;
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case DFP_D_PIN_ASSIGNMENT_C_FLIPPED:
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case DFP_D_PIN_ASSIGNMENT_E_FLIPPED:
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP3);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, CBTL08GP053_REG_OP2_CTRL_EN_IP2);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP6);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, CBTL08GP053_REG_OP4_CTRL_EN_IP5);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, CBTL08GP053_REG_OP5_CTRL_EN_IP7);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, CBTL08GP053_REG_CROSS5_CROSS);
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break;
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case DFP_D_PIN_ASSIGNMENT_D_NORMAL:
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case DFP_D_PIN_ASSIGNMENT_F_NORMAL:
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP1);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, CBTL08GP053_REG_OP2_CTRL_EN_IP3);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP4);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, CBTL08GP053_REG_OP4_CTRL_EN_IP6);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, CBTL08GP053_REG_OP5_CTRL_EN_IP7);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, CBTL08GP053_REG_CROSS5_PASS);
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break;
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case DFP_D_PIN_ASSIGNMENT_D_FLIPPED:
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case DFP_D_PIN_ASSIGNMENT_F_FLIPPED:
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP3);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, CBTL08GP053_REG_OP2_CTRL_EN_IP1);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP6);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, CBTL08GP053_REG_OP4_CTRL_EN_IP4);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, CBTL08GP053_REG_OP5_CTRL_EN_IP7);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, CBTL08GP053_REG_CROSS5_CROSS);
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break;
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case UFP_D_PIN_ASSIGNMENT_C_NORMAL:
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP2);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, CBTL08GP053_REG_OP2_CTRL_EN_IP3);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP5);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, CBTL08GP053_REG_OP4_CTRL_EN_IP6);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, CBTL08GP053_REG_OP5_CTRL_EN_IP7);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, CBTL08GP053_REG_CROSS5_CROSS);
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break;
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case UFP_D_PIN_ASSIGNMENT_C_FLIPPED:
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP3);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, CBTL08GP053_REG_OP2_CTRL_EN_IP2);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP6);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, CBTL08GP053_REG_OP4_CTRL_EN_IP5);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, CBTL08GP053_REG_OP5_CTRL_EN_IP7);
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, CBTL08GP053_REG_CROSS5_PASS);
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break;
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case UFP_D_PIN_ASSIGNMENT_D_NORMAL:
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err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP1);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, CBTL08GP053_REG_OP2_CTRL_EN_IP3);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP4);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, CBTL08GP053_REG_OP4_CTRL_EN_IP6);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, CBTL08GP053_REG_OP5_CTRL_EN_IP7);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, CBTL08GP053_REG_CROSS5_CROSS);
|
||
|
break;
|
||
|
case UFP_D_PIN_ASSIGNMENT_D_FLIPPED:
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP3);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, CBTL08GP053_REG_OP2_CTRL_EN_IP1);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP6);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, CBTL08GP053_REG_OP4_CTRL_EN_IP4);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, CBTL08GP053_REG_OP5_CTRL_EN_IP7);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, CBTL08GP053_REG_CROSS5_PASS);
|
||
|
break;
|
||
|
case UFP_D_PIN_ASSIGNMENT_E_NORMAL:
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP2);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, CBTL08GP053_REG_OP2_CTRL_EN_IP3);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP5);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, CBTL08GP053_REG_OP4_CTRL_EN_IP6);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, CBTL08GP053_REG_OP5_CTRL_EN_IP7);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, CBTL08GP053_REG_CROSS5_CROSS);
|
||
|
break;
|
||
|
case UFP_D_PIN_ASSIGNMENT_E_FLIPPED:
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, CBTL08GP053_REG_OP1_CTRL_EN_IP3);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, CBTL08GP053_REG_OP2_CTRL_EN_IP2);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, CBTL08GP053_REG_OP3_CTRL_EN_IP6);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, CBTL08GP053_REG_OP4_CTRL_EN_IP5);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, CBTL08GP053_REG_OP5_CTRL_EN_IP7);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, CBTL08GP053_REG_CROSS5_PASS);
|
||
|
break;
|
||
|
default:
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP1_CTRL, 0x00);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP2_CTRL, 0x00);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP3_CTRL, 0x00);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP4_CTRL, 0x00);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_OP5_CTRL, 0x00);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_CROSS5_CTRL, 0x00);
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_SW_CTRL, sw_ctrl);
|
||
|
break;
|
||
|
}
|
||
|
|
||
|
/* Enable cross switch configuration */
|
||
|
err_count += MUX_IO_Write(Address, CBTL08GP053_REG_SW_CTRL, sw_ctrl);
|
||
|
|
||
|
return err_count;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Indicate whether the requested USB Type-C connector pin assignment
|
||
|
* is supported by the CBTL08GP053.
|
||
|
* @param Mode USB Type-C connector pin assignment
|
||
|
* @retval 0: success, else error
|
||
|
*/
|
||
|
uint32_t cbtl08gp053_IsSupportedMode(TYPECSWITCH_Mode_t Mode)
|
||
|
{
|
||
|
return (((1 << Mode) & cbtl08gp053_SupportedModes ) == 0) ? 0 : 1;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|