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stm32cubeide/Relays/Debug/Relays.list

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Initial commit
2021-01-01 14:06:20 +01:00
Relays.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000000c0 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 00002f88 080000c0 080000c0 000100c0 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000000a4 08003048 08003048 00013048 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 080030ec 080030ec 00020074 2**0
CONTENTS
4 .ARM 00000000 080030ec 080030ec 00020074 2**0
CONTENTS
5 .preinit_array 00000000 080030ec 080030ec 00020074 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 080030ec 080030ec 000130ec 2**2
CONTENTS, ALLOC, LOAD, DATA
7 .fini_array 00000004 080030f0 080030f0 000130f0 2**2
CONTENTS, ALLOC, LOAD, DATA
8 .data 00000074 20000000 080030f4 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 00000140 20000074 08003168 00020074 2**2
ALLOC
10 ._user_heap_stack 00000604 200001b4 08003168 000201b4 2**0
ALLOC
11 .ARM.attributes 00000028 00000000 00000000 00020074 2**0
CONTENTS, READONLY
12 .debug_info 0000833f 00000000 00000000 0002009c 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_abbrev 000017fb 00000000 00000000 000283db 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_aranges 00000678 00000000 00000000 00029bd8 2**3
CONTENTS, READONLY, DEBUGGING
15 .debug_ranges 000005e0 00000000 00000000 0002a250 2**3
CONTENTS, READONLY, DEBUGGING
16 .debug_macro 0000f717 00000000 00000000 0002a830 2**0
CONTENTS, READONLY, DEBUGGING
17 .debug_line 000066f3 00000000 00000000 00039f47 2**0
CONTENTS, READONLY, DEBUGGING
18 .debug_str 0005b783 00000000 00000000 0004063a 2**0
CONTENTS, READONLY, DEBUGGING
19 .comment 0000007b 00000000 00000000 0009bdbd 2**0
CONTENTS, READONLY
20 .debug_frame 00001750 00000000 00000000 0009be38 2**2
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
080000c0 <__do_global_dtors_aux>:
80000c0: b510 push {r4, lr}
80000c2: 4c06 ldr r4, [pc, #24] ; (80000dc <__do_global_dtors_aux+0x1c>)
80000c4: 7823 ldrb r3, [r4, #0]
80000c6: 2b00 cmp r3, #0
80000c8: d107 bne.n 80000da <__do_global_dtors_aux+0x1a>
80000ca: 4b05 ldr r3, [pc, #20] ; (80000e0 <__do_global_dtors_aux+0x20>)
80000cc: 2b00 cmp r3, #0
80000ce: d002 beq.n 80000d6 <__do_global_dtors_aux+0x16>
80000d0: 4804 ldr r0, [pc, #16] ; (80000e4 <__do_global_dtors_aux+0x24>)
80000d2: e000 b.n 80000d6 <__do_global_dtors_aux+0x16>
80000d4: bf00 nop
80000d6: 2301 movs r3, #1
80000d8: 7023 strb r3, [r4, #0]
80000da: bd10 pop {r4, pc}
80000dc: 20000074 .word 0x20000074
80000e0: 00000000 .word 0x00000000
80000e4: 08003030 .word 0x08003030
080000e8 <frame_dummy>:
80000e8: 4b04 ldr r3, [pc, #16] ; (80000fc <frame_dummy+0x14>)
80000ea: b510 push {r4, lr}
80000ec: 2b00 cmp r3, #0
80000ee: d003 beq.n 80000f8 <frame_dummy+0x10>
80000f0: 4903 ldr r1, [pc, #12] ; (8000100 <frame_dummy+0x18>)
80000f2: 4804 ldr r0, [pc, #16] ; (8000104 <frame_dummy+0x1c>)
80000f4: e000 b.n 80000f8 <frame_dummy+0x10>
80000f6: bf00 nop
80000f8: bd10 pop {r4, pc}
80000fa: 46c0 nop ; (mov r8, r8)
80000fc: 00000000 .word 0x00000000
8000100: 20000078 .word 0x20000078
8000104: 08003030 .word 0x08003030
08000108 <strlen>:
8000108: 2300 movs r3, #0
800010a: 5cc2 ldrb r2, [r0, r3]
800010c: 3301 adds r3, #1
800010e: 2a00 cmp r2, #0
8000110: d1fb bne.n 800010a <strlen+0x2>
8000112: 1e58 subs r0, r3, #1
8000114: 4770 bx lr
...
08000118 <__udivsi3>:
8000118: 2200 movs r2, #0
800011a: 0843 lsrs r3, r0, #1
800011c: 428b cmp r3, r1
800011e: d374 bcc.n 800020a <__udivsi3+0xf2>
8000120: 0903 lsrs r3, r0, #4
8000122: 428b cmp r3, r1
8000124: d35f bcc.n 80001e6 <__udivsi3+0xce>
8000126: 0a03 lsrs r3, r0, #8
8000128: 428b cmp r3, r1
800012a: d344 bcc.n 80001b6 <__udivsi3+0x9e>
800012c: 0b03 lsrs r3, r0, #12
800012e: 428b cmp r3, r1
8000130: d328 bcc.n 8000184 <__udivsi3+0x6c>
8000132: 0c03 lsrs r3, r0, #16
8000134: 428b cmp r3, r1
8000136: d30d bcc.n 8000154 <__udivsi3+0x3c>
8000138: 22ff movs r2, #255 ; 0xff
800013a: 0209 lsls r1, r1, #8
800013c: ba12 rev r2, r2
800013e: 0c03 lsrs r3, r0, #16
8000140: 428b cmp r3, r1
8000142: d302 bcc.n 800014a <__udivsi3+0x32>
8000144: 1212 asrs r2, r2, #8
8000146: 0209 lsls r1, r1, #8
8000148: d065 beq.n 8000216 <__udivsi3+0xfe>
800014a: 0b03 lsrs r3, r0, #12
800014c: 428b cmp r3, r1
800014e: d319 bcc.n 8000184 <__udivsi3+0x6c>
8000150: e000 b.n 8000154 <__udivsi3+0x3c>
8000152: 0a09 lsrs r1, r1, #8
8000154: 0bc3 lsrs r3, r0, #15
8000156: 428b cmp r3, r1
8000158: d301 bcc.n 800015e <__udivsi3+0x46>
800015a: 03cb lsls r3, r1, #15
800015c: 1ac0 subs r0, r0, r3
800015e: 4152 adcs r2, r2
8000160: 0b83 lsrs r3, r0, #14
8000162: 428b cmp r3, r1
8000164: d301 bcc.n 800016a <__udivsi3+0x52>
8000166: 038b lsls r3, r1, #14
8000168: 1ac0 subs r0, r0, r3
800016a: 4152 adcs r2, r2
800016c: 0b43 lsrs r3, r0, #13
800016e: 428b cmp r3, r1
8000170: d301 bcc.n 8000176 <__udivsi3+0x5e>
8000172: 034b lsls r3, r1, #13
8000174: 1ac0 subs r0, r0, r3
8000176: 4152 adcs r2, r2
8000178: 0b03 lsrs r3, r0, #12
800017a: 428b cmp r3, r1
800017c: d301 bcc.n 8000182 <__udivsi3+0x6a>
800017e: 030b lsls r3, r1, #12
8000180: 1ac0 subs r0, r0, r3
8000182: 4152 adcs r2, r2
8000184: 0ac3 lsrs r3, r0, #11
8000186: 428b cmp r3, r1
8000188: d301 bcc.n 800018e <__udivsi3+0x76>
800018a: 02cb lsls r3, r1, #11
800018c: 1ac0 subs r0, r0, r3
800018e: 4152 adcs r2, r2
8000190: 0a83 lsrs r3, r0, #10
8000192: 428b cmp r3, r1
8000194: d301 bcc.n 800019a <__udivsi3+0x82>
8000196: 028b lsls r3, r1, #10
8000198: 1ac0 subs r0, r0, r3
800019a: 4152 adcs r2, r2
800019c: 0a43 lsrs r3, r0, #9
800019e: 428b cmp r3, r1
80001a0: d301 bcc.n 80001a6 <__udivsi3+0x8e>
80001a2: 024b lsls r3, r1, #9
80001a4: 1ac0 subs r0, r0, r3
80001a6: 4152 adcs r2, r2
80001a8: 0a03 lsrs r3, r0, #8
80001aa: 428b cmp r3, r1
80001ac: d301 bcc.n 80001b2 <__udivsi3+0x9a>
80001ae: 020b lsls r3, r1, #8
80001b0: 1ac0 subs r0, r0, r3
80001b2: 4152 adcs r2, r2
80001b4: d2cd bcs.n 8000152 <__udivsi3+0x3a>
80001b6: 09c3 lsrs r3, r0, #7
80001b8: 428b cmp r3, r1
80001ba: d301 bcc.n 80001c0 <__udivsi3+0xa8>
80001bc: 01cb lsls r3, r1, #7
80001be: 1ac0 subs r0, r0, r3
80001c0: 4152 adcs r2, r2
80001c2: 0983 lsrs r3, r0, #6
80001c4: 428b cmp r3, r1
80001c6: d301 bcc.n 80001cc <__udivsi3+0xb4>
80001c8: 018b lsls r3, r1, #6
80001ca: 1ac0 subs r0, r0, r3
80001cc: 4152 adcs r2, r2
80001ce: 0943 lsrs r3, r0, #5
80001d0: 428b cmp r3, r1
80001d2: d301 bcc.n 80001d8 <__udivsi3+0xc0>
80001d4: 014b lsls r3, r1, #5
80001d6: 1ac0 subs r0, r0, r3
80001d8: 4152 adcs r2, r2
80001da: 0903 lsrs r3, r0, #4
80001dc: 428b cmp r3, r1
80001de: d301 bcc.n 80001e4 <__udivsi3+0xcc>
80001e0: 010b lsls r3, r1, #4
80001e2: 1ac0 subs r0, r0, r3
80001e4: 4152 adcs r2, r2
80001e6: 08c3 lsrs r3, r0, #3
80001e8: 428b cmp r3, r1
80001ea: d301 bcc.n 80001f0 <__udivsi3+0xd8>
80001ec: 00cb lsls r3, r1, #3
80001ee: 1ac0 subs r0, r0, r3
80001f0: 4152 adcs r2, r2
80001f2: 0883 lsrs r3, r0, #2
80001f4: 428b cmp r3, r1
80001f6: d301 bcc.n 80001fc <__udivsi3+0xe4>
80001f8: 008b lsls r3, r1, #2
80001fa: 1ac0 subs r0, r0, r3
80001fc: 4152 adcs r2, r2
80001fe: 0843 lsrs r3, r0, #1
8000200: 428b cmp r3, r1
8000202: d301 bcc.n 8000208 <__udivsi3+0xf0>
8000204: 004b lsls r3, r1, #1
8000206: 1ac0 subs r0, r0, r3
8000208: 4152 adcs r2, r2
800020a: 1a41 subs r1, r0, r1
800020c: d200 bcs.n 8000210 <__udivsi3+0xf8>
800020e: 4601 mov r1, r0
8000210: 4152 adcs r2, r2
8000212: 4610 mov r0, r2
8000214: 4770 bx lr
8000216: e7ff b.n 8000218 <__udivsi3+0x100>
8000218: b501 push {r0, lr}
800021a: 2000 movs r0, #0
800021c: f000 f8f0 bl 8000400 <__aeabi_idiv0>
8000220: bd02 pop {r1, pc}
8000222: 46c0 nop ; (mov r8, r8)
08000224 <__aeabi_uidivmod>:
8000224: 2900 cmp r1, #0
8000226: d0f7 beq.n 8000218 <__udivsi3+0x100>
8000228: e776 b.n 8000118 <__udivsi3>
800022a: 4770 bx lr
0800022c <__divsi3>:
800022c: 4603 mov r3, r0
800022e: 430b orrs r3, r1
8000230: d47f bmi.n 8000332 <__divsi3+0x106>
8000232: 2200 movs r2, #0
8000234: 0843 lsrs r3, r0, #1
8000236: 428b cmp r3, r1
8000238: d374 bcc.n 8000324 <__divsi3+0xf8>
800023a: 0903 lsrs r3, r0, #4
800023c: 428b cmp r3, r1
800023e: d35f bcc.n 8000300 <__divsi3+0xd4>
8000240: 0a03 lsrs r3, r0, #8
8000242: 428b cmp r3, r1
8000244: d344 bcc.n 80002d0 <__divsi3+0xa4>
8000246: 0b03 lsrs r3, r0, #12
8000248: 428b cmp r3, r1
800024a: d328 bcc.n 800029e <__divsi3+0x72>
800024c: 0c03 lsrs r3, r0, #16
800024e: 428b cmp r3, r1
8000250: d30d bcc.n 800026e <__divsi3+0x42>
8000252: 22ff movs r2, #255 ; 0xff
8000254: 0209 lsls r1, r1, #8
8000256: ba12 rev r2, r2
8000258: 0c03 lsrs r3, r0, #16
800025a: 428b cmp r3, r1
800025c: d302 bcc.n 8000264 <__divsi3+0x38>
800025e: 1212 asrs r2, r2, #8
8000260: 0209 lsls r1, r1, #8
8000262: d065 beq.n 8000330 <__divsi3+0x104>
8000264: 0b03 lsrs r3, r0, #12
8000266: 428b cmp r3, r1
8000268: d319 bcc.n 800029e <__divsi3+0x72>
800026a: e000 b.n 800026e <__divsi3+0x42>
800026c: 0a09 lsrs r1, r1, #8
800026e: 0bc3 lsrs r3, r0, #15
8000270: 428b cmp r3, r1
8000272: d301 bcc.n 8000278 <__divsi3+0x4c>
8000274: 03cb lsls r3, r1, #15
8000276: 1ac0 subs r0, r0, r3
8000278: 4152 adcs r2, r2
800027a: 0b83 lsrs r3, r0, #14
800027c: 428b cmp r3, r1
800027e: d301 bcc.n 8000284 <__divsi3+0x58>
8000280: 038b lsls r3, r1, #14
8000282: 1ac0 subs r0, r0, r3
8000284: 4152 adcs r2, r2
8000286: 0b43 lsrs r3, r0, #13
8000288: 428b cmp r3, r1
800028a: d301 bcc.n 8000290 <__divsi3+0x64>
800028c: 034b lsls r3, r1, #13
800028e: 1ac0 subs r0, r0, r3
8000290: 4152 adcs r2, r2
8000292: 0b03 lsrs r3, r0, #12
8000294: 428b cmp r3, r1
8000296: d301 bcc.n 800029c <__divsi3+0x70>
8000298: 030b lsls r3, r1, #12
800029a: 1ac0 subs r0, r0, r3
800029c: 4152 adcs r2, r2
800029e: 0ac3 lsrs r3, r0, #11
80002a0: 428b cmp r3, r1
80002a2: d301 bcc.n 80002a8 <__divsi3+0x7c>
80002a4: 02cb lsls r3, r1, #11
80002a6: 1ac0 subs r0, r0, r3
80002a8: 4152 adcs r2, r2
80002aa: 0a83 lsrs r3, r0, #10
80002ac: 428b cmp r3, r1
80002ae: d301 bcc.n 80002b4 <__divsi3+0x88>
80002b0: 028b lsls r3, r1, #10
80002b2: 1ac0 subs r0, r0, r3
80002b4: 4152 adcs r2, r2
80002b6: 0a43 lsrs r3, r0, #9
80002b8: 428b cmp r3, r1
80002ba: d301 bcc.n 80002c0 <__divsi3+0x94>
80002bc: 024b lsls r3, r1, #9
80002be: 1ac0 subs r0, r0, r3
80002c0: 4152 adcs r2, r2
80002c2: 0a03 lsrs r3, r0, #8
80002c4: 428b cmp r3, r1
80002c6: d301 bcc.n 80002cc <__divsi3+0xa0>
80002c8: 020b lsls r3, r1, #8
80002ca: 1ac0 subs r0, r0, r3
80002cc: 4152 adcs r2, r2
80002ce: d2cd bcs.n 800026c <__divsi3+0x40>
80002d0: 09c3 lsrs r3, r0, #7
80002d2: 428b cmp r3, r1
80002d4: d301 bcc.n 80002da <__divsi3+0xae>
80002d6: 01cb lsls r3, r1, #7
80002d8: 1ac0 subs r0, r0, r3
80002da: 4152 adcs r2, r2
80002dc: 0983 lsrs r3, r0, #6
80002de: 428b cmp r3, r1
80002e0: d301 bcc.n 80002e6 <__divsi3+0xba>
80002e2: 018b lsls r3, r1, #6
80002e4: 1ac0 subs r0, r0, r3
80002e6: 4152 adcs r2, r2
80002e8: 0943 lsrs r3, r0, #5
80002ea: 428b cmp r3, r1
80002ec: d301 bcc.n 80002f2 <__divsi3+0xc6>
80002ee: 014b lsls r3, r1, #5
80002f0: 1ac0 subs r0, r0, r3
80002f2: 4152 adcs r2, r2
80002f4: 0903 lsrs r3, r0, #4
80002f6: 428b cmp r3, r1
80002f8: d301 bcc.n 80002fe <__divsi3+0xd2>
80002fa: 010b lsls r3, r1, #4
80002fc: 1ac0 subs r0, r0, r3
80002fe: 4152 adcs r2, r2
8000300: 08c3 lsrs r3, r0, #3
8000302: 428b cmp r3, r1
8000304: d301 bcc.n 800030a <__divsi3+0xde>
8000306: 00cb lsls r3, r1, #3
8000308: 1ac0 subs r0, r0, r3
800030a: 4152 adcs r2, r2
800030c: 0883 lsrs r3, r0, #2
800030e: 428b cmp r3, r1
8000310: d301 bcc.n 8000316 <__divsi3+0xea>
8000312: 008b lsls r3, r1, #2
8000314: 1ac0 subs r0, r0, r3
8000316: 4152 adcs r2, r2
8000318: 0843 lsrs r3, r0, #1
800031a: 428b cmp r3, r1
800031c: d301 bcc.n 8000322 <__divsi3+0xf6>
800031e: 004b lsls r3, r1, #1
8000320: 1ac0 subs r0, r0, r3
8000322: 4152 adcs r2, r2
8000324: 1a41 subs r1, r0, r1
8000326: d200 bcs.n 800032a <__divsi3+0xfe>
8000328: 4601 mov r1, r0
800032a: 4152 adcs r2, r2
800032c: 4610 mov r0, r2
800032e: 4770 bx lr
8000330: e05d b.n 80003ee <__divsi3+0x1c2>
8000332: 0fca lsrs r2, r1, #31
8000334: d000 beq.n 8000338 <__divsi3+0x10c>
8000336: 4249 negs r1, r1
8000338: 1003 asrs r3, r0, #32
800033a: d300 bcc.n 800033e <__divsi3+0x112>
800033c: 4240 negs r0, r0
800033e: 4053 eors r3, r2
8000340: 2200 movs r2, #0
8000342: 469c mov ip, r3
8000344: 0903 lsrs r3, r0, #4
8000346: 428b cmp r3, r1
8000348: d32d bcc.n 80003a6 <__divsi3+0x17a>
800034a: 0a03 lsrs r3, r0, #8
800034c: 428b cmp r3, r1
800034e: d312 bcc.n 8000376 <__divsi3+0x14a>
8000350: 22fc movs r2, #252 ; 0xfc
8000352: 0189 lsls r1, r1, #6
8000354: ba12 rev r2, r2
8000356: 0a03 lsrs r3, r0, #8
8000358: 428b cmp r3, r1
800035a: d30c bcc.n 8000376 <__divsi3+0x14a>
800035c: 0189 lsls r1, r1, #6
800035e: 1192 asrs r2, r2, #6
8000360: 428b cmp r3, r1
8000362: d308 bcc.n 8000376 <__divsi3+0x14a>
8000364: 0189 lsls r1, r1, #6
8000366: 1192 asrs r2, r2, #6
8000368: 428b cmp r3, r1
800036a: d304 bcc.n 8000376 <__divsi3+0x14a>
800036c: 0189 lsls r1, r1, #6
800036e: d03a beq.n 80003e6 <__divsi3+0x1ba>
8000370: 1192 asrs r2, r2, #6
8000372: e000 b.n 8000376 <__divsi3+0x14a>
8000374: 0989 lsrs r1, r1, #6
8000376: 09c3 lsrs r3, r0, #7
8000378: 428b cmp r3, r1
800037a: d301 bcc.n 8000380 <__divsi3+0x154>
800037c: 01cb lsls r3, r1, #7
800037e: 1ac0 subs r0, r0, r3
8000380: 4152 adcs r2, r2
8000382: 0983 lsrs r3, r0, #6
8000384: 428b cmp r3, r1
8000386: d301 bcc.n 800038c <__divsi3+0x160>
8000388: 018b lsls r3, r1, #6
800038a: 1ac0 subs r0, r0, r3
800038c: 4152 adcs r2, r2
800038e: 0943 lsrs r3, r0, #5
8000390: 428b cmp r3, r1
8000392: d301 bcc.n 8000398 <__divsi3+0x16c>
8000394: 014b lsls r3, r1, #5
8000396: 1ac0 subs r0, r0, r3
8000398: 4152 adcs r2, r2
800039a: 0903 lsrs r3, r0, #4
800039c: 428b cmp r3, r1
800039e: d301 bcc.n 80003a4 <__divsi3+0x178>
80003a0: 010b lsls r3, r1, #4
80003a2: 1ac0 subs r0, r0, r3
80003a4: 4152 adcs r2, r2
80003a6: 08c3 lsrs r3, r0, #3
80003a8: 428b cmp r3, r1
80003aa: d301 bcc.n 80003b0 <__divsi3+0x184>
80003ac: 00cb lsls r3, r1, #3
80003ae: 1ac0 subs r0, r0, r3
80003b0: 4152 adcs r2, r2
80003b2: 0883 lsrs r3, r0, #2
80003b4: 428b cmp r3, r1
80003b6: d301 bcc.n 80003bc <__divsi3+0x190>
80003b8: 008b lsls r3, r1, #2
80003ba: 1ac0 subs r0, r0, r3
80003bc: 4152 adcs r2, r2
80003be: d2d9 bcs.n 8000374 <__divsi3+0x148>
80003c0: 0843 lsrs r3, r0, #1
80003c2: 428b cmp r3, r1
80003c4: d301 bcc.n 80003ca <__divsi3+0x19e>
80003c6: 004b lsls r3, r1, #1
80003c8: 1ac0 subs r0, r0, r3
80003ca: 4152 adcs r2, r2
80003cc: 1a41 subs r1, r0, r1
80003ce: d200 bcs.n 80003d2 <__divsi3+0x1a6>
80003d0: 4601 mov r1, r0
80003d2: 4663 mov r3, ip
80003d4: 4152 adcs r2, r2
80003d6: 105b asrs r3, r3, #1
80003d8: 4610 mov r0, r2
80003da: d301 bcc.n 80003e0 <__divsi3+0x1b4>
80003dc: 4240 negs r0, r0
80003de: 2b00 cmp r3, #0
80003e0: d500 bpl.n 80003e4 <__divsi3+0x1b8>
80003e2: 4249 negs r1, r1
80003e4: 4770 bx lr
80003e6: 4663 mov r3, ip
80003e8: 105b asrs r3, r3, #1
80003ea: d300 bcc.n 80003ee <__divsi3+0x1c2>
80003ec: 4240 negs r0, r0
80003ee: b501 push {r0, lr}
80003f0: 2000 movs r0, #0
80003f2: f000 f805 bl 8000400 <__aeabi_idiv0>
80003f6: bd02 pop {r1, pc}
080003f8 <__aeabi_idivmod>:
80003f8: 2900 cmp r1, #0
80003fa: d0f8 beq.n 80003ee <__divsi3+0x1c2>
80003fc: e716 b.n 800022c <__divsi3>
80003fe: 4770 bx lr
08000400 <__aeabi_idiv0>:
8000400: 4770 bx lr
8000402: 46c0 nop ; (mov r8, r8)
08000404 <__aeabi_lmul>:
8000404: b5f0 push {r4, r5, r6, r7, lr}
8000406: 46ce mov lr, r9
8000408: 4647 mov r7, r8
800040a: 0415 lsls r5, r2, #16
800040c: 0c2d lsrs r5, r5, #16
800040e: 002e movs r6, r5
8000410: b580 push {r7, lr}
8000412: 0407 lsls r7, r0, #16
8000414: 0c14 lsrs r4, r2, #16
8000416: 0c3f lsrs r7, r7, #16
8000418: 4699 mov r9, r3
800041a: 0c03 lsrs r3, r0, #16
800041c: 437e muls r6, r7
800041e: 435d muls r5, r3
8000420: 4367 muls r7, r4
8000422: 4363 muls r3, r4
8000424: 197f adds r7, r7, r5
8000426: 0c34 lsrs r4, r6, #16
8000428: 19e4 adds r4, r4, r7
800042a: 469c mov ip, r3
800042c: 42a5 cmp r5, r4
800042e: d903 bls.n 8000438 <__aeabi_lmul+0x34>
8000430: 2380 movs r3, #128 ; 0x80
8000432: 025b lsls r3, r3, #9
8000434: 4698 mov r8, r3
8000436: 44c4 add ip, r8
8000438: 464b mov r3, r9
800043a: 4343 muls r3, r0
800043c: 4351 muls r1, r2
800043e: 0c25 lsrs r5, r4, #16
8000440: 0436 lsls r6, r6, #16
8000442: 4465 add r5, ip
8000444: 0c36 lsrs r6, r6, #16
8000446: 0424 lsls r4, r4, #16
8000448: 19a4 adds r4, r4, r6
800044a: 195b adds r3, r3, r5
800044c: 1859 adds r1, r3, r1
800044e: 0020 movs r0, r4
8000450: bc0c pop {r2, r3}
8000452: 4690 mov r8, r2
8000454: 4699 mov r9, r3
8000456: bdf0 pop {r4, r5, r6, r7, pc}
08000458 <__NVIC_SystemReset>:
/**
\brief System Reset
\details Initiates a system reset request to reset the MCU.
*/
__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
8000458: b580 push {r7, lr}
800045a: af00 add r7, sp, #0
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
__STATIC_FORCEINLINE void __DSB(void)
{
__ASM volatile ("dsb 0xF":::"memory");
800045c: f3bf 8f4f dsb sy
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8000460: 4b03 ldr r3, [pc, #12] ; (8000470 <__NVIC_SystemReset+0x18>)
8000462: 4a04 ldr r2, [pc, #16] ; (8000474 <__NVIC_SystemReset+0x1c>)
8000464: 60da str r2, [r3, #12]
8000466: f3bf 8f4f dsb sy
SCB_AIRCR_SYSRESETREQ_Msk);
__DSB(); /* Ensure completion of memory access */
for(;;) /* wait until reset */
{
__NOP();
800046a: 46c0 nop ; (mov r8, r8)
800046c: e7fd b.n 800046a <__NVIC_SystemReset+0x12>
800046e: 46c0 nop ; (mov r8, r8)
8000470: e000ed00 .word 0xe000ed00
8000474: 05fa0004 .word 0x05fa0004
08000478 <send>:
char _data[MY_RS485_MAX_MESSAGE_LENGTH];
uint8_t _packet_len;
unsigned char _packet_from;
_Bool send(MyMessage *message, uint8_t data_type)
{
8000478: b580 push {r7, lr}
800047a: b082 sub sp, #8
800047c: af00 add r7, sp, #0
800047e: 6078 str r0, [r7, #4]
8000480: 000a movs r2, r1
8000482: 1cfb adds r3, r7, #3
8000484: 701a strb r2, [r3, #0]
message->last = MY_NODE_ID;
8000486: 687b ldr r3, [r7, #4]
8000488: 22c8 movs r2, #200 ; 0xc8
800048a: 701a strb r2, [r3, #0]
message->sender = MY_NODE_ID;
800048c: 687b ldr r3, [r7, #4]
800048e: 22c8 movs r2, #200 ; 0xc8
8000490: 705a strb r2, [r3, #1]
message->destination = GATEWAY_ADDRESS;
8000492: 687b ldr r3, [r7, #4]
8000494: 2200 movs r2, #0
8000496: 709a strb r2, [r3, #2]
message->command_echo_payload = (data_type << 5) + C_SET;
8000498: 1cfb adds r3, r7, #3
800049a: 781b ldrb r3, [r3, #0]
800049c: 015b lsls r3, r3, #5
800049e: b2db uxtb r3, r3
80004a0: 3301 adds r3, #1
80004a2: b2da uxtb r2, r3
80004a4: 687b ldr r3, [r7, #4]
80004a6: 711a strb r2, [r3, #4]
return transportSend(message);
80004a8: 687b ldr r3, [r7, #4]
80004aa: 0018 movs r0, r3
80004ac: f000 fb4e bl 8000b4c <transportSend>
80004b0: 0003 movs r3, r0
}
80004b2: 0018 movs r0, r3
80004b4: 46bd mov sp, r7
80004b6: b002 add sp, #8
80004b8: bd80 pop {r7, pc}
...
080004bc <sendHeartbeat>:
_Bool sendHeartbeat(void)
{
80004bc: b580 push {r7, lr}
80004be: af00 add r7, sp, #0
_msgTmp.last = MY_NODE_ID;
80004c0: 4b15 ldr r3, [pc, #84] ; (8000518 <sendHeartbeat+0x5c>)
80004c2: 22c8 movs r2, #200 ; 0xc8
80004c4: 701a strb r2, [r3, #0]
_msgTmp.sender = MY_NODE_ID;
80004c6: 4b14 ldr r3, [pc, #80] ; (8000518 <sendHeartbeat+0x5c>)
80004c8: 22c8 movs r2, #200 ; 0xc8
80004ca: 705a strb r2, [r3, #1]
_msgTmp.destination = GATEWAY_ADDRESS;
80004cc: 4b12 ldr r3, [pc, #72] ; (8000518 <sendHeartbeat+0x5c>)
80004ce: 2200 movs r2, #0
80004d0: 709a strb r2, [r3, #2]
_msgTmp.command_echo_payload = (P_ULONG32 << 5) + C_INTERNAL;
80004d2: 4b11 ldr r3, [pc, #68] ; (8000518 <sendHeartbeat+0x5c>)
80004d4: 22a3 movs r2, #163 ; 0xa3
80004d6: 711a strb r2, [r3, #4]
_msgTmp.type = I_HEARTBEAT_RESPONSE;
80004d8: 4b0f ldr r3, [pc, #60] ; (8000518 <sendHeartbeat+0x5c>)
80004da: 2216 movs r2, #22
80004dc: 715a strb r2, [r3, #5]
_msgTmp.version_length = (4 << 3) + V2_MYS_HEADER_PROTOCOL_VERSION;
80004de: 4b0e ldr r3, [pc, #56] ; (8000518 <sendHeartbeat+0x5c>)
80004e0: 2222 movs r2, #34 ; 0x22
80004e2: 70da strb r2, [r3, #3]
_msgTmp.ulValue = 0;
80004e4: 4b0c ldr r3, [pc, #48] ; (8000518 <sendHeartbeat+0x5c>)
80004e6: 3307 adds r3, #7
80004e8: 781a ldrb r2, [r3, #0]
80004ea: 2100 movs r1, #0
80004ec: 400a ands r2, r1
80004ee: 701a strb r2, [r3, #0]
80004f0: 785a ldrb r2, [r3, #1]
80004f2: 2100 movs r1, #0
80004f4: 400a ands r2, r1
80004f6: 705a strb r2, [r3, #1]
80004f8: 789a ldrb r2, [r3, #2]
80004fa: 2100 movs r1, #0
80004fc: 400a ands r2, r1
80004fe: 709a strb r2, [r3, #2]
8000500: 78da ldrb r2, [r3, #3]
8000502: 2100 movs r1, #0
8000504: 400a ands r2, r1
8000506: 70da strb r2, [r3, #3]
return transportSend(&_msgTmp);
8000508: 4b03 ldr r3, [pc, #12] ; (8000518 <sendHeartbeat+0x5c>)
800050a: 0018 movs r0, r3
800050c: f000 fb1e bl 8000b4c <transportSend>
8000510: 0003 movs r3, r0
}
8000512: 0018 movs r0, r3
8000514: 46bd mov sp, r7
8000516: bd80 pop {r7, pc}
8000518: 200000dc .word 0x200000dc
0800051c <present>:
_Bool present(const uint8_t childSensorId, const mysensors_sensor_t sensorType, char *desc)
{
800051c: b580 push {r7, lr}
800051e: b082 sub sp, #8
8000520: af00 add r7, sp, #0
8000522: 603a str r2, [r7, #0]
8000524: 1dfb adds r3, r7, #7
8000526: 1c02 adds r2, r0, #0
8000528: 701a strb r2, [r3, #0]
800052a: 1dbb adds r3, r7, #6
800052c: 1c0a adds r2, r1, #0
800052e: 701a strb r2, [r3, #0]
_msgTmp.last = MY_NODE_ID;
8000530: 4b17 ldr r3, [pc, #92] ; (8000590 <present+0x74>)
8000532: 22c8 movs r2, #200 ; 0xc8
8000534: 701a strb r2, [r3, #0]
_msgTmp.sender = MY_NODE_ID;
8000536: 4b16 ldr r3, [pc, #88] ; (8000590 <present+0x74>)
8000538: 22c8 movs r2, #200 ; 0xc8
800053a: 705a strb r2, [r3, #1]
_msgTmp.destination = GATEWAY_ADDRESS;
800053c: 4b14 ldr r3, [pc, #80] ; (8000590 <present+0x74>)
800053e: 2200 movs r2, #0
8000540: 709a strb r2, [r3, #2]
_msgTmp.command_echo_payload = (P_STRING << 5) + C_PRESENTATION;
8000542: 4b13 ldr r3, [pc, #76] ; (8000590 <present+0x74>)
8000544: 2200 movs r2, #0
8000546: 711a strb r2, [r3, #4]
_msgTmp.type = sensorType;
8000548: 4b11 ldr r3, [pc, #68] ; (8000590 <present+0x74>)
800054a: 1dba adds r2, r7, #6
800054c: 7812 ldrb r2, [r2, #0]
800054e: 715a strb r2, [r3, #5]
_msgTmp.sensor = childSensorId;
8000550: 4b0f ldr r3, [pc, #60] ; (8000590 <present+0x74>)
8000552: 1dfa adds r2, r7, #7
8000554: 7812 ldrb r2, [r2, #0]
8000556: 719a strb r2, [r3, #6]
_msgTmp.version_length = (strlen(desc) << 3) + V2_MYS_HEADER_PROTOCOL_VERSION;
8000558: 683b ldr r3, [r7, #0]
800055a: 0018 movs r0, r3
800055c: f7ff fdd4 bl 8000108 <strlen>
8000560: 0003 movs r3, r0
8000562: b2db uxtb r3, r3
8000564: 00db lsls r3, r3, #3
8000566: b2db uxtb r3, r3
8000568: 3302 adds r3, #2
800056a: b2da uxtb r2, r3
800056c: 4b08 ldr r3, [pc, #32] ; (8000590 <present+0x74>)
800056e: 70da strb r2, [r3, #3]
strcpy((char *)_msgTmp.data, desc);
8000570: 683a ldr r2, [r7, #0]
8000572: 4b08 ldr r3, [pc, #32] ; (8000594 <present+0x78>)
8000574: 0011 movs r1, r2
8000576: 0018 movs r0, r3
8000578: f002 fcd6 bl 8002f28 <strcpy>
return transportSend(&_msgTmp);
800057c: 4b04 ldr r3, [pc, #16] ; (8000590 <present+0x74>)
800057e: 0018 movs r0, r3
8000580: f000 fae4 bl 8000b4c <transportSend>
8000584: 0003 movs r3, r0
}
8000586: 0018 movs r0, r3
8000588: 46bd mov sp, r7
800058a: b002 add sp, #8
800058c: bd80 pop {r7, pc}
800058e: 46c0 nop ; (mov r8, r8)
8000590: 200000dc .word 0x200000dc
8000594: 200000e3 .word 0x200000e3
08000598 <registerNode>:
void registerNode(void)
{
8000598: b580 push {r7, lr}
800059a: af00 add r7, sp, #0
_msgTmp.last = MY_NODE_ID;
800059c: 4b0f ldr r3, [pc, #60] ; (80005dc <registerNode+0x44>)
800059e: 22c8 movs r2, #200 ; 0xc8
80005a0: 701a strb r2, [r3, #0]
_msgTmp.sender = MY_NODE_ID;
80005a2: 4b0e ldr r3, [pc, #56] ; (80005dc <registerNode+0x44>)
80005a4: 22c8 movs r2, #200 ; 0xc8
80005a6: 705a strb r2, [r3, #1]
_msgTmp.destination = GATEWAY_ADDRESS;
80005a8: 4b0c ldr r3, [pc, #48] ; (80005dc <registerNode+0x44>)
80005aa: 2200 movs r2, #0
80005ac: 709a strb r2, [r3, #2]
_msgTmp.command_echo_payload = (P_BYTE << 5) + C_INTERNAL;
80005ae: 4b0b ldr r3, [pc, #44] ; (80005dc <registerNode+0x44>)
80005b0: 2223 movs r2, #35 ; 0x23
80005b2: 711a strb r2, [r3, #4]
_msgTmp.type = I_REGISTRATION_REQUEST;
80005b4: 4b09 ldr r3, [pc, #36] ; (80005dc <registerNode+0x44>)
80005b6: 221a movs r2, #26
80005b8: 715a strb r2, [r3, #5]
_msgTmp.sensor = 0;
80005ba: 4b08 ldr r3, [pc, #32] ; (80005dc <registerNode+0x44>)
80005bc: 2200 movs r2, #0
80005be: 719a strb r2, [r3, #6]
_msgTmp.version_length = (1 << 3) + V2_MYS_HEADER_PROTOCOL_VERSION;
80005c0: 4b06 ldr r3, [pc, #24] ; (80005dc <registerNode+0x44>)
80005c2: 220a movs r2, #10
80005c4: 70da strb r2, [r3, #3]
_msgTmp.bValue = MY_CORE_VERSION;
80005c6: 4b05 ldr r3, [pc, #20] ; (80005dc <registerNode+0x44>)
80005c8: 2202 movs r2, #2
80005ca: 71da strb r2, [r3, #7]
transportSend(&_msgTmp);
80005cc: 4b03 ldr r3, [pc, #12] ; (80005dc <registerNode+0x44>)
80005ce: 0018 movs r0, r3
80005d0: f000 fabc bl 8000b4c <transportSend>
}
80005d4: 46c0 nop ; (mov r8, r8)
80005d6: 46bd mov sp, r7
80005d8: bd80 pop {r7, pc}
80005da: 46c0 nop ; (mov r8, r8)
80005dc: 200000dc .word 0x200000dc
080005e0 <sendLibraryInfo>:
void sendLibraryInfo(void)
{
80005e0: b580 push {r7, lr}
80005e2: af00 add r7, sp, #0
_msgTmp.last = MY_NODE_ID;
80005e4: 4b10 ldr r3, [pc, #64] ; (8000628 <sendLibraryInfo+0x48>)
80005e6: 22c8 movs r2, #200 ; 0xc8
80005e8: 701a strb r2, [r3, #0]
_msgTmp.sender = MY_NODE_ID;
80005ea: 4b0f ldr r3, [pc, #60] ; (8000628 <sendLibraryInfo+0x48>)
80005ec: 22c8 movs r2, #200 ; 0xc8
80005ee: 705a strb r2, [r3, #1]
_msgTmp.destination = GATEWAY_ADDRESS;
80005f0: 4b0d ldr r3, [pc, #52] ; (8000628 <sendLibraryInfo+0x48>)
80005f2: 2200 movs r2, #0
80005f4: 709a strb r2, [r3, #2]
_msgTmp.command_echo_payload = (P_STRING << 5) + C_INTERNAL;
80005f6: 4b0c ldr r3, [pc, #48] ; (8000628 <sendLibraryInfo+0x48>)
80005f8: 2203 movs r2, #3
80005fa: 711a strb r2, [r3, #4]
_msgTmp.type = I_VERSION;
80005fc: 4b0a ldr r3, [pc, #40] ; (8000628 <sendLibraryInfo+0x48>)
80005fe: 2202 movs r2, #2
8000600: 715a strb r2, [r3, #5]
_msgTmp.version_length = (strlen(MY_LIBRARY_VERSION) << 3) + V2_MYS_HEADER_PROTOCOL_VERSION;
8000602: 4b09 ldr r3, [pc, #36] ; (8000628 <sendLibraryInfo+0x48>)
8000604: 223a movs r2, #58 ; 0x3a
8000606: 70da strb r2, [r3, #3]
strcpy((char *)_msgTmp.data, MY_LIBRARY_VERSION);
8000608: 4a08 ldr r2, [pc, #32] ; (800062c <sendLibraryInfo+0x4c>)
800060a: 4b09 ldr r3, [pc, #36] ; (8000630 <sendLibraryInfo+0x50>)
800060c: 0010 movs r0, r2
800060e: 0019 movs r1, r3
8000610: 2308 movs r3, #8
8000612: 001a movs r2, r3
8000614: f002 fc20 bl 8002e58 <memcpy>
transportSend(&_msgTmp);
8000618: 4b03 ldr r3, [pc, #12] ; (8000628 <sendLibraryInfo+0x48>)
800061a: 0018 movs r0, r3
800061c: f000 fa96 bl 8000b4c <transportSend>
}
8000620: 46c0 nop ; (mov r8, r8)
8000622: 46bd mov sp, r7
8000624: bd80 pop {r7, pc}
8000626: 46c0 nop ; (mov r8, r8)
8000628: 200000dc .word 0x200000dc
800062c: 200000e3 .word 0x200000e3
8000630: 08003048 .word 0x08003048
08000634 <sendSketchInfo>:
_Bool sendSketchInfo(const char *name, const char *version)
{
8000634: b580 push {r7, lr}
8000636: b084 sub sp, #16
8000638: af00 add r7, sp, #0
800063a: 6078 str r0, [r7, #4]
800063c: 6039 str r1, [r7, #0]
_Bool result = 1;
800063e: 230f movs r3, #15
8000640: 18fb adds r3, r7, r3
8000642: 2201 movs r2, #1
8000644: 701a strb r2, [r3, #0]
if (name) {
8000646: 687b ldr r3, [r7, #4]
8000648: 2b00 cmp r3, #0
800064a: d02e beq.n 80006aa <sendSketchInfo+0x76>
_msgTmp.last = MY_NODE_ID;
800064c: 4b34 ldr r3, [pc, #208] ; (8000720 <sendSketchInfo+0xec>)
800064e: 22c8 movs r2, #200 ; 0xc8
8000650: 701a strb r2, [r3, #0]
_msgTmp.sender = MY_NODE_ID;
8000652: 4b33 ldr r3, [pc, #204] ; (8000720 <sendSketchInfo+0xec>)
8000654: 22c8 movs r2, #200 ; 0xc8
8000656: 705a strb r2, [r3, #1]
_msgTmp.destination = GATEWAY_ADDRESS;
8000658: 4b31 ldr r3, [pc, #196] ; (8000720 <sendSketchInfo+0xec>)
800065a: 2200 movs r2, #0
800065c: 709a strb r2, [r3, #2]
_msgTmp.command_echo_payload = (P_STRING << 5) + C_INTERNAL;
800065e: 4b30 ldr r3, [pc, #192] ; (8000720 <sendSketchInfo+0xec>)
8000660: 2203 movs r2, #3
8000662: 711a strb r2, [r3, #4]
_msgTmp.type = I_SKETCH_NAME;
8000664: 4b2e ldr r3, [pc, #184] ; (8000720 <sendSketchInfo+0xec>)
8000666: 220b movs r2, #11
8000668: 715a strb r2, [r3, #5]
_msgTmp.version_length = (strlen(name) << 3) + V2_MYS_HEADER_PROTOCOL_VERSION;
800066a: 687b ldr r3, [r7, #4]
800066c: 0018 movs r0, r3
800066e: f7ff fd4b bl 8000108 <strlen>
8000672: 0003 movs r3, r0
8000674: b2db uxtb r3, r3
8000676: 00db lsls r3, r3, #3
8000678: b2db uxtb r3, r3
800067a: 3302 adds r3, #2
800067c: b2da uxtb r2, r3
800067e: 4b28 ldr r3, [pc, #160] ; (8000720 <sendSketchInfo+0xec>)
8000680: 70da strb r2, [r3, #3]
strcpy((char *)_msgTmp.data, name);
8000682: 687a ldr r2, [r7, #4]
8000684: 4b27 ldr r3, [pc, #156] ; (8000724 <sendSketchInfo+0xf0>)
8000686: 0011 movs r1, r2
8000688: 0018 movs r0, r3
800068a: f002 fc4d bl 8002f28 <strcpy>
result &= transportSend(&_msgTmp);
800068e: 4b24 ldr r3, [pc, #144] ; (8000720 <sendSketchInfo+0xec>)
8000690: 0018 movs r0, r3
8000692: f000 fa5b bl 8000b4c <transportSend>
8000696: 0003 movs r3, r0
8000698: 001a movs r2, r3
800069a: 210f movs r1, #15
800069c: 187b adds r3, r7, r1
800069e: 781b ldrb r3, [r3, #0]
80006a0: 401a ands r2, r3
80006a2: 187b adds r3, r7, r1
80006a4: 1e51 subs r1, r2, #1
80006a6: 418a sbcs r2, r1
80006a8: 701a strb r2, [r3, #0]
}
if (version) {
80006aa: 683b ldr r3, [r7, #0]
80006ac: 2b00 cmp r3, #0
80006ae: d02e beq.n 800070e <sendSketchInfo+0xda>
_msgTmp.last = MY_NODE_ID;
80006b0: 4b1b ldr r3, [pc, #108] ; (8000720 <sendSketchInfo+0xec>)
80006b2: 22c8 movs r2, #200 ; 0xc8
80006b4: 701a strb r2, [r3, #0]
_msgTmp.sender = MY_NODE_ID;
80006b6: 4b1a ldr r3, [pc, #104] ; (8000720 <sendSketchInfo+0xec>)
80006b8: 22c8 movs r2, #200 ; 0xc8
80006ba: 705a strb r2, [r3, #1]
_msgTmp.destination = GATEWAY_ADDRESS;
80006bc: 4b18 ldr r3, [pc, #96] ; (8000720 <sendSketchInfo+0xec>)
80006be: 2200 movs r2, #0
80006c0: 709a strb r2, [r3, #2]
_msgTmp.command_echo_payload = (P_STRING << 5) + C_INTERNAL;
80006c2: 4b17 ldr r3, [pc, #92] ; (8000720 <sendSketchInfo+0xec>)
80006c4: 2203 movs r2, #3
80006c6: 711a strb r2, [r3, #4]
_msgTmp.type = I_SKETCH_VERSION;
80006c8: 4b15 ldr r3, [pc, #84] ; (8000720 <sendSketchInfo+0xec>)
80006ca: 220c movs r2, #12
80006cc: 715a strb r2, [r3, #5]
_msgTmp.version_length = (strlen(name) << 3) + V2_MYS_HEADER_PROTOCOL_VERSION;
80006ce: 687b ldr r3, [r7, #4]
80006d0: 0018 movs r0, r3
80006d2: f7ff fd19 bl 8000108 <strlen>
80006d6: 0003 movs r3, r0
80006d8: b2db uxtb r3, r3
80006da: 00db lsls r3, r3, #3
80006dc: b2db uxtb r3, r3
80006de: 3302 adds r3, #2
80006e0: b2da uxtb r2, r3
80006e2: 4b0f ldr r3, [pc, #60] ; (8000720 <sendSketchInfo+0xec>)
80006e4: 70da strb r2, [r3, #3]
strcpy((char *)_msgTmp.data, version);
80006e6: 683a ldr r2, [r7, #0]
80006e8: 4b0e ldr r3, [pc, #56] ; (8000724 <sendSketchInfo+0xf0>)
80006ea: 0011 movs r1, r2
80006ec: 0018 movs r0, r3
80006ee: f002 fc1b bl 8002f28 <strcpy>
result &= transportSend(&_msgTmp);
80006f2: 4b0b ldr r3, [pc, #44] ; (8000720 <sendSketchInfo+0xec>)
80006f4: 0018 movs r0, r3
80006f6: f000 fa29 bl 8000b4c <transportSend>
80006fa: 0003 movs r3, r0
80006fc: 001a movs r2, r3
80006fe: 210f movs r1, #15
8000700: 187b adds r3, r7, r1
8000702: 781b ldrb r3, [r3, #0]
8000704: 401a ands r2, r3
8000706: 187b adds r3, r7, r1
8000708: 1e51 subs r1, r2, #1
800070a: 418a sbcs r2, r1
800070c: 701a strb r2, [r3, #0]
}
sendLibraryInfo();
800070e: f7ff ff67 bl 80005e0 <sendLibraryInfo>
return result;
8000712: 230f movs r3, #15
8000714: 18fb adds r3, r7, r3
8000716: 781b ldrb r3, [r3, #0]
}
8000718: 0018 movs r0, r3
800071a: 46bd mov sp, r7
800071c: b004 add sp, #16
800071e: bd80 pop {r7, pc}
8000720: 200000dc .word 0x200000dc
8000724: 200000e3 .word 0x200000e3
08000728 <_processInternalCoreMessage>:
// Message delivered through _msg
_Bool _processInternalCoreMessage(void)
{
8000728: b580 push {r7, lr}
800072a: b082 sub sp, #8
800072c: af00 add r7, sp, #0
const uint8_t type = _msg.type;
800072e: 1dfb adds r3, r7, #7
8000730: 4a15 ldr r2, [pc, #84] ; (8000788 <_processInternalCoreMessage+0x60>)
8000732: 7952 ldrb r2, [r2, #5]
8000734: 701a strb r2, [r3, #0]
if (_msg.sender == GATEWAY_ADDRESS) {
8000736: 4b14 ldr r3, [pc, #80] ; (8000788 <_processInternalCoreMessage+0x60>)
8000738: 785b ldrb r3, [r3, #1]
800073a: 2b00 cmp r3, #0
800073c: d11c bne.n 8000778 <_processInternalCoreMessage+0x50>
if (type == I_PRESENTATION) {
800073e: 1dfb adds r3, r7, #7
8000740: 781b ldrb r3, [r3, #0]
8000742: 2b13 cmp r3, #19
8000744: d102 bne.n 800074c <_processInternalCoreMessage+0x24>
// Re-send node presentation to controller
present_node();
8000746: f000 fdd5 bl 80012f4 <present_node>
800074a: e017 b.n 800077c <_processInternalCoreMessage+0x54>
} else if (type == I_HEARTBEAT_REQUEST) {
800074c: 1dfb adds r3, r7, #7
800074e: 781b ldrb r3, [r3, #0]
8000750: 2b12 cmp r3, #18
8000752: d102 bne.n 800075a <_processInternalCoreMessage+0x32>
(void)sendHeartbeat();
8000754: f7ff feb2 bl 80004bc <sendHeartbeat>
8000758: e010 b.n 800077c <_processInternalCoreMessage+0x54>
} else if (type == I_REBOOT) {
800075a: 1dfb adds r3, r7, #7
800075c: 781b ldrb r3, [r3, #0]
800075e: 2b0d cmp r3, #13
8000760: d101 bne.n 8000766 <_processInternalCoreMessage+0x3e>
NVIC_SystemReset();
8000762: f7ff fe79 bl 8000458 <__NVIC_SystemReset>
} else if (type == I_VERSION) {
8000766: 1dfb adds r3, r7, #7
8000768: 781b ldrb r3, [r3, #0]
800076a: 2b02 cmp r3, #2
800076c: d102 bne.n 8000774 <_processInternalCoreMessage+0x4c>
sendLibraryInfo();
800076e: f7ff ff37 bl 80005e0 <sendLibraryInfo>
8000772: e003 b.n 800077c <_processInternalCoreMessage+0x54>
} else {
return 0; // further processing required
8000774: 2300 movs r3, #0
8000776: e002 b.n 800077e <_processInternalCoreMessage+0x56>
}
} else {
return 0; // further processing required
8000778: 2300 movs r3, #0
800077a: e000 b.n 800077e <_processInternalCoreMessage+0x56>
}
return 1; // if not GW or no further processing required
800077c: 2301 movs r3, #1
}
800077e: 0018 movs r0, r3
8000780: 46bd mov sp, r7
8000782: b002 add sp, #8
8000784: bd80 pop {r7, pc}
8000786: 46c0 nop ; (mov r8, r8)
8000788: 200000b8 .word 0x200000b8
0800078c <transportProcessMessage>:
void transportProcessMessage(void)
{
800078c: b580 push {r7, lr}
800078e: b082 sub sp, #8
8000790: af00 add r7, sp, #0
// get message length and limit size
const uint8_t msgLength = (_msg.version_length & 0xF8) >> 3;
8000792: 4b5c ldr r3, [pc, #368] ; (8000904 <transportProcessMessage+0x178>)
8000794: 78da ldrb r2, [r3, #3]
8000796: 1dfb adds r3, r7, #7
8000798: 08d2 lsrs r2, r2, #3
800079a: 701a strb r2, [r3, #0]
// calculate expected length
const uint8_t command = _msg.command_echo_payload & 0x07;
800079c: 4b59 ldr r3, [pc, #356] ; (8000904 <transportProcessMessage+0x178>)
800079e: 791a ldrb r2, [r3, #4]
80007a0: 1dbb adds r3, r7, #6
80007a2: 2107 movs r1, #7
80007a4: 400a ands r2, r1
80007a6: 701a strb r2, [r3, #0]
const uint8_t type = _msg.type;
80007a8: 1d7b adds r3, r7, #5
80007aa: 4a56 ldr r2, [pc, #344] ; (8000904 <transportProcessMessage+0x178>)
80007ac: 7952 ldrb r2, [r2, #5]
80007ae: 701a strb r2, [r3, #0]
const uint8_t sender = _msg.sender;
80007b0: 1d3b adds r3, r7, #4
80007b2: 4a54 ldr r2, [pc, #336] ; (8000904 <transportProcessMessage+0x178>)
80007b4: 7852 ldrb r2, [r2, #1]
80007b6: 701a strb r2, [r3, #0]
const uint8_t destination = _msg.destination;
80007b8: 1cfb adds r3, r7, #3
80007ba: 4a52 ldr r2, [pc, #328] ; (8000904 <transportProcessMessage+0x178>)
80007bc: 7892 ldrb r2, [r2, #2]
80007be: 701a strb r2, [r3, #0]
// Is message addressed to this node?
if (destination == MY_NODE_ID) {
80007c0: 1cfb adds r3, r7, #3
80007c2: 781b ldrb r3, [r3, #0]
80007c4: 2bc8 cmp r3, #200 ; 0xc8
80007c6: d163 bne.n 8000890 <transportProcessMessage+0x104>
// null terminate data
_msg.data[msgLength] = 0u;
80007c8: 1dfb adds r3, r7, #7
80007ca: 781b ldrb r3, [r3, #0]
80007cc: 4a4d ldr r2, [pc, #308] ; (8000904 <transportProcessMessage+0x178>)
80007ce: 18d3 adds r3, r2, r3
80007d0: 2200 movs r2, #0
80007d2: 71da strb r2, [r3, #7]
// Check if sender requests an echo.
if (_msg.command_echo_payload & 0x08) {
80007d4: 4b4b ldr r3, [pc, #300] ; (8000904 <transportProcessMessage+0x178>)
80007d6: 791b ldrb r3, [r3, #4]
80007d8: 001a movs r2, r3
80007da: 2308 movs r3, #8
80007dc: 4013 ands r3, r2
80007de: d020 beq.n 8000822 <transportProcessMessage+0x96>
memcpy(&_msgTmp, &_msg, sizeof(_msg)); // Copy message
80007e0: 4a49 ldr r2, [pc, #292] ; (8000908 <transportProcessMessage+0x17c>)
80007e2: 4b48 ldr r3, [pc, #288] ; (8000904 <transportProcessMessage+0x178>)
80007e4: 0010 movs r0, r2
80007e6: 0019 movs r1, r3
80007e8: 2321 movs r3, #33 ; 0x21
80007ea: 001a movs r2, r3
80007ec: f002 fb34 bl 8002e58 <memcpy>
// Reply without echo flag (otherwise we would end up in an eternal loop)
_msgTmp.command_echo_payload = _msgTmp.command_echo_payload & 0xE7;
80007f0: 4b45 ldr r3, [pc, #276] ; (8000908 <transportProcessMessage+0x17c>)
80007f2: 791b ldrb r3, [r3, #4]
80007f4: 2218 movs r2, #24
80007f6: 4393 bics r3, r2
80007f8: b2da uxtb r2, r3
80007fa: 4b43 ldr r3, [pc, #268] ; (8000908 <transportProcessMessage+0x17c>)
80007fc: 711a strb r2, [r3, #4]
_msgTmp.command_echo_payload = _msgTmp.command_echo_payload | 0x10;
80007fe: 4b42 ldr r3, [pc, #264] ; (8000908 <transportProcessMessage+0x17c>)
8000800: 791b ldrb r3, [r3, #4]
8000802: 2210 movs r2, #16
8000804: 4313 orrs r3, r2
8000806: b2da uxtb r2, r3
8000808: 4b3f ldr r3, [pc, #252] ; (8000908 <transportProcessMessage+0x17c>)
800080a: 711a strb r2, [r3, #4]
_msgTmp.sender = MY_NODE_ID;
800080c: 4b3e ldr r3, [pc, #248] ; (8000908 <transportProcessMessage+0x17c>)
800080e: 22c8 movs r2, #200 ; 0xc8
8000810: 705a strb r2, [r3, #1]
_msgTmp.destination = sender;
8000812: 4b3d ldr r3, [pc, #244] ; (8000908 <transportProcessMessage+0x17c>)
8000814: 1d3a adds r2, r7, #4
8000816: 7812 ldrb r2, [r2, #0]
8000818: 709a strb r2, [r3, #2]
transportSend(&_msgTmp);
800081a: 4b3b ldr r3, [pc, #236] ; (8000908 <transportProcessMessage+0x17c>)
800081c: 0018 movs r0, r3
800081e: f000 f995 bl 8000b4c <transportSend>
}
if(!(_msg.command_echo_payload & 0x10)) {
8000822: 4b38 ldr r3, [pc, #224] ; (8000904 <transportProcessMessage+0x178>)
8000824: 791b ldrb r3, [r3, #4]
8000826: 001a movs r2, r3
8000828: 2310 movs r3, #16
800082a: 4013 ands r3, r2
800082c: d12b bne.n 8000886 <transportProcessMessage+0xfa>
// only process if not ECHO
if (command == C_INTERNAL) {
800082e: 1dbb adds r3, r7, #6
8000830: 781b ldrb r3, [r3, #0]
8000832: 2b03 cmp r3, #3
8000834: d127 bne.n 8000886 <transportProcessMessage+0xfa>
if (type == I_ID_RESPONSE) {
8000836: 1d7b adds r3, r7, #5
8000838: 781b ldrb r3, [r3, #0]
800083a: 2b04 cmp r3, #4
800083c: d059 beq.n 80008f2 <transportProcessMessage+0x166>
return; // no further processing required
}
// general
if (type == I_PING) {
800083e: 1d7b adds r3, r7, #5
8000840: 781b ldrb r3, [r3, #0]
8000842: 2b18 cmp r3, #24
8000844: d117 bne.n 8000876 <transportProcessMessage+0xea>
_msgTmp.last = MY_NODE_ID;
8000846: 4b30 ldr r3, [pc, #192] ; (8000908 <transportProcessMessage+0x17c>)
8000848: 22c8 movs r2, #200 ; 0xc8
800084a: 701a strb r2, [r3, #0]
_msgTmp.sender = MY_NODE_ID;
800084c: 4b2e ldr r3, [pc, #184] ; (8000908 <transportProcessMessage+0x17c>)
800084e: 22c8 movs r2, #200 ; 0xc8
8000850: 705a strb r2, [r3, #1]
_msgTmp.destination = sender;
8000852: 4b2d ldr r3, [pc, #180] ; (8000908 <transportProcessMessage+0x17c>)
8000854: 1d3a adds r2, r7, #4
8000856: 7812 ldrb r2, [r2, #0]
8000858: 709a strb r2, [r3, #2]
_msgTmp.command_echo_payload = (P_BYTE << 5) + C_INTERNAL;
800085a: 4b2b ldr r3, [pc, #172] ; (8000908 <transportProcessMessage+0x17c>)
800085c: 2223 movs r2, #35 ; 0x23
800085e: 711a strb r2, [r3, #4]
_msgTmp.type = I_PONG;
8000860: 4b29 ldr r3, [pc, #164] ; (8000908 <transportProcessMessage+0x17c>)
8000862: 2219 movs r2, #25
8000864: 715a strb r2, [r3, #5]
_msgTmp.bValue = 1;
8000866: 4b28 ldr r3, [pc, #160] ; (8000908 <transportProcessMessage+0x17c>)
8000868: 2201 movs r2, #1
800086a: 71da strb r2, [r3, #7]
transportSend(&_msgTmp);
800086c: 4b26 ldr r3, [pc, #152] ; (8000908 <transportProcessMessage+0x17c>)
800086e: 0018 movs r0, r3
8000870: f000 f96c bl 8000b4c <transportSend>
return; // no further processing required
8000874: e042 b.n 80008fc <transportProcessMessage+0x170>
}
if (type == I_PONG) {
8000876: 1d7b adds r3, r7, #5
8000878: 781b ldrb r3, [r3, #0]
800087a: 2b19 cmp r3, #25
800087c: d03b beq.n 80008f6 <transportProcessMessage+0x16a>
return; // no further processing required
}
if (_processInternalCoreMessage()) {
800087e: f7ff ff53 bl 8000728 <_processInternalCoreMessage>
8000882: 1e03 subs r3, r0, #0
8000884: d139 bne.n 80008fa <transportProcessMessage+0x16e>
return; // no further processing required
}
}
}
// Call incoming message callback if available
receive(&_msg);
8000886: 4b1f ldr r3, [pc, #124] ; (8000904 <transportProcessMessage+0x178>)
8000888: 0018 movs r0, r3
800088a: f000 fd6f bl 800136c <receive>
800088e: e035 b.n 80008fc <transportProcessMessage+0x170>
} else if (destination == BROADCAST_ADDRESS) {
8000890: 1cfb adds r3, r7, #3
8000892: 781b ldrb r3, [r3, #0]
8000894: 2bff cmp r3, #255 ; 0xff
8000896: d131 bne.n 80008fc <transportProcessMessage+0x170>
if (command == C_INTERNAL) {
8000898: 1dbb adds r3, r7, #6
800089a: 781b ldrb r3, [r3, #0]
800089c: 2b03 cmp r3, #3
800089e: d11f bne.n 80008e0 <transportProcessMessage+0x154>
if (type == I_DISCOVER_REQUEST) {
80008a0: 1d7b adds r3, r7, #5
80008a2: 781b ldrb r3, [r3, #0]
80008a4: 2b14 cmp r3, #20
80008a6: d11b bne.n 80008e0 <transportProcessMessage+0x154>
HAL_Delay(MY_NODE_ID * 50);
80008a8: 4b18 ldr r3, [pc, #96] ; (800090c <transportProcessMessage+0x180>)
80008aa: 0018 movs r0, r3
80008ac: f000 ff08 bl 80016c0 <HAL_Delay>
_msgTmp.last = MY_NODE_ID;
80008b0: 4b15 ldr r3, [pc, #84] ; (8000908 <transportProcessMessage+0x17c>)
80008b2: 22c8 movs r2, #200 ; 0xc8
80008b4: 701a strb r2, [r3, #0]
_msgTmp.sender = MY_NODE_ID;
80008b6: 4b14 ldr r3, [pc, #80] ; (8000908 <transportProcessMessage+0x17c>)
80008b8: 22c8 movs r2, #200 ; 0xc8
80008ba: 705a strb r2, [r3, #1]
_msgTmp.destination = sender;
80008bc: 4b12 ldr r3, [pc, #72] ; (8000908 <transportProcessMessage+0x17c>)
80008be: 1d3a adds r2, r7, #4
80008c0: 7812 ldrb r2, [r2, #0]
80008c2: 709a strb r2, [r3, #2]
_msgTmp.command_echo_payload = (P_BYTE << 5) + C_INTERNAL;
80008c4: 4b10 ldr r3, [pc, #64] ; (8000908 <transportProcessMessage+0x17c>)
80008c6: 2223 movs r2, #35 ; 0x23
80008c8: 711a strb r2, [r3, #4]
_msgTmp.type = I_DISCOVER_RESPONSE;
80008ca: 4b0f ldr r3, [pc, #60] ; (8000908 <transportProcessMessage+0x17c>)
80008cc: 2215 movs r2, #21
80008ce: 715a strb r2, [r3, #5]
_msgTmp.bValue = GATEWAY_ADDRESS;
80008d0: 4b0d ldr r3, [pc, #52] ; (8000908 <transportProcessMessage+0x17c>)
80008d2: 2200 movs r2, #0
80008d4: 71da strb r2, [r3, #7]
transportSend(&_msgTmp);
80008d6: 4b0c ldr r3, [pc, #48] ; (8000908 <transportProcessMessage+0x17c>)
80008d8: 0018 movs r0, r3
80008da: f000 f937 bl 8000b4c <transportSend>
return; // no further processing required
80008de: e00d b.n 80008fc <transportProcessMessage+0x170>
}
}
if (command != C_INTERNAL) {
80008e0: 1dbb adds r3, r7, #6
80008e2: 781b ldrb r3, [r3, #0]
80008e4: 2b03 cmp r3, #3
80008e6: d009 beq.n 80008fc <transportProcessMessage+0x170>
receive(&_msg);
80008e8: 4b06 ldr r3, [pc, #24] ; (8000904 <transportProcessMessage+0x178>)
80008ea: 0018 movs r0, r3
80008ec: f000 fd3e bl 800136c <receive>
80008f0: e004 b.n 80008fc <transportProcessMessage+0x170>
return; // no further processing required
80008f2: 46c0 nop ; (mov r8, r8)
80008f4: e002 b.n 80008fc <transportProcessMessage+0x170>
return; // no further processing required
80008f6: 46c0 nop ; (mov r8, r8)
80008f8: e000 b.n 80008fc <transportProcessMessage+0x170>
return; // no further processing required
80008fa: 46c0 nop ; (mov r8, r8)
}
}
}
80008fc: 46bd mov sp, r7
80008fe: b002 add sp, #8
8000900: bd80 pop {r7, pc}
8000902: 46c0 nop ; (mov r8, r8)
8000904: 200000b8 .word 0x200000b8
8000908: 200000dc .word 0x200000dc
800090c: 00002710 .word 0x00002710
08000910 <_serialReset>:
//Reset the state machine and release the data pointer
void _serialReset()
{
8000910: b580 push {r7, lr}
8000912: af00 add r7, sp, #0
_recPhase = 0;
8000914: 4b0a ldr r3, [pc, #40] ; (8000940 <_serialReset+0x30>)
8000916: 2200 movs r2, #0
8000918: 701a strb r2, [r3, #0]
_recPos = 0;
800091a: 4b0a ldr r3, [pc, #40] ; (8000944 <_serialReset+0x34>)
800091c: 2200 movs r2, #0
800091e: 701a strb r2, [r3, #0]
_recLen = 0;
8000920: 4b09 ldr r3, [pc, #36] ; (8000948 <_serialReset+0x38>)
8000922: 2200 movs r2, #0
8000924: 701a strb r2, [r3, #0]
_recCommand = 0;
8000926: 4b09 ldr r3, [pc, #36] ; (800094c <_serialReset+0x3c>)
8000928: 2200 movs r2, #0
800092a: 701a strb r2, [r3, #0]
_recCS = 0;
800092c: 4b08 ldr r3, [pc, #32] ; (8000950 <_serialReset+0x40>)
800092e: 2200 movs r2, #0
8000930: 701a strb r2, [r3, #0]
_recCalcCS = 0;
8000932: 4b08 ldr r3, [pc, #32] ; (8000954 <_serialReset+0x44>)
8000934: 2200 movs r2, #0
8000936: 701a strb r2, [r3, #0]
}
8000938: 46c0 nop ; (mov r8, r8)
800093a: 46bd mov sp, r7
800093c: bd80 pop {r7, pc}
800093e: 46c0 nop ; (mov r8, r8)
8000940: 20000101 .word 0x20000101
8000944: 200000fd .word 0x200000fd
8000948: 200000a4 .word 0x200000a4
800094c: 20000125 .word 0x20000125
8000950: 200000d9 .word 0x200000d9
8000954: 200000da .word 0x200000da
08000958 <_serialProcess>:
// checksum matches the received checksum, AND the destination station is
// our station ID, then look for a registered command that matches the
// command code. If all the above is true, execute the command's
// function.
_Bool _serialProcess()
{
8000958: b580 push {r7, lr}
800095a: b082 sub sp, #8
800095c: af00 add r7, sp, #0
unsigned char i;
if (!_byte_received) {
800095e: 4b6a ldr r3, [pc, #424] ; (8000b08 <_serialProcess+0x1b0>)
8000960: 781b ldrb r3, [r3, #0]
8000962: 2201 movs r2, #1
8000964: 4053 eors r3, r2
8000966: b2db uxtb r3, r3
8000968: 2b00 cmp r3, #0
800096a: d001 beq.n 8000970 <_serialProcess+0x18>
return 0;
800096c: 2300 movs r3, #0
800096e: e0c7 b.n 8000b00 <_serialProcess+0x1a8>
}
_byte_received = 0;
8000970: 4b65 ldr r3, [pc, #404] ; (8000b08 <_serialProcess+0x1b0>)
8000972: 2200 movs r2, #0
8000974: 701a strb r2, [r3, #0]
switch(_recPhase) {
8000976: 4b65 ldr r3, [pc, #404] ; (8000b0c <_serialProcess+0x1b4>)
8000978: 781b ldrb r3, [r3, #0]
800097a: 2b04 cmp r3, #4
800097c: d900 bls.n 8000980 <_serialProcess+0x28>
800097e: e0be b.n 8000afe <_serialProcess+0x1a6>
8000980: 009a lsls r2, r3, #2
8000982: 4b63 ldr r3, [pc, #396] ; (8000b10 <_serialProcess+0x1b8>)
8000984: 18d3 adds r3, r2, r3
8000986: 681b ldr r3, [r3, #0]
8000988: 469f mov pc, r3
// Case 0 looks for the header. Bytes arrive in the serial interface and get
// shifted through a header buffer. When the start and end characters in
// the buffer match the SOH/STX pair, and the destination station ID matches
// our ID, save the header information and progress to the next state.
case 0:
memcpy(&_header[0],&_header[1],5);
800098a: 4962 ldr r1, [pc, #392] ; (8000b14 <_serialProcess+0x1bc>)
800098c: 4b62 ldr r3, [pc, #392] ; (8000b18 <_serialProcess+0x1c0>)
800098e: 2205 movs r2, #5
8000990: 0018 movs r0, r3
8000992: f002 fa61 bl 8002e58 <memcpy>
_header[5] = _byte;
8000996: 4b61 ldr r3, [pc, #388] ; (8000b1c <_serialProcess+0x1c4>)
8000998: 781a ldrb r2, [r3, #0]
800099a: 4b5f ldr r3, [pc, #380] ; (8000b18 <_serialProcess+0x1c0>)
800099c: 715a strb r2, [r3, #5]
if ((_header[0] == SOH) && (_header[5] == STX) && (_header[1] != _header[2])) {
800099e: 4b5e ldr r3, [pc, #376] ; (8000b18 <_serialProcess+0x1c0>)
80009a0: 781b ldrb r3, [r3, #0]
80009a2: 2b01 cmp r3, #1
80009a4: d000 beq.n 80009a8 <_serialProcess+0x50>
80009a6: e0a7 b.n 8000af8 <_serialProcess+0x1a0>
80009a8: 4b5b ldr r3, [pc, #364] ; (8000b18 <_serialProcess+0x1c0>)
80009aa: 795b ldrb r3, [r3, #5]
80009ac: 2b02 cmp r3, #2
80009ae: d000 beq.n 80009b2 <_serialProcess+0x5a>
80009b0: e0a2 b.n 8000af8 <_serialProcess+0x1a0>
80009b2: 4b59 ldr r3, [pc, #356] ; (8000b18 <_serialProcess+0x1c0>)
80009b4: 785a ldrb r2, [r3, #1]
80009b6: 4b58 ldr r3, [pc, #352] ; (8000b18 <_serialProcess+0x1c0>)
80009b8: 789b ldrb r3, [r3, #2]
80009ba: 429a cmp r2, r3
80009bc: d100 bne.n 80009c0 <_serialProcess+0x68>
80009be: e09b b.n 8000af8 <_serialProcess+0x1a0>
_recCalcCS = 0;
80009c0: 4b57 ldr r3, [pc, #348] ; (8000b20 <_serialProcess+0x1c8>)
80009c2: 2200 movs r2, #0
80009c4: 701a strb r2, [r3, #0]
_recStation = _header[1];
80009c6: 4b54 ldr r3, [pc, #336] ; (8000b18 <_serialProcess+0x1c0>)
80009c8: 785a ldrb r2, [r3, #1]
80009ca: 4b56 ldr r3, [pc, #344] ; (8000b24 <_serialProcess+0x1cc>)
80009cc: 701a strb r2, [r3, #0]
_recSender = _header[2];
80009ce: 4b52 ldr r3, [pc, #328] ; (8000b18 <_serialProcess+0x1c0>)
80009d0: 789a ldrb r2, [r3, #2]
80009d2: 4b55 ldr r3, [pc, #340] ; (8000b28 <_serialProcess+0x1d0>)
80009d4: 701a strb r2, [r3, #0]
_recCommand = _header[3];
80009d6: 4b50 ldr r3, [pc, #320] ; (8000b18 <_serialProcess+0x1c0>)
80009d8: 78da ldrb r2, [r3, #3]
80009da: 4b54 ldr r3, [pc, #336] ; (8000b2c <_serialProcess+0x1d4>)
80009dc: 701a strb r2, [r3, #0]
_recLen = _header[4];
80009de: 4b4e ldr r3, [pc, #312] ; (8000b18 <_serialProcess+0x1c0>)
80009e0: 791a ldrb r2, [r3, #4]
80009e2: 4b53 ldr r3, [pc, #332] ; (8000b30 <_serialProcess+0x1d8>)
80009e4: 701a strb r2, [r3, #0]
for (i=1; i<=4; i++) {
80009e6: 1dfb adds r3, r7, #7
80009e8: 2201 movs r2, #1
80009ea: 701a strb r2, [r3, #0]
80009ec: e00e b.n 8000a0c <_serialProcess+0xb4>
_recCalcCS += _header[i];
80009ee: 1dfb adds r3, r7, #7
80009f0: 781b ldrb r3, [r3, #0]
80009f2: 4a49 ldr r2, [pc, #292] ; (8000b18 <_serialProcess+0x1c0>)
80009f4: 5cd2 ldrb r2, [r2, r3]
80009f6: 4b4a ldr r3, [pc, #296] ; (8000b20 <_serialProcess+0x1c8>)
80009f8: 781b ldrb r3, [r3, #0]
80009fa: 18d3 adds r3, r2, r3
80009fc: b2da uxtb r2, r3
80009fe: 4b48 ldr r3, [pc, #288] ; (8000b20 <_serialProcess+0x1c8>)
8000a00: 701a strb r2, [r3, #0]
for (i=1; i<=4; i++) {
8000a02: 1dfb adds r3, r7, #7
8000a04: 781a ldrb r2, [r3, #0]
8000a06: 1dfb adds r3, r7, #7
8000a08: 3201 adds r2, #1
8000a0a: 701a strb r2, [r3, #0]
8000a0c: 1dfb adds r3, r7, #7
8000a0e: 781b ldrb r3, [r3, #0]
8000a10: 2b04 cmp r3, #4
8000a12: d9ec bls.n 80009ee <_serialProcess+0x96>
}
_recPhase = 1;
8000a14: 4b3d ldr r3, [pc, #244] ; (8000b0c <_serialProcess+0x1b4>)
8000a16: 2201 movs r2, #1
8000a18: 701a strb r2, [r3, #0]
_recPos = 0;
8000a1a: 4b46 ldr r3, [pc, #280] ; (8000b34 <_serialProcess+0x1dc>)
8000a1c: 2200 movs r2, #0
8000a1e: 701a strb r2, [r3, #0]
//Avoid _data[] overflow
if (_recLen >= MY_RS485_MAX_MESSAGE_LENGTH) {
8000a20: 4b43 ldr r3, [pc, #268] ; (8000b30 <_serialProcess+0x1d8>)
8000a22: 781b ldrb r3, [r3, #0]
8000a24: 2b1f cmp r3, #31
8000a26: d902 bls.n 8000a2e <_serialProcess+0xd6>
_serialReset();
8000a28: f7ff ff72 bl 8000910 <_serialReset>
break;
8000a2c: e067 b.n 8000afe <_serialProcess+0x1a6>
}
//Check if we should process this message
//We reject the message if we are the sender
//We reject if we are not the receiver and message is not a broadcast
if ((_recSender == MY_NODE_ID) ||
8000a2e: 4b3e ldr r3, [pc, #248] ; (8000b28 <_serialProcess+0x1d0>)
8000a30: 781b ldrb r3, [r3, #0]
8000a32: 2bc8 cmp r3, #200 ; 0xc8
8000a34: d007 beq.n 8000a46 <_serialProcess+0xee>
(_recStation != MY_NODE_ID &&
8000a36: 4b3b ldr r3, [pc, #236] ; (8000b24 <_serialProcess+0x1cc>)
8000a38: 781b ldrb r3, [r3, #0]
if ((_recSender == MY_NODE_ID) ||
8000a3a: 2bc8 cmp r3, #200 ; 0xc8
8000a3c: d006 beq.n 8000a4c <_serialProcess+0xf4>
_recStation != BROADCAST_ADDRESS)) {
8000a3e: 4b39 ldr r3, [pc, #228] ; (8000b24 <_serialProcess+0x1cc>)
8000a40: 781b ldrb r3, [r3, #0]
(_recStation != MY_NODE_ID &&
8000a42: 2bff cmp r3, #255 ; 0xff
8000a44: d002 beq.n 8000a4c <_serialProcess+0xf4>
_serialReset();
8000a46: f7ff ff63 bl 8000910 <_serialReset>
break;
8000a4a: e058 b.n 8000afe <_serialProcess+0x1a6>
}
if (_recLen == 0) {
8000a4c: 4b38 ldr r3, [pc, #224] ; (8000b30 <_serialProcess+0x1d8>)
8000a4e: 781b ldrb r3, [r3, #0]
8000a50: 2b00 cmp r3, #0
8000a52: d151 bne.n 8000af8 <_serialProcess+0x1a0>
_recPhase = 2;
8000a54: 4b2d ldr r3, [pc, #180] ; (8000b0c <_serialProcess+0x1b4>)
8000a56: 2202 movs r2, #2
8000a58: 701a strb r2, [r3, #0]
}
}
break;
8000a5a: e04d b.n 8000af8 <_serialProcess+0x1a0>
// Case 1 receives the data portion of the packet. Read in "_recLen" number
// of bytes and store them in the _data array.
case 1:
_data[_recPos++] = _byte;
8000a5c: 4b35 ldr r3, [pc, #212] ; (8000b34 <_serialProcess+0x1dc>)
8000a5e: 781b ldrb r3, [r3, #0]
8000a60: 1c5a adds r2, r3, #1
8000a62: b2d1 uxtb r1, r2
8000a64: 4a33 ldr r2, [pc, #204] ; (8000b34 <_serialProcess+0x1dc>)
8000a66: 7011 strb r1, [r2, #0]
8000a68: 001a movs r2, r3
8000a6a: 4b2c ldr r3, [pc, #176] ; (8000b1c <_serialProcess+0x1c4>)
8000a6c: 7819 ldrb r1, [r3, #0]
8000a6e: 4b32 ldr r3, [pc, #200] ; (8000b38 <_serialProcess+0x1e0>)
8000a70: 5499 strb r1, [r3, r2]
_recCalcCS += _byte;
8000a72: 4b2b ldr r3, [pc, #172] ; (8000b20 <_serialProcess+0x1c8>)
8000a74: 781a ldrb r2, [r3, #0]
8000a76: 4b29 ldr r3, [pc, #164] ; (8000b1c <_serialProcess+0x1c4>)
8000a78: 781b ldrb r3, [r3, #0]
8000a7a: 18d3 adds r3, r2, r3
8000a7c: b2da uxtb r2, r3
8000a7e: 4b28 ldr r3, [pc, #160] ; (8000b20 <_serialProcess+0x1c8>)
8000a80: 701a strb r2, [r3, #0]
if (_recPos == _recLen) {
8000a82: 4b2c ldr r3, [pc, #176] ; (8000b34 <_serialProcess+0x1dc>)
8000a84: 781a ldrb r2, [r3, #0]
8000a86: 4b2a ldr r3, [pc, #168] ; (8000b30 <_serialProcess+0x1d8>)
8000a88: 781b ldrb r3, [r3, #0]
8000a8a: 429a cmp r2, r3
8000a8c: d136 bne.n 8000afc <_serialProcess+0x1a4>
_recPhase = 2;
8000a8e: 4b1f ldr r3, [pc, #124] ; (8000b0c <_serialProcess+0x1b4>)
8000a90: 2202 movs r2, #2
8000a92: 701a strb r2, [r3, #0]
}
break;
8000a94: e032 b.n 8000afc <_serialProcess+0x1a4>
// After the data comes a single ETX character. Do we have it? If not,
// reset the state machine to default and start looking for a new header.
case 2:
// Packet properly terminated?
if (_byte == ETX) {
8000a96: 4b21 ldr r3, [pc, #132] ; (8000b1c <_serialProcess+0x1c4>)
8000a98: 781b ldrb r3, [r3, #0]
8000a9a: 2b03 cmp r3, #3
8000a9c: d103 bne.n 8000aa6 <_serialProcess+0x14e>
_recPhase = 3;
8000a9e: 4b1b ldr r3, [pc, #108] ; (8000b0c <_serialProcess+0x1b4>)
8000aa0: 2203 movs r2, #3
8000aa2: 701a strb r2, [r3, #0]
} else {
_serialReset();
}
break;
8000aa4: e02b b.n 8000afe <_serialProcess+0x1a6>
_serialReset();
8000aa6: f7ff ff33 bl 8000910 <_serialReset>
break;
8000aaa: e028 b.n 8000afe <_serialProcess+0x1a6>
// Next comes the checksum. We have already calculated it from the incoming
// data, so just store the incoming checksum byte for later.
case 3:
_recCS = _byte;
8000aac: 4b1b ldr r3, [pc, #108] ; (8000b1c <_serialProcess+0x1c4>)
8000aae: 781a ldrb r2, [r3, #0]
8000ab0: 4b22 ldr r3, [pc, #136] ; (8000b3c <_serialProcess+0x1e4>)
8000ab2: 701a strb r2, [r3, #0]
_recPhase = 4;
8000ab4: 4b15 ldr r3, [pc, #84] ; (8000b0c <_serialProcess+0x1b4>)
8000ab6: 2204 movs r2, #4
8000ab8: 701a strb r2, [r3, #0]
break;
8000aba: e020 b.n 8000afe <_serialProcess+0x1a6>
// The final state - check the last character is EOT and that the checksum matches.
// If that test passes, then look for a valid command callback to execute.
// Execute it if found.
case 4:
if (_byte == EOT) {
8000abc: 4b17 ldr r3, [pc, #92] ; (8000b1c <_serialProcess+0x1c4>)
8000abe: 781b ldrb r3, [r3, #0]
8000ac0: 2b04 cmp r3, #4
8000ac2: d115 bne.n 8000af0 <_serialProcess+0x198>
if (_recCS == _recCalcCS) {
8000ac4: 4b1d ldr r3, [pc, #116] ; (8000b3c <_serialProcess+0x1e4>)
8000ac6: 781a ldrb r2, [r3, #0]
8000ac8: 4b15 ldr r3, [pc, #84] ; (8000b20 <_serialProcess+0x1c8>)
8000aca: 781b ldrb r3, [r3, #0]
8000acc: 429a cmp r2, r3
8000ace: d10f bne.n 8000af0 <_serialProcess+0x198>
// First, check for system level commands. It is possible
// to register your own callback as well for system level
// commands which will be called after the system default
// hook.
switch (_recCommand) {
8000ad0: 4b16 ldr r3, [pc, #88] ; (8000b2c <_serialProcess+0x1d4>)
8000ad2: 781b ldrb r3, [r3, #0]
8000ad4: 2b58 cmp r3, #88 ; 0x58
8000ad6: d10b bne.n 8000af0 <_serialProcess+0x198>
case ICSC_SYS_PACK:
_packet_from = _recSender;
8000ad8: 4b13 ldr r3, [pc, #76] ; (8000b28 <_serialProcess+0x1d0>)
8000ada: 781a ldrb r2, [r3, #0]
8000adc: 4b18 ldr r3, [pc, #96] ; (8000b40 <_serialProcess+0x1e8>)
8000ade: 701a strb r2, [r3, #0]
_packet_len = _recLen;
8000ae0: 4b13 ldr r3, [pc, #76] ; (8000b30 <_serialProcess+0x1d8>)
8000ae2: 781a ldrb r2, [r3, #0]
8000ae4: 4b17 ldr r3, [pc, #92] ; (8000b44 <_serialProcess+0x1ec>)
8000ae6: 701a strb r2, [r3, #0]
_packet_received = 1;
8000ae8: 4b17 ldr r3, [pc, #92] ; (8000b48 <_serialProcess+0x1f0>)
8000aea: 2201 movs r2, #1
8000aec: 701a strb r2, [r3, #0]
break;
8000aee: 46c0 nop ; (mov r8, r8)
}
}
}
//Clear the data
_serialReset();
8000af0: f7ff ff0e bl 8000910 <_serialReset>
//Return true, we have processed one command
return 1;
8000af4: 2301 movs r3, #1
8000af6: e003 b.n 8000b00 <_serialProcess+0x1a8>
break;
8000af8: 46c0 nop ; (mov r8, r8)
8000afa: e000 b.n 8000afe <_serialProcess+0x1a6>
break;
8000afc: 46c0 nop ; (mov r8, r8)
break;
}
return 1;
8000afe: 2301 movs r3, #1
}
8000b00: 0018 movs r0, r3
8000b02: 46bd mov sp, r7
8000b04: b002 add sp, #8
8000b06: bd80 pop {r7, pc}
8000b08: 200000b0 .word 0x200000b0
8000b0c: 20000101 .word 0x20000101
8000b10: 080030c0 .word 0x080030c0
8000b14: 200000a9 .word 0x200000a9
8000b18: 200000a8 .word 0x200000a8
8000b1c: 20000124 .word 0x20000124
8000b20: 200000da .word 0x200000da
8000b24: 200000af .word 0x200000af
8000b28: 20000100 .word 0x20000100
8000b2c: 20000125 .word 0x20000125
8000b30: 200000a4 .word 0x200000a4
8000b34: 200000fd .word 0x200000fd
8000b38: 20000104 .word 0x20000104
8000b3c: 200000d9 .word 0x200000d9
8000b40: 200000ff .word 0x200000ff
8000b44: 200000ae .word 0x200000ae
8000b48: 200000fe .word 0x200000fe
08000b4c <transportSend>:
_Bool transportSend(MyMessage* data)
{
8000b4c: b5f0 push {r4, r5, r6, r7, lr}
8000b4e: b087 sub sp, #28
8000b50: af00 add r7, sp, #0
8000b52: 6078 str r0, [r7, #4]
const char *datap = (const char *)data;
8000b54: 687b ldr r3, [r7, #4]
8000b56: 613b str r3, [r7, #16]
unsigned char i;
unsigned char len;
unsigned char cs = 0;
8000b58: 230c movs r3, #12
8000b5a: 18fb adds r3, r7, r3
8000b5c: 2200 movs r2, #0
8000b5e: 701a strb r2, [r3, #0]
// This is how many times to try and transmit before failing.
unsigned char timeout = 10;
8000b60: 2317 movs r3, #23
8000b62: 18fb adds r3, r7, r3
8000b64: 220a movs r2, #10
8000b66: 701a strb r2, [r3, #0]
// Let's start out by looking for a collision. If there has been anything seen in
// the last millisecond, then wait for a random time and check again.
while (_serialProcess()) {
8000b68: e030 b.n 8000bcc <transportSend+0x80>
unsigned char del;
del = rand() % 20;
8000b6a: f002 f9ab bl 8002ec4 <rand>
8000b6e: 0003 movs r3, r0
8000b70: 2114 movs r1, #20
8000b72: 0018 movs r0, r3
8000b74: f7ff fc40 bl 80003f8 <__aeabi_idivmod>
8000b78: 000b movs r3, r1
8000b7a: 001a movs r2, r3
8000b7c: 230f movs r3, #15
8000b7e: 18fb adds r3, r7, r3
8000b80: 701a strb r2, [r3, #0]
for (i = 0; i < del; i++) {
8000b82: 230e movs r3, #14
8000b84: 18fb adds r3, r7, r3
8000b86: 2200 movs r2, #0
8000b88: 701a strb r2, [r3, #0]
8000b8a: e00b b.n 8000ba4 <transportSend+0x58>
HAL_Delay(1);
8000b8c: 2001 movs r0, #1
8000b8e: f000 fd97 bl 80016c0 <HAL_Delay>
_serialProcess();
8000b92: f7ff fee1 bl 8000958 <_serialProcess>
for (i = 0; i < del; i++) {
8000b96: 210e movs r1, #14
8000b98: 187b adds r3, r7, r1
8000b9a: 781b ldrb r3, [r3, #0]
8000b9c: 3301 adds r3, #1
8000b9e: b2da uxtb r2, r3
8000ba0: 187b adds r3, r7, r1
8000ba2: 701a strb r2, [r3, #0]
8000ba4: 230e movs r3, #14
8000ba6: 18fb adds r3, r7, r3
8000ba8: 781b ldrb r3, [r3, #0]
8000baa: 220f movs r2, #15
8000bac: 18ba adds r2, r7, r2
8000bae: 7812 ldrb r2, [r2, #0]
8000bb0: 429a cmp r2, r3
8000bb2: d8eb bhi.n 8000b8c <transportSend+0x40>
}
timeout--;
8000bb4: 2117 movs r1, #23
8000bb6: 187b adds r3, r7, r1
8000bb8: 781a ldrb r2, [r3, #0]
8000bba: 187b adds r3, r7, r1
8000bbc: 3a01 subs r2, #1
8000bbe: 701a strb r2, [r3, #0]
if (timeout == 0) {
8000bc0: 187b adds r3, r7, r1
8000bc2: 781b ldrb r3, [r3, #0]
8000bc4: 2b00 cmp r3, #0
8000bc6: d101 bne.n 8000bcc <transportSend+0x80>
// Failed to transmit!!!
return 0;
8000bc8: 2300 movs r3, #0
8000bca: e0cc b.n 8000d66 <transportSend+0x21a>
while (_serialProcess()) {
8000bcc: f7ff fec4 bl 8000958 <_serialProcess>
8000bd0: 1e03 subs r3, r0, #0
8000bd2: d1ca bne.n 8000b6a <transportSend+0x1e>
}
}
HAL_GPIO_WritePin(TEN_GPIO_Port, TEN_Pin, SET);
8000bd4: 2390 movs r3, #144 ; 0x90
8000bd6: 05db lsls r3, r3, #23
8000bd8: 2201 movs r2, #1
8000bda: 2120 movs r1, #32
8000bdc: 0018 movs r0, r3
8000bde: f000 fffc bl 8001bda <HAL_GPIO_WritePin>
// Start of header by writing multiple SOH
i = SOH;
8000be2: 230e movs r3, #14
8000be4: 18fb adds r3, r7, r3
8000be6: 2201 movs r2, #1
8000be8: 701a strb r2, [r3, #0]
for(uint8_t w=0; w<MY_RS485_SOH_COUNT; w++) {
8000bea: 2316 movs r3, #22
8000bec: 18fb adds r3, r7, r3
8000bee: 2200 movs r2, #0
8000bf0: 701a strb r2, [r3, #0]
8000bf2: e00d b.n 8000c10 <transportSend+0xc4>
HAL_UART_Transmit(_huart, (uint8_t*)&i, 1, 20);
8000bf4: 4b5e ldr r3, [pc, #376] ; (8000d70 <transportSend+0x224>)
8000bf6: 6818 ldr r0, [r3, #0]
8000bf8: 230e movs r3, #14
8000bfa: 18f9 adds r1, r7, r3
8000bfc: 2314 movs r3, #20
8000bfe: 2201 movs r2, #1
8000c00: f001 fdb4 bl 800276c <HAL_UART_Transmit>
for(uint8_t w=0; w<MY_RS485_SOH_COUNT; w++) {
8000c04: 2116 movs r1, #22
8000c06: 187b adds r3, r7, r1
8000c08: 781a ldrb r2, [r3, #0]
8000c0a: 187b adds r3, r7, r1
8000c0c: 3201 adds r2, #1
8000c0e: 701a strb r2, [r3, #0]
8000c10: 2316 movs r3, #22
8000c12: 18fb adds r3, r7, r3
8000c14: 781b ldrb r3, [r3, #0]
8000c16: 2b00 cmp r3, #0
8000c18: d0ec beq.n 8000bf4 <transportSend+0xa8>
}
HAL_UART_Transmit(_huart, (uint8_t*)&data->destination, 1, 20);
8000c1a: 4b55 ldr r3, [pc, #340] ; (8000d70 <transportSend+0x224>)
8000c1c: 6818 ldr r0, [r3, #0]
8000c1e: 687b ldr r3, [r7, #4]
8000c20: 1c99 adds r1, r3, #2
8000c22: 2314 movs r3, #20
8000c24: 2201 movs r2, #1
8000c26: f001 fda1 bl 800276c <HAL_UART_Transmit>
cs += data->destination;
8000c2a: 687b ldr r3, [r7, #4]
8000c2c: 789a ldrb r2, [r3, #2]
8000c2e: 240c movs r4, #12
8000c30: 193b adds r3, r7, r4
8000c32: 781b ldrb r3, [r3, #0]
8000c34: 18d3 adds r3, r2, r3
8000c36: b2da uxtb r2, r3
8000c38: 193b adds r3, r7, r4
8000c3a: 701a strb r2, [r3, #0]
i = MY_NODE_ID;
8000c3c: 250e movs r5, #14
8000c3e: 197b adds r3, r7, r5
8000c40: 22c8 movs r2, #200 ; 0xc8
8000c42: 701a strb r2, [r3, #0]
HAL_UART_Transmit(_huart, (uint8_t*)&i, 1, 20);
8000c44: 4b4a ldr r3, [pc, #296] ; (8000d70 <transportSend+0x224>)
8000c46: 6818 ldr r0, [r3, #0]
8000c48: 1979 adds r1, r7, r5
8000c4a: 2314 movs r3, #20
8000c4c: 2201 movs r2, #1
8000c4e: f001 fd8d bl 800276c <HAL_UART_Transmit>
cs += MY_NODE_ID;
8000c52: 193b adds r3, r7, r4
8000c54: 781b ldrb r3, [r3, #0]
8000c56: 3b38 subs r3, #56 ; 0x38
8000c58: b2da uxtb r2, r3
8000c5a: 193b adds r3, r7, r4
8000c5c: 701a strb r2, [r3, #0]
i = ICSC_SYS_PACK; // Command code
8000c5e: 197b adds r3, r7, r5
8000c60: 2258 movs r2, #88 ; 0x58
8000c62: 701a strb r2, [r3, #0]
HAL_UART_Transmit(_huart, (uint8_t*)&i, 1, 20);
8000c64: 4b42 ldr r3, [pc, #264] ; (8000d70 <transportSend+0x224>)
8000c66: 6818 ldr r0, [r3, #0]
8000c68: 1979 adds r1, r7, r5
8000c6a: 2314 movs r3, #20
8000c6c: 2201 movs r2, #1
8000c6e: f001 fd7d bl 800276c <HAL_UART_Transmit>
cs += ICSC_SYS_PACK;
8000c72: 193b adds r3, r7, r4
8000c74: 781b ldrb r3, [r3, #0]
8000c76: 3358 adds r3, #88 ; 0x58
8000c78: b2da uxtb r2, r3
8000c7a: 193b adds r3, r7, r4
8000c7c: 701a strb r2, [r3, #0]
len = (data->version_length >> 3) + V2_MYS_HEADER_SIZE;
8000c7e: 687b ldr r3, [r7, #4]
8000c80: 78db ldrb r3, [r3, #3]
8000c82: 08db lsrs r3, r3, #3
8000c84: b2db uxtb r3, r3
8000c86: 3307 adds r3, #7
8000c88: b2da uxtb r2, r3
8000c8a: 260d movs r6, #13
8000c8c: 19bb adds r3, r7, r6
8000c8e: 701a strb r2, [r3, #0]
HAL_UART_Transmit(_huart, (uint8_t*)&len, 1, 20);
8000c90: 4b37 ldr r3, [pc, #220] ; (8000d70 <transportSend+0x224>)
8000c92: 6818 ldr r0, [r3, #0]
8000c94: 19b9 adds r1, r7, r6
8000c96: 2314 movs r3, #20
8000c98: 2201 movs r2, #1
8000c9a: f001 fd67 bl 800276c <HAL_UART_Transmit>
cs += len;
8000c9e: 193b adds r3, r7, r4
8000ca0: 781a ldrb r2, [r3, #0]
8000ca2: 19bb adds r3, r7, r6
8000ca4: 781b ldrb r3, [r3, #0]
8000ca6: 18d3 adds r3, r2, r3
8000ca8: b2da uxtb r2, r3
8000caa: 193b adds r3, r7, r4
8000cac: 701a strb r2, [r3, #0]
i = STX;
8000cae: 197b adds r3, r7, r5
8000cb0: 2202 movs r2, #2
8000cb2: 701a strb r2, [r3, #0]
HAL_UART_Transmit(_huart, (uint8_t*)&i, 1, 20);
8000cb4: 4b2e ldr r3, [pc, #184] ; (8000d70 <transportSend+0x224>)
8000cb6: 6818 ldr r0, [r3, #0]
8000cb8: 1979 adds r1, r7, r5
8000cba: 2314 movs r3, #20
8000cbc: 2201 movs r2, #1
8000cbe: f001 fd55 bl 800276c <HAL_UART_Transmit>
HAL_UART_Transmit(_huart, (uint8_t*)datap, len, len + 20);
8000cc2: 4b2b ldr r3, [pc, #172] ; (8000d70 <transportSend+0x224>)
8000cc4: 6818 ldr r0, [r3, #0]
8000cc6: 19bb adds r3, r7, r6
8000cc8: 781b ldrb r3, [r3, #0]
8000cca: b29a uxth r2, r3
8000ccc: 19bb adds r3, r7, r6
8000cce: 781b ldrb r3, [r3, #0]
8000cd0: 3314 adds r3, #20
8000cd2: 6939 ldr r1, [r7, #16]
8000cd4: f001 fd4a bl 800276c <HAL_UART_Transmit>
for(i=0; i<len; i++) {
8000cd8: 197b adds r3, r7, r5
8000cda: 2200 movs r2, #0
8000cdc: 701a strb r2, [r3, #0]
8000cde: e013 b.n 8000d08 <transportSend+0x1bc>
cs += datap[i];
8000ce0: 210e movs r1, #14
8000ce2: 187b adds r3, r7, r1
8000ce4: 781b ldrb r3, [r3, #0]
8000ce6: 001a movs r2, r3
8000ce8: 693b ldr r3, [r7, #16]
8000cea: 189b adds r3, r3, r2
8000cec: 781a ldrb r2, [r3, #0]
8000cee: 200c movs r0, #12
8000cf0: 183b adds r3, r7, r0
8000cf2: 781b ldrb r3, [r3, #0]
8000cf4: 18d3 adds r3, r2, r3
8000cf6: b2da uxtb r2, r3
8000cf8: 183b adds r3, r7, r0
8000cfa: 701a strb r2, [r3, #0]
for(i=0; i<len; i++) {
8000cfc: 187b adds r3, r7, r1
8000cfe: 781b ldrb r3, [r3, #0]
8000d00: 3301 adds r3, #1
8000d02: b2da uxtb r2, r3
8000d04: 187b adds r3, r7, r1
8000d06: 701a strb r2, [r3, #0]
8000d08: 230e movs r3, #14
8000d0a: 18fb adds r3, r7, r3
8000d0c: 781a ldrb r2, [r3, #0]
8000d0e: 230d movs r3, #13
8000d10: 18fb adds r3, r7, r3
8000d12: 781b ldrb r3, [r3, #0]
8000d14: 429a cmp r2, r3
8000d16: d3e3 bcc.n 8000ce0 <transportSend+0x194>
}
i = ETX;
8000d18: 210e movs r1, #14
8000d1a: 187b adds r3, r7, r1
8000d1c: 2203 movs r2, #3
8000d1e: 701a strb r2, [r3, #0]
HAL_UART_Transmit(_huart, (uint8_t*)&i, 1, 20);
8000d20: 4b13 ldr r3, [pc, #76] ; (8000d70 <transportSend+0x224>)
8000d22: 6818 ldr r0, [r3, #0]
8000d24: 000c movs r4, r1
8000d26: 1879 adds r1, r7, r1
8000d28: 2314 movs r3, #20
8000d2a: 2201 movs r2, #1
8000d2c: f001 fd1e bl 800276c <HAL_UART_Transmit>
HAL_UART_Transmit(_huart, (uint8_t*)&cs, 1, 20);
8000d30: 4b0f ldr r3, [pc, #60] ; (8000d70 <transportSend+0x224>)
8000d32: 6818 ldr r0, [r3, #0]
8000d34: 230c movs r3, #12
8000d36: 18f9 adds r1, r7, r3
8000d38: 2314 movs r3, #20
8000d3a: 2201 movs r2, #1
8000d3c: f001 fd16 bl 800276c <HAL_UART_Transmit>
i = EOT;
8000d40: 0021 movs r1, r4
8000d42: 187b adds r3, r7, r1
8000d44: 2204 movs r2, #4
8000d46: 701a strb r2, [r3, #0]
HAL_UART_Transmit(_huart, (uint8_t*)&i, 1, 20);
8000d48: 4b09 ldr r3, [pc, #36] ; (8000d70 <transportSend+0x224>)
8000d4a: 6818 ldr r0, [r3, #0]
8000d4c: 1879 adds r1, r7, r1
8000d4e: 2314 movs r3, #20
8000d50: 2201 movs r2, #1
8000d52: f001 fd0b bl 800276c <HAL_UART_Transmit>
HAL_GPIO_WritePin(TEN_GPIO_Port, TEN_Pin, RESET);
8000d56: 2390 movs r3, #144 ; 0x90
8000d58: 05db lsls r3, r3, #23
8000d5a: 2200 movs r2, #0
8000d5c: 2120 movs r1, #32
8000d5e: 0018 movs r0, r3
8000d60: f000 ff3b bl 8001bda <HAL_GPIO_WritePin>
return 1;
8000d64: 2301 movs r3, #1
}
8000d66: 0018 movs r0, r3
8000d68: 46bd mov sp, r7
8000d6a: b007 add sp, #28
8000d6c: bdf0 pop {r4, r5, r6, r7, pc}
8000d6e: 46c0 nop ; (mov r8, r8)
8000d70: 200000b4 .word 0x200000b4
08000d74 <transportInitialise>:
void transportInitialise(UART_HandleTypeDef *huart)
{
8000d74: b580 push {r7, lr}
8000d76: b082 sub sp, #8
8000d78: af00 add r7, sp, #0
8000d7a: 6078 str r0, [r7, #4]
_huart = huart;
8000d7c: 4b0d ldr r3, [pc, #52] ; (8000db4 <transportInitialise+0x40>)
8000d7e: 687a ldr r2, [r7, #4]
8000d80: 601a str r2, [r3, #0]
HAL_GPIO_WritePin(TEN_GPIO_Port, TEN_Pin, RESET);
8000d82: 2390 movs r3, #144 ; 0x90
8000d84: 05db lsls r3, r3, #23
8000d86: 2200 movs r2, #0
8000d88: 2120 movs r1, #32
8000d8a: 0018 movs r0, r3
8000d8c: f000 ff25 bl 8001bda <HAL_GPIO_WritePin>
_serialReset();
8000d90: f7ff fdbe bl 8000910 <_serialReset>
_byte_received = 0;
8000d94: 4b08 ldr r3, [pc, #32] ; (8000db8 <transportInitialise+0x44>)
8000d96: 2200 movs r2, #0
8000d98: 701a strb r2, [r3, #0]
srand(MY_NODE_ID);
8000d9a: 20c8 movs r0, #200 ; 0xc8
8000d9c: f002 f86e bl 8002e7c <srand>
HAL_Delay(MY_NODE_ID * 50);
8000da0: 4b06 ldr r3, [pc, #24] ; (8000dbc <transportInitialise+0x48>)
8000da2: 0018 movs r0, r3
8000da4: f000 fc8c bl 80016c0 <HAL_Delay>
present_node();
8000da8: f000 faa4 bl 80012f4 <present_node>
}
8000dac: 46c0 nop ; (mov r8, r8)
8000dae: 46bd mov sp, r7
8000db0: b002 add sp, #8
8000db2: bd80 pop {r7, pc}
8000db4: 200000b4 .word 0x200000b4
8000db8: 200000b0 .word 0x200000b0
8000dbc: 00002710 .word 0x00002710
08000dc0 <transportProcess>:
void transportProcess(void)
{
8000dc0: b580 push {r7, lr}
8000dc2: af00 add r7, sp, #0
_serialProcess();
8000dc4: f7ff fdc8 bl 8000958 <_serialProcess>
if (transportReceive(&_msg))
8000dc8: 4b05 ldr r3, [pc, #20] ; (8000de0 <transportProcess+0x20>)
8000dca: 0018 movs r0, r3
8000dcc: f000 f80a bl 8000de4 <transportReceive>
8000dd0: 1e03 subs r3, r0, #0
8000dd2: d001 beq.n 8000dd8 <transportProcess+0x18>
transportProcessMessage();
8000dd4: f7ff fcda bl 800078c <transportProcessMessage>
}
8000dd8: 46c0 nop ; (mov r8, r8)
8000dda: 46bd mov sp, r7
8000ddc: bd80 pop {r7, pc}
8000dde: 46c0 nop ; (mov r8, r8)
8000de0: 200000b8 .word 0x200000b8
08000de4 <transportReceive>:
uint8_t transportReceive(void* data)
{
8000de4: b580 push {r7, lr}
8000de6: b082 sub sp, #8
8000de8: af00 add r7, sp, #0
8000dea: 6078 str r0, [r7, #4]
if (_packet_received) {
8000dec: 4b0b ldr r3, [pc, #44] ; (8000e1c <transportReceive+0x38>)
8000dee: 781b ldrb r3, [r3, #0]
8000df0: 2b00 cmp r3, #0
8000df2: d00d beq.n 8000e10 <transportReceive+0x2c>
memcpy(data,_data,_packet_len);
8000df4: 4b0a ldr r3, [pc, #40] ; (8000e20 <transportReceive+0x3c>)
8000df6: 781b ldrb r3, [r3, #0]
8000df8: 001a movs r2, r3
8000dfa: 490a ldr r1, [pc, #40] ; (8000e24 <transportReceive+0x40>)
8000dfc: 687b ldr r3, [r7, #4]
8000dfe: 0018 movs r0, r3
8000e00: f002 f82a bl 8002e58 <memcpy>
_packet_received = 0;
8000e04: 4b05 ldr r3, [pc, #20] ; (8000e1c <transportReceive+0x38>)
8000e06: 2200 movs r2, #0
8000e08: 701a strb r2, [r3, #0]
return _packet_len;
8000e0a: 4b05 ldr r3, [pc, #20] ; (8000e20 <transportReceive+0x3c>)
8000e0c: 781b ldrb r3, [r3, #0]
8000e0e: e000 b.n 8000e12 <transportReceive+0x2e>
} else {
return (0);
8000e10: 2300 movs r3, #0
}
}
8000e12: 0018 movs r0, r3
8000e14: 46bd mov sp, r7
8000e16: b002 add sp, #8
8000e18: bd80 pop {r7, pc}
8000e1a: 46c0 nop ; (mov r8, r8)
8000e1c: 200000fe .word 0x200000fe
8000e20: 200000ae .word 0x200000ae
8000e24: 20000104 .word 0x20000104
08000e28 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8000e28: b5b0 push {r4, r5, r7, lr}
8000e2a: b08a sub sp, #40 ; 0x28
8000e2c: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8000e2e: f000 fbe3 bl 80015f8 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8000e32: f000 f933 bl 800109c <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8000e36: f000 f9c9 bl 80011cc <MX_GPIO_Init>
MX_USART1_UART_Init();
8000e3a: f000 f98f bl 800115c <MX_USART1_UART_Init>
/* USER CODE BEGIN 2 */
HAL_GPIO_WritePin(Relay1_GPIO_Port, Relay1_Pin, RESET);
8000e3e: 2390 movs r3, #144 ; 0x90
8000e40: 05db lsls r3, r3, #23
8000e42: 2200 movs r2, #0
8000e44: 2180 movs r1, #128 ; 0x80
8000e46: 0018 movs r0, r3
8000e48: f000 fec7 bl 8001bda <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(Relay2_GPIO_Port, Relay2_Pin, RESET);
8000e4c: 4b89 ldr r3, [pc, #548] ; (8001074 <main+0x24c>)
8000e4e: 2200 movs r2, #0
8000e50: 2102 movs r1, #2
8000e52: 0018 movs r0, r3
8000e54: f000 fec1 bl 8001bda <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(TEN_GPIO_Port, TEN_Pin, RESET);
8000e58: 2390 movs r3, #144 ; 0x90
8000e5a: 05db lsls r3, r3, #23
8000e5c: 2200 movs r2, #0
8000e5e: 2120 movs r1, #32
8000e60: 0018 movs r0, r3
8000e62: f000 feba bl 8001bda <HAL_GPIO_WritePin>
transportInitialise(&huart1);
8000e66: 4b84 ldr r3, [pc, #528] ; (8001078 <main+0x250>)
8000e68: 0018 movs r0, r3
8000e6a: f7ff ff83 bl 8000d74 <transportInitialise>
static uint8_t sentValue2=2;
static uint8_t sentStatus=0;
static uint8_t button=0;
MyMessage msg;
transportProcess(); // Process incoming data
8000e6e: f7ff ffa7 bl 8000dc0 <transportProcess>
loopv++;
8000e72: 4b82 ldr r3, [pc, #520] ; (800107c <main+0x254>)
8000e74: 881b ldrh r3, [r3, #0]
8000e76: 3301 adds r3, #1
8000e78: b29a uxth r2, r3
8000e7a: 4b80 ldr r3, [pc, #512] ; (800107c <main+0x254>)
8000e7c: 801a strh r2, [r3, #0]
value = HAL_GPIO_ReadPin(IN1_GPIO_Port, IN1_Pin);
8000e7e: 2527 movs r5, #39 ; 0x27
8000e80: 197c adds r4, r7, r5
8000e82: 2390 movs r3, #144 ; 0x90
8000e84: 05db lsls r3, r3, #23
8000e86: 2102 movs r1, #2
8000e88: 0018 movs r0, r3
8000e8a: f000 fe89 bl 8001ba0 <HAL_GPIO_ReadPin>
8000e8e: 0003 movs r3, r0
8000e90: 7023 strb r3, [r4, #0]
if (value != sentValue1) {
8000e92: 4b7b ldr r3, [pc, #492] ; (8001080 <main+0x258>)
8000e94: 781b ldrb r3, [r3, #0]
8000e96: 197a adds r2, r7, r5
8000e98: 7812 ldrb r2, [r2, #0]
8000e9a: 429a cmp r2, r3
8000e9c: d016 beq.n 8000ecc <main+0xa4>
// Value has changed from last transmission, send the updated value
msg.version_length = V2_MYS_HEADER_PROTOCOL_VERSION + (1 << 3);
8000e9e: 1d3b adds r3, r7, #4
8000ea0: 220a movs r2, #10
8000ea2: 70da strb r2, [r3, #3]
msg.sensor = IN_ID1;
8000ea4: 1d3b adds r3, r7, #4
8000ea6: 2201 movs r2, #1
8000ea8: 719a strb r2, [r3, #6]
msg.type = V_TRIPPED;
8000eaa: 1d3b adds r3, r7, #4
8000eac: 2210 movs r2, #16
8000eae: 715a strb r2, [r3, #5]
msg.bValue = value;
8000eb0: 1d3b adds r3, r7, #4
8000eb2: 2427 movs r4, #39 ; 0x27
8000eb4: 193a adds r2, r7, r4
8000eb6: 7812 ldrb r2, [r2, #0]
8000eb8: 71da strb r2, [r3, #7]
send(&msg, P_BYTE);
8000eba: 1d3b adds r3, r7, #4
8000ebc: 2101 movs r1, #1
8000ebe: 0018 movs r0, r3
8000ec0: f7ff fada bl 8000478 <send>
sentValue1 = value;
8000ec4: 4b6e ldr r3, [pc, #440] ; (8001080 <main+0x258>)
8000ec6: 193a adds r2, r7, r4
8000ec8: 7812 ldrb r2, [r2, #0]
8000eca: 701a strb r2, [r3, #0]
}
value = HAL_GPIO_ReadPin(IN2_GPIO_Port, IN2_Pin);
8000ecc: 2527 movs r5, #39 ; 0x27
8000ece: 197c adds r4, r7, r5
8000ed0: 2390 movs r3, #144 ; 0x90
8000ed2: 05db lsls r3, r3, #23
8000ed4: 2101 movs r1, #1
8000ed6: 0018 movs r0, r3
8000ed8: f000 fe62 bl 8001ba0 <HAL_GPIO_ReadPin>
8000edc: 0003 movs r3, r0
8000ede: 7023 strb r3, [r4, #0]
if (value != sentValue2) {
8000ee0: 4b68 ldr r3, [pc, #416] ; (8001084 <main+0x25c>)
8000ee2: 781b ldrb r3, [r3, #0]
8000ee4: 197a adds r2, r7, r5
8000ee6: 7812 ldrb r2, [r2, #0]
8000ee8: 429a cmp r2, r3
8000eea: d016 beq.n 8000f1a <main+0xf2>
// Value has changed from last transmission, send the updated value
msg.version_length = V2_MYS_HEADER_PROTOCOL_VERSION + (1 << 3);
8000eec: 1d3b adds r3, r7, #4
8000eee: 220a movs r2, #10
8000ef0: 70da strb r2, [r3, #3]
msg.sensor = IN_ID2;
8000ef2: 1d3b adds r3, r7, #4
8000ef4: 2202 movs r2, #2
8000ef6: 719a strb r2, [r3, #6]
msg.type = V_TRIPPED;
8000ef8: 1d3b adds r3, r7, #4
8000efa: 2210 movs r2, #16
8000efc: 715a strb r2, [r3, #5]
msg.bValue = value;
8000efe: 1d3b adds r3, r7, #4
8000f00: 2427 movs r4, #39 ; 0x27
8000f02: 193a adds r2, r7, r4
8000f04: 7812 ldrb r2, [r2, #0]
8000f06: 71da strb r2, [r3, #7]
send(&msg, P_BYTE);
8000f08: 1d3b adds r3, r7, #4
8000f0a: 2101 movs r1, #1
8000f0c: 0018 movs r0, r3
8000f0e: f7ff fab3 bl 8000478 <send>
sentValue2 = value;
8000f12: 4b5c ldr r3, [pc, #368] ; (8001084 <main+0x25c>)
8000f14: 193a adds r2, r7, r4
8000f16: 7812 ldrb r2, [r2, #0]
8000f18: 701a strb r2, [r3, #0]
}
value = HAL_GPIO_ReadPin(Button_GPIO_Port, Button_Pin);
8000f1a: 2527 movs r5, #39 ; 0x27
8000f1c: 197c adds r4, r7, r5
8000f1e: 2390 movs r3, #144 ; 0x90
8000f20: 05db lsls r3, r3, #23
8000f22: 2140 movs r1, #64 ; 0x40
8000f24: 0018 movs r0, r3
8000f26: f000 fe3b bl 8001ba0 <HAL_GPIO_ReadPin>
8000f2a: 0003 movs r3, r0
8000f2c: 7023 strb r3, [r4, #0]
if (value != button) {
8000f2e: 4b56 ldr r3, [pc, #344] ; (8001088 <main+0x260>)
8000f30: 781b ldrb r3, [r3, #0]
8000f32: 197a adds r2, r7, r5
8000f34: 7812 ldrb r2, [r2, #0]
8000f36: 429a cmp r2, r3
8000f38: d013 beq.n 8000f62 <main+0x13a>
button = value;
8000f3a: 4b53 ldr r3, [pc, #332] ; (8001088 <main+0x260>)
8000f3c: 2227 movs r2, #39 ; 0x27
8000f3e: 18ba adds r2, r7, r2
8000f40: 7812 ldrb r2, [r2, #0]
8000f42: 701a strb r2, [r3, #0]
if (button) {
8000f44: 4b50 ldr r3, [pc, #320] ; (8001088 <main+0x260>)
8000f46: 781b ldrb r3, [r3, #0]
8000f48: 2b00 cmp r3, #0
8000f4a: d00a beq.n 8000f62 <main+0x13a>
sentValue1 = 2;
8000f4c: 4b4c ldr r3, [pc, #304] ; (8001080 <main+0x258>)
8000f4e: 2202 movs r2, #2
8000f50: 701a strb r2, [r3, #0]
sentValue2 = 2;
8000f52: 4b4c ldr r3, [pc, #304] ; (8001084 <main+0x25c>)
8000f54: 2202 movs r2, #2
8000f56: 701a strb r2, [r3, #0]
sentStatus = 0;
8000f58: 4b4c ldr r3, [pc, #304] ; (800108c <main+0x264>)
8000f5a: 2200 movs r2, #0
8000f5c: 701a strb r2, [r3, #0]
present_node();
8000f5e: f000 f9c9 bl 80012f4 <present_node>
}
}
if (sentStatus == 0) {
8000f62: 4b4a ldr r3, [pc, #296] ; (800108c <main+0x264>)
8000f64: 781b ldrb r3, [r3, #0]
8000f66: 2b00 cmp r3, #0
8000f68: d15f bne.n 800102a <main+0x202>
sentStatus = 1;
8000f6a: 4b48 ldr r3, [pc, #288] ; (800108c <main+0x264>)
8000f6c: 2201 movs r2, #1
8000f6e: 701a strb r2, [r3, #0]
value = HAL_GPIO_ReadPin(Relay1_GPIO_Port, Relay1_Pin);
8000f70: 2527 movs r5, #39 ; 0x27
8000f72: 197c adds r4, r7, r5
8000f74: 2390 movs r3, #144 ; 0x90
8000f76: 05db lsls r3, r3, #23
8000f78: 2180 movs r1, #128 ; 0x80
8000f7a: 0018 movs r0, r3
8000f7c: f000 fe10 bl 8001ba0 <HAL_GPIO_ReadPin>
8000f80: 0003 movs r3, r0
8000f82: 7023 strb r3, [r4, #0]
msg.version_length = V2_MYS_HEADER_PROTOCOL_VERSION + (1 << 3);
8000f84: 1d3b adds r3, r7, #4
8000f86: 220a movs r2, #10
8000f88: 70da strb r2, [r3, #3]
msg.sensor = RELAY_ID1;
8000f8a: 1d3b adds r3, r7, #4
8000f8c: 2203 movs r2, #3
8000f8e: 719a strb r2, [r3, #6]
msg.type = V_STATUS;
8000f90: 1d3b adds r3, r7, #4
8000f92: 2202 movs r2, #2
8000f94: 715a strb r2, [r3, #5]
if (value)
8000f96: 197b adds r3, r7, r5
8000f98: 781b ldrb r3, [r3, #0]
8000f9a: 2b00 cmp r3, #0
8000f9c: d009 beq.n 8000fb2 <main+0x18a>
strcpy(msg.data, "1");
8000f9e: 1d3b adds r3, r7, #4
8000fa0: 1dda adds r2, r3, #7
8000fa2: 4b3b ldr r3, [pc, #236] ; (8001090 <main+0x268>)
8000fa4: 0010 movs r0, r2
8000fa6: 0019 movs r1, r3
8000fa8: 2302 movs r3, #2
8000faa: 001a movs r2, r3
8000fac: f001 ff54 bl 8002e58 <memcpy>
8000fb0: e008 b.n 8000fc4 <main+0x19c>
else
strcpy(msg.data, "0");
8000fb2: 1d3b adds r3, r7, #4
8000fb4: 1dda adds r2, r3, #7
8000fb6: 4b37 ldr r3, [pc, #220] ; (8001094 <main+0x26c>)
8000fb8: 0010 movs r0, r2
8000fba: 0019 movs r1, r3
8000fbc: 2302 movs r3, #2
8000fbe: 001a movs r2, r3
8000fc0: f001 ff4a bl 8002e58 <memcpy>
send(&msg, P_STRING);
8000fc4: 1d3b adds r3, r7, #4
8000fc6: 2100 movs r1, #0
8000fc8: 0018 movs r0, r3
8000fca: f7ff fa55 bl 8000478 <send>
value = HAL_GPIO_ReadPin(Relay2_GPIO_Port, Relay2_Pin);
8000fce: 2527 movs r5, #39 ; 0x27
8000fd0: 197c adds r4, r7, r5
8000fd2: 4b28 ldr r3, [pc, #160] ; (8001074 <main+0x24c>)
8000fd4: 2102 movs r1, #2
8000fd6: 0018 movs r0, r3
8000fd8: f000 fde2 bl 8001ba0 <HAL_GPIO_ReadPin>
8000fdc: 0003 movs r3, r0
8000fde: 7023 strb r3, [r4, #0]
msg.version_length = V2_MYS_HEADER_PROTOCOL_VERSION + (1 << 3);
8000fe0: 1d3b adds r3, r7, #4
8000fe2: 220a movs r2, #10
8000fe4: 70da strb r2, [r3, #3]
msg.sensor = RELAY_ID2;
8000fe6: 1d3b adds r3, r7, #4
8000fe8: 2204 movs r2, #4
8000fea: 719a strb r2, [r3, #6]
msg.type = V_STATUS;
8000fec: 1d3b adds r3, r7, #4
8000fee: 2202 movs r2, #2
8000ff0: 715a strb r2, [r3, #5]
if (value)
8000ff2: 197b adds r3, r7, r5
8000ff4: 781b ldrb r3, [r3, #0]
8000ff6: 2b00 cmp r3, #0
8000ff8: d009 beq.n 800100e <main+0x1e6>
strcpy(msg.data, "1");
8000ffa: 1d3b adds r3, r7, #4
8000ffc: 1dda adds r2, r3, #7
8000ffe: 4b24 ldr r3, [pc, #144] ; (8001090 <main+0x268>)
8001000: 0010 movs r0, r2
8001002: 0019 movs r1, r3
8001004: 2302 movs r3, #2
8001006: 001a movs r2, r3
8001008: f001 ff26 bl 8002e58 <memcpy>
800100c: e008 b.n 8001020 <main+0x1f8>
else
strcpy(msg.data, "0");
800100e: 1d3b adds r3, r7, #4
8001010: 1dda adds r2, r3, #7
8001012: 4b20 ldr r3, [pc, #128] ; (8001094 <main+0x26c>)
8001014: 0010 movs r0, r2
8001016: 0019 movs r1, r3
8001018: 2302 movs r3, #2
800101a: 001a movs r2, r3
800101c: f001 ff1c bl 8002e58 <memcpy>
send(&msg, P_STRING);
8001020: 1d3b adds r3, r7, #4
8001022: 2100 movs r1, #0
8001024: 0018 movs r0, r3
8001026: f7ff fa27 bl 8000478 <send>
}
if (loopv == 0) {
800102a: 4b14 ldr r3, [pc, #80] ; (800107c <main+0x254>)
800102c: 881b ldrh r3, [r3, #0]
800102e: 2b00 cmp r3, #0
8001030: d000 beq.n 8001034 <main+0x20c>
8001032: e71c b.n 8000e6e <main+0x46>
HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
8001034: 2390 movs r3, #144 ; 0x90
8001036: 05db lsls r3, r3, #23
8001038: 2104 movs r1, #4
800103a: 0018 movs r0, r3
800103c: f000 fdea bl 8001c14 <HAL_GPIO_TogglePin>
counter++;
8001040: 4b15 ldr r3, [pc, #84] ; (8001098 <main+0x270>)
8001042: 881b ldrh r3, [r3, #0]
8001044: 3301 adds r3, #1
8001046: b29a uxth r2, r3
8001048: 4b13 ldr r3, [pc, #76] ; (8001098 <main+0x270>)
800104a: 801a strh r2, [r3, #0]
if (counter > 3600) {
800104c: 4b12 ldr r3, [pc, #72] ; (8001098 <main+0x270>)
800104e: 881a ldrh r2, [r3, #0]
8001050: 23e1 movs r3, #225 ; 0xe1
8001052: 011b lsls r3, r3, #4
8001054: 429a cmp r2, r3
8001056: d800 bhi.n 800105a <main+0x232>
8001058: e709 b.n 8000e6e <main+0x46>
sentValue1 = 2;
800105a: 4b09 ldr r3, [pc, #36] ; (8001080 <main+0x258>)
800105c: 2202 movs r2, #2
800105e: 701a strb r2, [r3, #0]
sentValue2 = 2;
8001060: 4b08 ldr r3, [pc, #32] ; (8001084 <main+0x25c>)
8001062: 2202 movs r2, #2
8001064: 701a strb r2, [r3, #0]
sentStatus = 0;
8001066: 4b09 ldr r3, [pc, #36] ; (800108c <main+0x264>)
8001068: 2200 movs r2, #0
800106a: 701a strb r2, [r3, #0]
counter = 0;
800106c: 4b0a ldr r3, [pc, #40] ; (8001098 <main+0x270>)
800106e: 2200 movs r2, #0
8001070: 801a strh r2, [r3, #0]
{
8001072: e6fc b.n 8000e6e <main+0x46>
8001074: 48000400 .word 0x48000400
8001078: 20000128 .word 0x20000128
800107c: 20000090 .word 0x20000090
8001080: 20000000 .word 0x20000000
8001084: 20000001 .word 0x20000001
8001088: 20000092 .word 0x20000092
800108c: 20000093 .word 0x20000093
8001090: 08003050 .word 0x08003050
8001094: 08003054 .word 0x08003054
8001098: 20000094 .word 0x20000094
0800109c <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
800109c: b590 push {r4, r7, lr}
800109e: b095 sub sp, #84 ; 0x54
80010a0: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
80010a2: 2420 movs r4, #32
80010a4: 193b adds r3, r7, r4
80010a6: 0018 movs r0, r3
80010a8: 2330 movs r3, #48 ; 0x30
80010aa: 001a movs r2, r3
80010ac: 2100 movs r1, #0
80010ae: f001 fedc bl 8002e6a <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
80010b2: 2310 movs r3, #16
80010b4: 18fb adds r3, r7, r3
80010b6: 0018 movs r0, r3
80010b8: 2310 movs r3, #16
80010ba: 001a movs r2, r3
80010bc: 2100 movs r1, #0
80010be: f001 fed4 bl 8002e6a <memset>
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
80010c2: 003b movs r3, r7
80010c4: 0018 movs r0, r3
80010c6: 2310 movs r3, #16
80010c8: 001a movs r2, r3
80010ca: 2100 movs r1, #0
80010cc: f001 fecd bl 8002e6a <memset>
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
80010d0: 0021 movs r1, r4
80010d2: 187b adds r3, r7, r1
80010d4: 2201 movs r2, #1
80010d6: 601a str r2, [r3, #0]
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
80010d8: 187b adds r3, r7, r1
80010da: 2201 movs r2, #1
80010dc: 605a str r2, [r3, #4]
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
80010de: 187b adds r3, r7, r1
80010e0: 2202 movs r2, #2
80010e2: 621a str r2, [r3, #32]
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
80010e4: 187b adds r3, r7, r1
80010e6: 2280 movs r2, #128 ; 0x80
80010e8: 0252 lsls r2, r2, #9
80010ea: 625a str r2, [r3, #36] ; 0x24
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL3;
80010ec: 187b adds r3, r7, r1
80010ee: 2280 movs r2, #128 ; 0x80
80010f0: 02d2 lsls r2, r2, #11
80010f2: 629a str r2, [r3, #40] ; 0x28
RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
80010f4: 187b adds r3, r7, r1
80010f6: 2200 movs r2, #0
80010f8: 62da str r2, [r3, #44] ; 0x2c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
80010fa: 187b adds r3, r7, r1
80010fc: 0018 movs r0, r3
80010fe: f000 fda5 bl 8001c4c <HAL_RCC_OscConfig>
8001102: 1e03 subs r3, r0, #0
8001104: d001 beq.n 800110a <SystemClock_Config+0x6e>
{
Error_Handler();
8001106: f000 f967 bl 80013d8 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
800110a: 2110 movs r1, #16
800110c: 187b adds r3, r7, r1
800110e: 2207 movs r2, #7
8001110: 601a str r2, [r3, #0]
|RCC_CLOCKTYPE_PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8001112: 187b adds r3, r7, r1
8001114: 2202 movs r2, #2
8001116: 605a str r2, [r3, #4]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8001118: 187b adds r3, r7, r1
800111a: 2200 movs r2, #0
800111c: 609a str r2, [r3, #8]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
800111e: 187b adds r3, r7, r1
8001120: 22a0 movs r2, #160 ; 0xa0
8001122: 00d2 lsls r2, r2, #3
8001124: 60da str r2, [r3, #12]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
8001126: 187b adds r3, r7, r1
8001128: 2100 movs r1, #0
800112a: 0018 movs r0, r3
800112c: f001 f8aa bl 8002284 <HAL_RCC_ClockConfig>
8001130: 1e03 subs r3, r0, #0
8001132: d001 beq.n 8001138 <SystemClock_Config+0x9c>
{
Error_Handler();
8001134: f000 f950 bl 80013d8 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
8001138: 003b movs r3, r7
800113a: 2201 movs r2, #1
800113c: 601a str r2, [r3, #0]
PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1;
800113e: 003b movs r3, r7
8001140: 2200 movs r2, #0
8001142: 609a str r2, [r3, #8]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
8001144: 003b movs r3, r7
8001146: 0018 movs r0, r3
8001148: f001 f9ee bl 8002528 <HAL_RCCEx_PeriphCLKConfig>
800114c: 1e03 subs r3, r0, #0
800114e: d001 beq.n 8001154 <SystemClock_Config+0xb8>
{
Error_Handler();
8001150: f000 f942 bl 80013d8 <Error_Handler>
}
}
8001154: 46c0 nop ; (mov r8, r8)
8001156: 46bd mov sp, r7
8001158: b015 add sp, #84 ; 0x54
800115a: bd90 pop {r4, r7, pc}
0800115c <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
800115c: b580 push {r7, lr}
800115e: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
8001160: 4b18 ldr r3, [pc, #96] ; (80011c4 <MX_USART1_UART_Init+0x68>)
8001162: 4a19 ldr r2, [pc, #100] ; (80011c8 <MX_USART1_UART_Init+0x6c>)
8001164: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 9600;
8001166: 4b17 ldr r3, [pc, #92] ; (80011c4 <MX_USART1_UART_Init+0x68>)
8001168: 2296 movs r2, #150 ; 0x96
800116a: 0192 lsls r2, r2, #6
800116c: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
800116e: 4b15 ldr r3, [pc, #84] ; (80011c4 <MX_USART1_UART_Init+0x68>)
8001170: 2200 movs r2, #0
8001172: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
8001174: 4b13 ldr r3, [pc, #76] ; (80011c4 <MX_USART1_UART_Init+0x68>)
8001176: 2200 movs r2, #0
8001178: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
800117a: 4b12 ldr r3, [pc, #72] ; (80011c4 <MX_USART1_UART_Init+0x68>)
800117c: 2200 movs r2, #0
800117e: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
8001180: 4b10 ldr r3, [pc, #64] ; (80011c4 <MX_USART1_UART_Init+0x68>)
8001182: 220c movs r2, #12
8001184: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8001186: 4b0f ldr r3, [pc, #60] ; (80011c4 <MX_USART1_UART_Init+0x68>)
8001188: 2200 movs r2, #0
800118a: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
800118c: 4b0d ldr r3, [pc, #52] ; (80011c4 <MX_USART1_UART_Init+0x68>)
800118e: 2200 movs r2, #0
8001190: 61da str r2, [r3, #28]
huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
8001192: 4b0c ldr r3, [pc, #48] ; (80011c4 <MX_USART1_UART_Init+0x68>)
8001194: 2200 movs r2, #0
8001196: 621a str r2, [r3, #32]
huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
8001198: 4b0a ldr r3, [pc, #40] ; (80011c4 <MX_USART1_UART_Init+0x68>)
800119a: 2200 movs r2, #0
800119c: 625a str r2, [r3, #36] ; 0x24
if (HAL_UART_Init(&huart1) != HAL_OK)
800119e: 4b09 ldr r3, [pc, #36] ; (80011c4 <MX_USART1_UART_Init+0x68>)
80011a0: 0018 movs r0, r3
80011a2: f001 fa8f bl 80026c4 <HAL_UART_Init>
80011a6: 1e03 subs r3, r0, #0
80011a8: d001 beq.n 80011ae <MX_USART1_UART_Init+0x52>
{
Error_Handler();
80011aa: f000 f915 bl 80013d8 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
__HAL_UART_ENABLE_IT(&huart1, UART_IT_RXNE);
80011ae: 4b05 ldr r3, [pc, #20] ; (80011c4 <MX_USART1_UART_Init+0x68>)
80011b0: 681b ldr r3, [r3, #0]
80011b2: 681a ldr r2, [r3, #0]
80011b4: 4b03 ldr r3, [pc, #12] ; (80011c4 <MX_USART1_UART_Init+0x68>)
80011b6: 681b ldr r3, [r3, #0]
80011b8: 2120 movs r1, #32
80011ba: 430a orrs r2, r1
80011bc: 601a str r2, [r3, #0]
/* USER CODE END USART1_Init 2 */
}
80011be: 46c0 nop ; (mov r8, r8)
80011c0: 46bd mov sp, r7
80011c2: bd80 pop {r7, pc}
80011c4: 20000128 .word 0x20000128
80011c8: 40013800 .word 0x40013800
080011cc <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
80011cc: b590 push {r4, r7, lr}
80011ce: b089 sub sp, #36 ; 0x24
80011d0: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
80011d2: 240c movs r4, #12
80011d4: 193b adds r3, r7, r4
80011d6: 0018 movs r0, r3
80011d8: 2314 movs r3, #20
80011da: 001a movs r2, r3
80011dc: 2100 movs r1, #0
80011de: f001 fe44 bl 8002e6a <memset>
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOF_CLK_ENABLE();
80011e2: 4b42 ldr r3, [pc, #264] ; (80012ec <MX_GPIO_Init+0x120>)
80011e4: 695a ldr r2, [r3, #20]
80011e6: 4b41 ldr r3, [pc, #260] ; (80012ec <MX_GPIO_Init+0x120>)
80011e8: 2180 movs r1, #128 ; 0x80
80011ea: 03c9 lsls r1, r1, #15
80011ec: 430a orrs r2, r1
80011ee: 615a str r2, [r3, #20]
80011f0: 4b3e ldr r3, [pc, #248] ; (80012ec <MX_GPIO_Init+0x120>)
80011f2: 695a ldr r2, [r3, #20]
80011f4: 2380 movs r3, #128 ; 0x80
80011f6: 03db lsls r3, r3, #15
80011f8: 4013 ands r3, r2
80011fa: 60bb str r3, [r7, #8]
80011fc: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
80011fe: 4b3b ldr r3, [pc, #236] ; (80012ec <MX_GPIO_Init+0x120>)
8001200: 695a ldr r2, [r3, #20]
8001202: 4b3a ldr r3, [pc, #232] ; (80012ec <MX_GPIO_Init+0x120>)
8001204: 2180 movs r1, #128 ; 0x80
8001206: 0289 lsls r1, r1, #10
8001208: 430a orrs r2, r1
800120a: 615a str r2, [r3, #20]
800120c: 4b37 ldr r3, [pc, #220] ; (80012ec <MX_GPIO_Init+0x120>)
800120e: 695a ldr r2, [r3, #20]
8001210: 2380 movs r3, #128 ; 0x80
8001212: 029b lsls r3, r3, #10
8001214: 4013 ands r3, r2
8001216: 607b str r3, [r7, #4]
8001218: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
800121a: 4b34 ldr r3, [pc, #208] ; (80012ec <MX_GPIO_Init+0x120>)
800121c: 695a ldr r2, [r3, #20]
800121e: 4b33 ldr r3, [pc, #204] ; (80012ec <MX_GPIO_Init+0x120>)
8001220: 2180 movs r1, #128 ; 0x80
8001222: 02c9 lsls r1, r1, #11
8001224: 430a orrs r2, r1
8001226: 615a str r2, [r3, #20]
8001228: 4b30 ldr r3, [pc, #192] ; (80012ec <MX_GPIO_Init+0x120>)
800122a: 695a ldr r2, [r3, #20]
800122c: 2380 movs r3, #128 ; 0x80
800122e: 02db lsls r3, r3, #11
8001230: 4013 ands r3, r2
8001232: 603b str r3, [r7, #0]
8001234: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, LED_Pin|TEN_Pin|Relay1_Pin, GPIO_PIN_RESET);
8001236: 2390 movs r3, #144 ; 0x90
8001238: 05db lsls r3, r3, #23
800123a: 2200 movs r2, #0
800123c: 21a4 movs r1, #164 ; 0xa4
800123e: 0018 movs r0, r3
8001240: f000 fccb bl 8001bda <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(Relay2_GPIO_Port, Relay2_Pin, GPIO_PIN_RESET);
8001244: 4b2a ldr r3, [pc, #168] ; (80012f0 <MX_GPIO_Init+0x124>)
8001246: 2200 movs r2, #0
8001248: 2102 movs r1, #2
800124a: 0018 movs r0, r3
800124c: f000 fcc5 bl 8001bda <HAL_GPIO_WritePin>
/*Configure GPIO pins : IN2_Pin IN1_Pin Button_Pin */
GPIO_InitStruct.Pin = IN2_Pin|IN1_Pin|Button_Pin;
8001250: 193b adds r3, r7, r4
8001252: 2243 movs r2, #67 ; 0x43
8001254: 601a str r2, [r3, #0]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8001256: 193b adds r3, r7, r4
8001258: 2200 movs r2, #0
800125a: 605a str r2, [r3, #4]
GPIO_InitStruct.Pull = GPIO_PULLUP;
800125c: 193b adds r3, r7, r4
800125e: 2201 movs r2, #1
8001260: 609a str r2, [r3, #8]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8001262: 193a adds r2, r7, r4
8001264: 2390 movs r3, #144 ; 0x90
8001266: 05db lsls r3, r3, #23
8001268: 0011 movs r1, r2
800126a: 0018 movs r0, r3
800126c: f000 fb28 bl 80018c0 <HAL_GPIO_Init>
/*Configure GPIO pins : LED_Pin Relay1_Pin */
GPIO_InitStruct.Pin = LED_Pin|Relay1_Pin;
8001270: 193b adds r3, r7, r4
8001272: 2284 movs r2, #132 ; 0x84
8001274: 601a str r2, [r3, #0]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8001276: 193b adds r3, r7, r4
8001278: 2201 movs r2, #1
800127a: 605a str r2, [r3, #4]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800127c: 193b adds r3, r7, r4
800127e: 2200 movs r2, #0
8001280: 609a str r2, [r3, #8]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001282: 193b adds r3, r7, r4
8001284: 2200 movs r2, #0
8001286: 60da str r2, [r3, #12]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8001288: 193a adds r2, r7, r4
800128a: 2390 movs r3, #144 ; 0x90
800128c: 05db lsls r3, r3, #23
800128e: 0011 movs r1, r2
8001290: 0018 movs r0, r3
8001292: f000 fb15 bl 80018c0 <HAL_GPIO_Init>
/*Configure GPIO pin : TEN_Pin */
GPIO_InitStruct.Pin = TEN_Pin;
8001296: 193b adds r3, r7, r4
8001298: 2220 movs r2, #32
800129a: 601a str r2, [r3, #0]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800129c: 193b adds r3, r7, r4
800129e: 2201 movs r2, #1
80012a0: 605a str r2, [r3, #4]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80012a2: 193b adds r3, r7, r4
80012a4: 2200 movs r2, #0
80012a6: 609a str r2, [r3, #8]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
80012a8: 193b adds r3, r7, r4
80012aa: 2203 movs r2, #3
80012ac: 60da str r2, [r3, #12]
HAL_GPIO_Init(TEN_GPIO_Port, &GPIO_InitStruct);
80012ae: 193a adds r2, r7, r4
80012b0: 2390 movs r3, #144 ; 0x90
80012b2: 05db lsls r3, r3, #23
80012b4: 0011 movs r1, r2
80012b6: 0018 movs r0, r3
80012b8: f000 fb02 bl 80018c0 <HAL_GPIO_Init>
/*Configure GPIO pin : Relay2_Pin */
GPIO_InitStruct.Pin = Relay2_Pin;
80012bc: 0021 movs r1, r4
80012be: 187b adds r3, r7, r1
80012c0: 2202 movs r2, #2
80012c2: 601a str r2, [r3, #0]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
80012c4: 187b adds r3, r7, r1
80012c6: 2201 movs r2, #1
80012c8: 605a str r2, [r3, #4]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80012ca: 187b adds r3, r7, r1
80012cc: 2200 movs r2, #0
80012ce: 609a str r2, [r3, #8]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80012d0: 187b adds r3, r7, r1
80012d2: 2200 movs r2, #0
80012d4: 60da str r2, [r3, #12]
HAL_GPIO_Init(Relay2_GPIO_Port, &GPIO_InitStruct);
80012d6: 187b adds r3, r7, r1
80012d8: 4a05 ldr r2, [pc, #20] ; (80012f0 <MX_GPIO_Init+0x124>)
80012da: 0019 movs r1, r3
80012dc: 0010 movs r0, r2
80012de: f000 faef bl 80018c0 <HAL_GPIO_Init>
}
80012e2: 46c0 nop ; (mov r8, r8)
80012e4: 46bd mov sp, r7
80012e6: b009 add sp, #36 ; 0x24
80012e8: bd90 pop {r4, r7, pc}
80012ea: 46c0 nop ; (mov r8, r8)
80012ec: 40021000 .word 0x40021000
80012f0: 48000400 .word 0x48000400
080012f4 <present_node>:
/* USER CODE BEGIN 4 */
void present_node(void)
{
80012f4: b580 push {r7, lr}
80012f6: af00 add r7, sp, #0
present(NODE_SENSOR_ID, S_ARDUINO_NODE,"STM Relay Board");
80012f8: 4b15 ldr r3, [pc, #84] ; (8001350 <present_node+0x5c>)
80012fa: 001a movs r2, r3
80012fc: 2111 movs r1, #17
80012fe: 20ff movs r0, #255 ; 0xff
8001300: f7ff f90c bl 800051c <present>
sendSketchInfo("Relay_STM", "1.1");
8001304: 4a13 ldr r2, [pc, #76] ; (8001354 <present_node+0x60>)
8001306: 4b14 ldr r3, [pc, #80] ; (8001358 <present_node+0x64>)
8001308: 0011 movs r1, r2
800130a: 0018 movs r0, r3
800130c: f7ff f992 bl 8000634 <sendSketchInfo>
present(IN_ID1, S_DOOR, "Input ID1");
8001310: 4b12 ldr r3, [pc, #72] ; (800135c <present_node+0x68>)
8001312: 001a movs r2, r3
8001314: 2100 movs r1, #0
8001316: 2001 movs r0, #1
8001318: f7ff f900 bl 800051c <present>
present(IN_ID2, S_DOOR, "Input ID2");
800131c: 4b10 ldr r3, [pc, #64] ; (8001360 <present_node+0x6c>)
800131e: 001a movs r2, r3
8001320: 2100 movs r1, #0
8001322: 2002 movs r0, #2
8001324: f7ff f8fa bl 800051c <present>
present(RELAY_ID1, S_BINARY, "Relay 1");
8001328: 4b0e ldr r3, [pc, #56] ; (8001364 <present_node+0x70>)
800132a: 001a movs r2, r3
800132c: 2103 movs r1, #3
800132e: 2003 movs r0, #3
8001330: f7ff f8f4 bl 800051c <present>
present(RELAY_ID2, S_BINARY, "Relay 2");
8001334: 4b0c ldr r3, [pc, #48] ; (8001368 <present_node+0x74>)
8001336: 001a movs r2, r3
8001338: 2103 movs r1, #3
800133a: 2004 movs r0, #4
800133c: f7ff f8ee bl 800051c <present>
registerNode();
8001340: f7ff f92a bl 8000598 <registerNode>
HAL_Delay(20);
8001344: 2014 movs r0, #20
8001346: f000 f9bb bl 80016c0 <HAL_Delay>
}
800134a: 46c0 nop ; (mov r8, r8)
800134c: 46bd mov sp, r7
800134e: bd80 pop {r7, pc}
8001350: 08003058 .word 0x08003058
8001354: 08003068 .word 0x08003068
8001358: 0800306c .word 0x0800306c
800135c: 08003078 .word 0x08003078
8001360: 08003084 .word 0x08003084
8001364: 08003090 .word 0x08003090
8001368: 08003098 .word 0x08003098
0800136c <receive>:
void receive(const MyMessage* mymsg)
{
800136c: b580 push {r7, lr}
800136e: b084 sub sp, #16
8001370: af00 add r7, sp, #0
8001372: 6078 str r0, [r7, #4]
uint8_t sensor;
// We only expect one type of message from controller. But we better check anyway.
if (mymsg->type == V_STATUS) {
8001374: 687b ldr r3, [r7, #4]
8001376: 795b ldrb r3, [r3, #5]
8001378: 2b02 cmp r3, #2
800137a: d126 bne.n 80013ca <receive+0x5e>
sensor = mymsg->sensor;
800137c: 210f movs r1, #15
800137e: 187b adds r3, r7, r1
8001380: 687a ldr r2, [r7, #4]
8001382: 7992 ldrb r2, [r2, #6]
8001384: 701a strb r2, [r3, #0]
if (sensor == 3)
8001386: 187b adds r3, r7, r1
8001388: 781b ldrb r3, [r3, #0]
800138a: 2b03 cmp r3, #3
800138c: d10c bne.n 80013a8 <receive+0x3c>
HAL_GPIO_WritePin(Relay1_GPIO_Port, Relay1_Pin, (mymsg->data[0]=='1')?SET:RESET);
800138e: 687b ldr r3, [r7, #4]
8001390: 79db ldrb r3, [r3, #7]
8001392: 3b31 subs r3, #49 ; 0x31
8001394: 425a negs r2, r3
8001396: 4153 adcs r3, r2
8001398: b2db uxtb r3, r3
800139a: 001a movs r2, r3
800139c: 2390 movs r3, #144 ; 0x90
800139e: 05db lsls r3, r3, #23
80013a0: 2180 movs r1, #128 ; 0x80
80013a2: 0018 movs r0, r3
80013a4: f000 fc19 bl 8001bda <HAL_GPIO_WritePin>
if (sensor == 4)
80013a8: 230f movs r3, #15
80013aa: 18fb adds r3, r7, r3
80013ac: 781b ldrb r3, [r3, #0]
80013ae: 2b04 cmp r3, #4
80013b0: d10b bne.n 80013ca <receive+0x5e>
HAL_GPIO_WritePin(Relay2_GPIO_Port, Relay2_Pin, (mymsg->data[0]=='1')?SET:RESET);
80013b2: 687b ldr r3, [r7, #4]
80013b4: 79db ldrb r3, [r3, #7]
80013b6: 3b31 subs r3, #49 ; 0x31
80013b8: 425a negs r2, r3
80013ba: 4153 adcs r3, r2
80013bc: b2db uxtb r3, r3
80013be: 001a movs r2, r3
80013c0: 4b04 ldr r3, [pc, #16] ; (80013d4 <receive+0x68>)
80013c2: 2102 movs r1, #2
80013c4: 0018 movs r0, r3
80013c6: f000 fc08 bl 8001bda <HAL_GPIO_WritePin>
}
}
80013ca: 46c0 nop ; (mov r8, r8)
80013cc: 46bd mov sp, r7
80013ce: b004 add sp, #16
80013d0: bd80 pop {r7, pc}
80013d2: 46c0 nop ; (mov r8, r8)
80013d4: 48000400 .word 0x48000400
080013d8 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
80013d8: b580 push {r7, lr}
80013da: af00 add r7, sp, #0
__ASM volatile ("cpsid i" : : : "memory");
80013dc: b672 cpsid i
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
80013de: e7fe b.n 80013de <Error_Handler+0x6>
080013e0 <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
80013e0: b580 push {r7, lr}
80013e2: b082 sub sp, #8
80013e4: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
80013e6: 4b0f ldr r3, [pc, #60] ; (8001424 <HAL_MspInit+0x44>)
80013e8: 699a ldr r2, [r3, #24]
80013ea: 4b0e ldr r3, [pc, #56] ; (8001424 <HAL_MspInit+0x44>)
80013ec: 2101 movs r1, #1
80013ee: 430a orrs r2, r1
80013f0: 619a str r2, [r3, #24]
80013f2: 4b0c ldr r3, [pc, #48] ; (8001424 <HAL_MspInit+0x44>)
80013f4: 699b ldr r3, [r3, #24]
80013f6: 2201 movs r2, #1
80013f8: 4013 ands r3, r2
80013fa: 607b str r3, [r7, #4]
80013fc: 687b ldr r3, [r7, #4]
__HAL_RCC_PWR_CLK_ENABLE();
80013fe: 4b09 ldr r3, [pc, #36] ; (8001424 <HAL_MspInit+0x44>)
8001400: 69da ldr r2, [r3, #28]
8001402: 4b08 ldr r3, [pc, #32] ; (8001424 <HAL_MspInit+0x44>)
8001404: 2180 movs r1, #128 ; 0x80
8001406: 0549 lsls r1, r1, #21
8001408: 430a orrs r2, r1
800140a: 61da str r2, [r3, #28]
800140c: 4b05 ldr r3, [pc, #20] ; (8001424 <HAL_MspInit+0x44>)
800140e: 69da ldr r2, [r3, #28]
8001410: 2380 movs r3, #128 ; 0x80
8001412: 055b lsls r3, r3, #21
8001414: 4013 ands r3, r2
8001416: 603b str r3, [r7, #0]
8001418: 683b ldr r3, [r7, #0]
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
800141a: 46c0 nop ; (mov r8, r8)
800141c: 46bd mov sp, r7
800141e: b002 add sp, #8
8001420: bd80 pop {r7, pc}
8001422: 46c0 nop ; (mov r8, r8)
8001424: 40021000 .word 0x40021000
08001428 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8001428: b580 push {r7, lr}
800142a: b08a sub sp, #40 ; 0x28
800142c: af00 add r7, sp, #0
800142e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001430: 2314 movs r3, #20
8001432: 18fb adds r3, r7, r3
8001434: 0018 movs r0, r3
8001436: 2314 movs r3, #20
8001438: 001a movs r2, r3
800143a: 2100 movs r1, #0
800143c: f001 fd15 bl 8002e6a <memset>
if(huart->Instance==USART1)
8001440: 687b ldr r3, [r7, #4]
8001442: 681b ldr r3, [r3, #0]
8001444: 4a21 ldr r2, [pc, #132] ; (80014cc <HAL_UART_MspInit+0xa4>)
8001446: 4293 cmp r3, r2
8001448: d13b bne.n 80014c2 <HAL_UART_MspInit+0x9a>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
800144a: 4b21 ldr r3, [pc, #132] ; (80014d0 <HAL_UART_MspInit+0xa8>)
800144c: 699a ldr r2, [r3, #24]
800144e: 4b20 ldr r3, [pc, #128] ; (80014d0 <HAL_UART_MspInit+0xa8>)
8001450: 2180 movs r1, #128 ; 0x80
8001452: 01c9 lsls r1, r1, #7
8001454: 430a orrs r2, r1
8001456: 619a str r2, [r3, #24]
8001458: 4b1d ldr r3, [pc, #116] ; (80014d0 <HAL_UART_MspInit+0xa8>)
800145a: 699a ldr r2, [r3, #24]
800145c: 2380 movs r3, #128 ; 0x80
800145e: 01db lsls r3, r3, #7
8001460: 4013 ands r3, r2
8001462: 613b str r3, [r7, #16]
8001464: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOA_CLK_ENABLE();
8001466: 4b1a ldr r3, [pc, #104] ; (80014d0 <HAL_UART_MspInit+0xa8>)
8001468: 695a ldr r2, [r3, #20]
800146a: 4b19 ldr r3, [pc, #100] ; (80014d0 <HAL_UART_MspInit+0xa8>)
800146c: 2180 movs r1, #128 ; 0x80
800146e: 0289 lsls r1, r1, #10
8001470: 430a orrs r2, r1
8001472: 615a str r2, [r3, #20]
8001474: 4b16 ldr r3, [pc, #88] ; (80014d0 <HAL_UART_MspInit+0xa8>)
8001476: 695a ldr r2, [r3, #20]
8001478: 2380 movs r3, #128 ; 0x80
800147a: 029b lsls r3, r3, #10
800147c: 4013 ands r3, r2
800147e: 60fb str r3, [r7, #12]
8001480: 68fb ldr r3, [r7, #12]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
8001482: 2114 movs r1, #20
8001484: 187b adds r3, r7, r1
8001486: 22c0 movs r2, #192 ; 0xc0
8001488: 00d2 lsls r2, r2, #3
800148a: 601a str r2, [r3, #0]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
800148c: 187b adds r3, r7, r1
800148e: 2202 movs r2, #2
8001490: 605a str r2, [r3, #4]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001492: 187b adds r3, r7, r1
8001494: 2200 movs r2, #0
8001496: 609a str r2, [r3, #8]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8001498: 187b adds r3, r7, r1
800149a: 2203 movs r2, #3
800149c: 60da str r2, [r3, #12]
GPIO_InitStruct.Alternate = GPIO_AF1_USART1;
800149e: 187b adds r3, r7, r1
80014a0: 2201 movs r2, #1
80014a2: 611a str r2, [r3, #16]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80014a4: 187a adds r2, r7, r1
80014a6: 2390 movs r3, #144 ; 0x90
80014a8: 05db lsls r3, r3, #23
80014aa: 0011 movs r1, r2
80014ac: 0018 movs r0, r3
80014ae: f000 fa07 bl 80018c0 <HAL_GPIO_Init>
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
80014b2: 2200 movs r2, #0
80014b4: 2100 movs r1, #0
80014b6: 201b movs r0, #27
80014b8: f000 f9d0 bl 800185c <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USART1_IRQn);
80014bc: 201b movs r0, #27
80014be: f000 f9e2 bl 8001886 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
}
}
80014c2: 46c0 nop ; (mov r8, r8)
80014c4: 46bd mov sp, r7
80014c6: b00a add sp, #40 ; 0x28
80014c8: bd80 pop {r7, pc}
80014ca: 46c0 nop ; (mov r8, r8)
80014cc: 40013800 .word 0x40013800
80014d0: 40021000 .word 0x40021000
080014d4 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
80014d4: b580 push {r7, lr}
80014d6: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
80014d8: e7fe b.n 80014d8 <NMI_Handler+0x4>
080014da <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
80014da: b580 push {r7, lr}
80014dc: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
80014de: e7fe b.n 80014de <HardFault_Handler+0x4>
080014e0 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
80014e0: b580 push {r7, lr}
80014e2: af00 add r7, sp, #0
/* USER CODE END SVC_IRQn 0 */
/* USER CODE BEGIN SVC_IRQn 1 */
/* USER CODE END SVC_IRQn 1 */
}
80014e4: 46c0 nop ; (mov r8, r8)
80014e6: 46bd mov sp, r7
80014e8: bd80 pop {r7, pc}
080014ea <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
80014ea: b580 push {r7, lr}
80014ec: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
80014ee: 46c0 nop ; (mov r8, r8)
80014f0: 46bd mov sp, r7
80014f2: bd80 pop {r7, pc}
080014f4 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
80014f4: b580 push {r7, lr}
80014f6: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
80014f8: f000 f8c6 bl 8001688 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
80014fc: 46c0 nop ; (mov r8, r8)
80014fe: 46bd mov sp, r7
8001500: bd80 pop {r7, pc}
...
08001504 <USART1_IRQHandler>:
/**
* @brief This function handles USART1 global interrupt.
*/
void USART1_IRQHandler(void)
{
8001504: b580 push {r7, lr}
8001506: af00 add r7, sp, #0
/* USER CODE BEGIN USART1_IRQn 0 */
_byte = USART1->RDR;
8001508: 4b05 ldr r3, [pc, #20] ; (8001520 <USART1_IRQHandler+0x1c>)
800150a: 8c9b ldrh r3, [r3, #36] ; 0x24
800150c: b29b uxth r3, r3
800150e: b2da uxtb r2, r3
8001510: 4b04 ldr r3, [pc, #16] ; (8001524 <USART1_IRQHandler+0x20>)
8001512: 701a strb r2, [r3, #0]
_byte_received = 1;
8001514: 4b04 ldr r3, [pc, #16] ; (8001528 <USART1_IRQHandler+0x24>)
8001516: 2201 movs r2, #1
8001518: 701a strb r2, [r3, #0]
return; // To avoid calling the handler at all
800151a: 46c0 nop ; (mov r8, r8)
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
800151c: 46bd mov sp, r7
800151e: bd80 pop {r7, pc}
8001520: 40013800 .word 0x40013800
8001524: 20000124 .word 0x20000124
8001528: 200000b0 .word 0x200000b0
0800152c <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
800152c: b580 push {r7, lr}
800152e: b086 sub sp, #24
8001530: af00 add r7, sp, #0
8001532: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8001534: 4a14 ldr r2, [pc, #80] ; (8001588 <_sbrk+0x5c>)
8001536: 4b15 ldr r3, [pc, #84] ; (800158c <_sbrk+0x60>)
8001538: 1ad3 subs r3, r2, r3
800153a: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
800153c: 697b ldr r3, [r7, #20]
800153e: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8001540: 4b13 ldr r3, [pc, #76] ; (8001590 <_sbrk+0x64>)
8001542: 681b ldr r3, [r3, #0]
8001544: 2b00 cmp r3, #0
8001546: d102 bne.n 800154e <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8001548: 4b11 ldr r3, [pc, #68] ; (8001590 <_sbrk+0x64>)
800154a: 4a12 ldr r2, [pc, #72] ; (8001594 <_sbrk+0x68>)
800154c: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
800154e: 4b10 ldr r3, [pc, #64] ; (8001590 <_sbrk+0x64>)
8001550: 681a ldr r2, [r3, #0]
8001552: 687b ldr r3, [r7, #4]
8001554: 18d3 adds r3, r2, r3
8001556: 693a ldr r2, [r7, #16]
8001558: 429a cmp r2, r3
800155a: d207 bcs.n 800156c <_sbrk+0x40>
{
errno = ENOMEM;
800155c: f001 fc52 bl 8002e04 <__errno>
8001560: 0003 movs r3, r0
8001562: 220c movs r2, #12
8001564: 601a str r2, [r3, #0]
return (void *)-1;
8001566: 2301 movs r3, #1
8001568: 425b negs r3, r3
800156a: e009 b.n 8001580 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
800156c: 4b08 ldr r3, [pc, #32] ; (8001590 <_sbrk+0x64>)
800156e: 681b ldr r3, [r3, #0]
8001570: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8001572: 4b07 ldr r3, [pc, #28] ; (8001590 <_sbrk+0x64>)
8001574: 681a ldr r2, [r3, #0]
8001576: 687b ldr r3, [r7, #4]
8001578: 18d2 adds r2, r2, r3
800157a: 4b05 ldr r3, [pc, #20] ; (8001590 <_sbrk+0x64>)
800157c: 601a str r2, [r3, #0]
return (void *)prev_heap_end;
800157e: 68fb ldr r3, [r7, #12]
}
8001580: 0018 movs r0, r3
8001582: 46bd mov sp, r7
8001584: b006 add sp, #24
8001586: bd80 pop {r7, pc}
8001588: 20001000 .word 0x20001000
800158c: 00000400 .word 0x00000400
8001590: 20000098 .word 0x20000098
8001594: 200001b8 .word 0x200001b8
08001598 <SystemInit>:
* @brief Setup the microcontroller system
* @param None
* @retval None
*/
void SystemInit(void)
{
8001598: b580 push {r7, lr}
800159a: af00 add r7, sp, #0
before branch to main program. This call is made inside
the "startup_stm32f0xx.s" file.
User can setups the default system clock (System clock source, PLL Multiplier
and Divider factors, AHB/APBx prescalers and Flash settings).
*/
}
800159c: 46c0 nop ; (mov r8, r8)
800159e: 46bd mov sp, r7
80015a0: bd80 pop {r7, pc}
...
080015a4 <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =_estack
80015a4: 480d ldr r0, [pc, #52] ; (80015dc <LoopForever+0x2>)
mov sp, r0 /* set stack pointer */
80015a6: 4685 mov sp, r0
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
80015a8: 480d ldr r0, [pc, #52] ; (80015e0 <LoopForever+0x6>)
ldr r1, =_edata
80015aa: 490e ldr r1, [pc, #56] ; (80015e4 <LoopForever+0xa>)
ldr r2, =_sidata
80015ac: 4a0e ldr r2, [pc, #56] ; (80015e8 <LoopForever+0xe>)
movs r3, #0
80015ae: 2300 movs r3, #0
b LoopCopyDataInit
80015b0: e002 b.n 80015b8 <LoopCopyDataInit>
080015b2 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
80015b2: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
80015b4: 50c4 str r4, [r0, r3]
adds r3, r3, #4
80015b6: 3304 adds r3, #4
080015b8 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
80015b8: 18c4 adds r4, r0, r3
cmp r4, r1
80015ba: 428c cmp r4, r1
bcc CopyDataInit
80015bc: d3f9 bcc.n 80015b2 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
80015be: 4a0b ldr r2, [pc, #44] ; (80015ec <LoopForever+0x12>)
ldr r4, =_ebss
80015c0: 4c0b ldr r4, [pc, #44] ; (80015f0 <LoopForever+0x16>)
movs r3, #0
80015c2: 2300 movs r3, #0
b LoopFillZerobss
80015c4: e001 b.n 80015ca <LoopFillZerobss>
080015c6 <FillZerobss>:
FillZerobss:
str r3, [r2]
80015c6: 6013 str r3, [r2, #0]
adds r2, r2, #4
80015c8: 3204 adds r2, #4
080015ca <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
80015ca: 42a2 cmp r2, r4
bcc FillZerobss
80015cc: d3fb bcc.n 80015c6 <FillZerobss>
/* Call the clock system intitialization function.*/
bl SystemInit
80015ce: f7ff ffe3 bl 8001598 <SystemInit>
/* Call static constructors */
bl __libc_init_array
80015d2: f001 fc1d bl 8002e10 <__libc_init_array>
/* Call the application's entry point.*/
bl main
80015d6: f7ff fc27 bl 8000e28 <main>
080015da <LoopForever>:
LoopForever:
b LoopForever
80015da: e7fe b.n 80015da <LoopForever>
ldr r0, =_estack
80015dc: 20001000 .word 0x20001000
ldr r0, =_sdata
80015e0: 20000000 .word 0x20000000
ldr r1, =_edata
80015e4: 20000074 .word 0x20000074
ldr r2, =_sidata
80015e8: 080030f4 .word 0x080030f4
ldr r2, =_sbss
80015ec: 20000074 .word 0x20000074
ldr r4, =_ebss
80015f0: 200001b4 .word 0x200001b4
080015f4 <ADC1_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
80015f4: e7fe b.n 80015f4 <ADC1_IRQHandler>
...
080015f8 <HAL_Init>:
* In the default implementation,Systick is used as source of time base.
* The tick variable is incremented each 1ms in its ISR.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
80015f8: b580 push {r7, lr}
80015fa: af00 add r7, sp, #0
/* Configure Flash prefetch */
#if (PREFETCH_ENABLE != 0)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
80015fc: 4b07 ldr r3, [pc, #28] ; (800161c <HAL_Init+0x24>)
80015fe: 681a ldr r2, [r3, #0]
8001600: 4b06 ldr r3, [pc, #24] ; (800161c <HAL_Init+0x24>)
8001602: 2110 movs r1, #16
8001604: 430a orrs r2, r1
8001606: 601a str r2, [r3, #0]
#endif /* PREFETCH_ENABLE */
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8001608: 2000 movs r0, #0
800160a: f000 f809 bl 8001620 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
800160e: f7ff fee7 bl 80013e0 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8001612: 2300 movs r3, #0
}
8001614: 0018 movs r0, r3
8001616: 46bd mov sp, r7
8001618: bd80 pop {r7, pc}
800161a: 46c0 nop ; (mov r8, r8)
800161c: 40022000 .word 0x40022000
08001620 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8001620: b590 push {r4, r7, lr}
8001622: b083 sub sp, #12
8001624: af00 add r7, sp, #0
8001626: 6078 str r0, [r7, #4]
/*Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8001628: 4b14 ldr r3, [pc, #80] ; (800167c <HAL_InitTick+0x5c>)
800162a: 681c ldr r4, [r3, #0]
800162c: 4b14 ldr r3, [pc, #80] ; (8001680 <HAL_InitTick+0x60>)
800162e: 781b ldrb r3, [r3, #0]
8001630: 0019 movs r1, r3
8001632: 23fa movs r3, #250 ; 0xfa
8001634: 0098 lsls r0, r3, #2
8001636: f7fe fd6f bl 8000118 <__udivsi3>
800163a: 0003 movs r3, r0
800163c: 0019 movs r1, r3
800163e: 0020 movs r0, r4
8001640: f7fe fd6a bl 8000118 <__udivsi3>
8001644: 0003 movs r3, r0
8001646: 0018 movs r0, r3
8001648: f000 f92d bl 80018a6 <HAL_SYSTICK_Config>
800164c: 1e03 subs r3, r0, #0
800164e: d001 beq.n 8001654 <HAL_InitTick+0x34>
{
return HAL_ERROR;
8001650: 2301 movs r3, #1
8001652: e00f b.n 8001674 <HAL_InitTick+0x54>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8001654: 687b ldr r3, [r7, #4]
8001656: 2b03 cmp r3, #3
8001658: d80b bhi.n 8001672 <HAL_InitTick+0x52>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
800165a: 6879 ldr r1, [r7, #4]
800165c: 2301 movs r3, #1
800165e: 425b negs r3, r3
8001660: 2200 movs r2, #0
8001662: 0018 movs r0, r3
8001664: f000 f8fa bl 800185c <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8001668: 4b06 ldr r3, [pc, #24] ; (8001684 <HAL_InitTick+0x64>)
800166a: 687a ldr r2, [r7, #4]
800166c: 601a str r2, [r3, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
800166e: 2300 movs r3, #0
8001670: e000 b.n 8001674 <HAL_InitTick+0x54>
return HAL_ERROR;
8001672: 2301 movs r3, #1
}
8001674: 0018 movs r0, r3
8001676: 46bd mov sp, r7
8001678: b003 add sp, #12
800167a: bd90 pop {r4, r7, pc}
800167c: 20000004 .word 0x20000004
8001680: 2000000c .word 0x2000000c
8001684: 20000008 .word 0x20000008
08001688 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8001688: b580 push {r7, lr}
800168a: af00 add r7, sp, #0
uwTick += uwTickFreq;
800168c: 4b05 ldr r3, [pc, #20] ; (80016a4 <HAL_IncTick+0x1c>)
800168e: 781b ldrb r3, [r3, #0]
8001690: 001a movs r2, r3
8001692: 4b05 ldr r3, [pc, #20] ; (80016a8 <HAL_IncTick+0x20>)
8001694: 681b ldr r3, [r3, #0]
8001696: 18d2 adds r2, r2, r3
8001698: 4b03 ldr r3, [pc, #12] ; (80016a8 <HAL_IncTick+0x20>)
800169a: 601a str r2, [r3, #0]
}
800169c: 46c0 nop ; (mov r8, r8)
800169e: 46bd mov sp, r7
80016a0: bd80 pop {r7, pc}
80016a2: 46c0 nop ; (mov r8, r8)
80016a4: 2000000c .word 0x2000000c
80016a8: 200001ac .word 0x200001ac
080016ac <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
80016ac: b580 push {r7, lr}
80016ae: af00 add r7, sp, #0
return uwTick;
80016b0: 4b02 ldr r3, [pc, #8] ; (80016bc <HAL_GetTick+0x10>)
80016b2: 681b ldr r3, [r3, #0]
}
80016b4: 0018 movs r0, r3
80016b6: 46bd mov sp, r7
80016b8: bd80 pop {r7, pc}
80016ba: 46c0 nop ; (mov r8, r8)
80016bc: 200001ac .word 0x200001ac
080016c0 <HAL_Delay>:
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
80016c0: b580 push {r7, lr}
80016c2: b084 sub sp, #16
80016c4: af00 add r7, sp, #0
80016c6: 6078 str r0, [r7, #4]
uint32_t tickstart = HAL_GetTick();
80016c8: f7ff fff0 bl 80016ac <HAL_GetTick>
80016cc: 0003 movs r3, r0
80016ce: 60bb str r3, [r7, #8]
uint32_t wait = Delay;
80016d0: 687b ldr r3, [r7, #4]
80016d2: 60fb str r3, [r7, #12]
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
80016d4: 68fb ldr r3, [r7, #12]
80016d6: 3301 adds r3, #1
80016d8: d005 beq.n 80016e6 <HAL_Delay+0x26>
{
wait += (uint32_t)(uwTickFreq);
80016da: 4b09 ldr r3, [pc, #36] ; (8001700 <HAL_Delay+0x40>)
80016dc: 781b ldrb r3, [r3, #0]
80016de: 001a movs r2, r3
80016e0: 68fb ldr r3, [r7, #12]
80016e2: 189b adds r3, r3, r2
80016e4: 60fb str r3, [r7, #12]
}
while((HAL_GetTick() - tickstart) < wait)
80016e6: 46c0 nop ; (mov r8, r8)
80016e8: f7ff ffe0 bl 80016ac <HAL_GetTick>
80016ec: 0002 movs r2, r0
80016ee: 68bb ldr r3, [r7, #8]
80016f0: 1ad3 subs r3, r2, r3
80016f2: 68fa ldr r2, [r7, #12]
80016f4: 429a cmp r2, r3
80016f6: d8f7 bhi.n 80016e8 <HAL_Delay+0x28>
{
}
}
80016f8: 46c0 nop ; (mov r8, r8)
80016fa: 46bd mov sp, r7
80016fc: b004 add sp, #16
80016fe: bd80 pop {r7, pc}
8001700: 2000000c .word 0x2000000c
08001704 <__NVIC_EnableIRQ>:
{
8001704: b580 push {r7, lr}
8001706: b082 sub sp, #8
8001708: af00 add r7, sp, #0
800170a: 0002 movs r2, r0
800170c: 1dfb adds r3, r7, #7
800170e: 701a strb r2, [r3, #0]
if ((int32_t)(IRQn) >= 0)
8001710: 1dfb adds r3, r7, #7
8001712: 781b ldrb r3, [r3, #0]
8001714: 2b7f cmp r3, #127 ; 0x7f
8001716: d809 bhi.n 800172c <__NVIC_EnableIRQ+0x28>
NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8001718: 1dfb adds r3, r7, #7
800171a: 781b ldrb r3, [r3, #0]
800171c: 001a movs r2, r3
800171e: 231f movs r3, #31
8001720: 401a ands r2, r3
8001722: 4b04 ldr r3, [pc, #16] ; (8001734 <__NVIC_EnableIRQ+0x30>)
8001724: 2101 movs r1, #1
8001726: 4091 lsls r1, r2
8001728: 000a movs r2, r1
800172a: 601a str r2, [r3, #0]
}
800172c: 46c0 nop ; (mov r8, r8)
800172e: 46bd mov sp, r7
8001730: b002 add sp, #8
8001732: bd80 pop {r7, pc}
8001734: e000e100 .word 0xe000e100
08001738 <__NVIC_SetPriority>:
{
8001738: b590 push {r4, r7, lr}
800173a: b083 sub sp, #12
800173c: af00 add r7, sp, #0
800173e: 0002 movs r2, r0
8001740: 6039 str r1, [r7, #0]
8001742: 1dfb adds r3, r7, #7
8001744: 701a strb r2, [r3, #0]
if ((int32_t)(IRQn) >= 0)
8001746: 1dfb adds r3, r7, #7
8001748: 781b ldrb r3, [r3, #0]
800174a: 2b7f cmp r3, #127 ; 0x7f
800174c: d828 bhi.n 80017a0 <__NVIC_SetPriority+0x68>
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
800174e: 4a2f ldr r2, [pc, #188] ; (800180c <__NVIC_SetPriority+0xd4>)
8001750: 1dfb adds r3, r7, #7
8001752: 781b ldrb r3, [r3, #0]
8001754: b25b sxtb r3, r3
8001756: 089b lsrs r3, r3, #2
8001758: 33c0 adds r3, #192 ; 0xc0
800175a: 009b lsls r3, r3, #2
800175c: 589b ldr r3, [r3, r2]
800175e: 1dfa adds r2, r7, #7
8001760: 7812 ldrb r2, [r2, #0]
8001762: 0011 movs r1, r2
8001764: 2203 movs r2, #3
8001766: 400a ands r2, r1
8001768: 00d2 lsls r2, r2, #3
800176a: 21ff movs r1, #255 ; 0xff
800176c: 4091 lsls r1, r2
800176e: 000a movs r2, r1
8001770: 43d2 mvns r2, r2
8001772: 401a ands r2, r3
8001774: 0011 movs r1, r2
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
8001776: 683b ldr r3, [r7, #0]
8001778: 019b lsls r3, r3, #6
800177a: 22ff movs r2, #255 ; 0xff
800177c: 401a ands r2, r3
800177e: 1dfb adds r3, r7, #7
8001780: 781b ldrb r3, [r3, #0]
8001782: 0018 movs r0, r3
8001784: 2303 movs r3, #3
8001786: 4003 ands r3, r0
8001788: 00db lsls r3, r3, #3
800178a: 409a lsls r2, r3
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
800178c: 481f ldr r0, [pc, #124] ; (800180c <__NVIC_SetPriority+0xd4>)
800178e: 1dfb adds r3, r7, #7
8001790: 781b ldrb r3, [r3, #0]
8001792: b25b sxtb r3, r3
8001794: 089b lsrs r3, r3, #2
8001796: 430a orrs r2, r1
8001798: 33c0 adds r3, #192 ; 0xc0
800179a: 009b lsls r3, r3, #2
800179c: 501a str r2, [r3, r0]
}
800179e: e031 b.n 8001804 <__NVIC_SetPriority+0xcc>
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
80017a0: 4a1b ldr r2, [pc, #108] ; (8001810 <__NVIC_SetPriority+0xd8>)
80017a2: 1dfb adds r3, r7, #7
80017a4: 781b ldrb r3, [r3, #0]
80017a6: 0019 movs r1, r3
80017a8: 230f movs r3, #15
80017aa: 400b ands r3, r1
80017ac: 3b08 subs r3, #8
80017ae: 089b lsrs r3, r3, #2
80017b0: 3306 adds r3, #6
80017b2: 009b lsls r3, r3, #2
80017b4: 18d3 adds r3, r2, r3
80017b6: 3304 adds r3, #4
80017b8: 681b ldr r3, [r3, #0]
80017ba: 1dfa adds r2, r7, #7
80017bc: 7812 ldrb r2, [r2, #0]
80017be: 0011 movs r1, r2
80017c0: 2203 movs r2, #3
80017c2: 400a ands r2, r1
80017c4: 00d2 lsls r2, r2, #3
80017c6: 21ff movs r1, #255 ; 0xff
80017c8: 4091 lsls r1, r2
80017ca: 000a movs r2, r1
80017cc: 43d2 mvns r2, r2
80017ce: 401a ands r2, r3
80017d0: 0011 movs r1, r2
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
80017d2: 683b ldr r3, [r7, #0]
80017d4: 019b lsls r3, r3, #6
80017d6: 22ff movs r2, #255 ; 0xff
80017d8: 401a ands r2, r3
80017da: 1dfb adds r3, r7, #7
80017dc: 781b ldrb r3, [r3, #0]
80017de: 0018 movs r0, r3
80017e0: 2303 movs r3, #3
80017e2: 4003 ands r3, r0
80017e4: 00db lsls r3, r3, #3
80017e6: 409a lsls r2, r3
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
80017e8: 4809 ldr r0, [pc, #36] ; (8001810 <__NVIC_SetPriority+0xd8>)
80017ea: 1dfb adds r3, r7, #7
80017ec: 781b ldrb r3, [r3, #0]
80017ee: 001c movs r4, r3
80017f0: 230f movs r3, #15
80017f2: 4023 ands r3, r4
80017f4: 3b08 subs r3, #8
80017f6: 089b lsrs r3, r3, #2
80017f8: 430a orrs r2, r1
80017fa: 3306 adds r3, #6
80017fc: 009b lsls r3, r3, #2
80017fe: 18c3 adds r3, r0, r3
8001800: 3304 adds r3, #4
8001802: 601a str r2, [r3, #0]
}
8001804: 46c0 nop ; (mov r8, r8)
8001806: 46bd mov sp, r7
8001808: b003 add sp, #12
800180a: bd90 pop {r4, r7, pc}
800180c: e000e100 .word 0xe000e100
8001810: e000ed00 .word 0xe000ed00
08001814 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8001814: b580 push {r7, lr}
8001816: b082 sub sp, #8
8001818: af00 add r7, sp, #0
800181a: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
800181c: 687b ldr r3, [r7, #4]
800181e: 3b01 subs r3, #1
8001820: 4a0c ldr r2, [pc, #48] ; (8001854 <SysTick_Config+0x40>)
8001822: 4293 cmp r3, r2
8001824: d901 bls.n 800182a <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8001826: 2301 movs r3, #1
8001828: e010 b.n 800184c <SysTick_Config+0x38>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
800182a: 4b0b ldr r3, [pc, #44] ; (8001858 <SysTick_Config+0x44>)
800182c: 687a ldr r2, [r7, #4]
800182e: 3a01 subs r2, #1
8001830: 605a str r2, [r3, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
8001832: 2301 movs r3, #1
8001834: 425b negs r3, r3
8001836: 2103 movs r1, #3
8001838: 0018 movs r0, r3
800183a: f7ff ff7d bl 8001738 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
800183e: 4b06 ldr r3, [pc, #24] ; (8001858 <SysTick_Config+0x44>)
8001840: 2200 movs r2, #0
8001842: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
8001844: 4b04 ldr r3, [pc, #16] ; (8001858 <SysTick_Config+0x44>)
8001846: 2207 movs r2, #7
8001848: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
800184a: 2300 movs r3, #0
}
800184c: 0018 movs r0, r3
800184e: 46bd mov sp, r7
8001850: b002 add sp, #8
8001852: bd80 pop {r7, pc}
8001854: 00ffffff .word 0x00ffffff
8001858: e000e010 .word 0xe000e010
0800185c <HAL_NVIC_SetPriority>:
* with stm32f0xx devices, this parameter is a dummy value and it is ignored, because
* no subpriority supported in Cortex M0 based products.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
800185c: b580 push {r7, lr}
800185e: b084 sub sp, #16
8001860: af00 add r7, sp, #0
8001862: 60b9 str r1, [r7, #8]
8001864: 607a str r2, [r7, #4]
8001866: 210f movs r1, #15
8001868: 187b adds r3, r7, r1
800186a: 1c02 adds r2, r0, #0
800186c: 701a strb r2, [r3, #0]
/* Check the parameters */
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
NVIC_SetPriority(IRQn,PreemptPriority);
800186e: 68ba ldr r2, [r7, #8]
8001870: 187b adds r3, r7, r1
8001872: 781b ldrb r3, [r3, #0]
8001874: b25b sxtb r3, r3
8001876: 0011 movs r1, r2
8001878: 0018 movs r0, r3
800187a: f7ff ff5d bl 8001738 <__NVIC_SetPriority>
}
800187e: 46c0 nop ; (mov r8, r8)
8001880: 46bd mov sp, r7
8001882: b004 add sp, #16
8001884: bd80 pop {r7, pc}
08001886 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8001886: b580 push {r7, lr}
8001888: b082 sub sp, #8
800188a: af00 add r7, sp, #0
800188c: 0002 movs r2, r0
800188e: 1dfb adds r3, r7, #7
8001890: 701a strb r2, [r3, #0]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8001892: 1dfb adds r3, r7, #7
8001894: 781b ldrb r3, [r3, #0]
8001896: b25b sxtb r3, r3
8001898: 0018 movs r0, r3
800189a: f7ff ff33 bl 8001704 <__NVIC_EnableIRQ>
}
800189e: 46c0 nop ; (mov r8, r8)
80018a0: 46bd mov sp, r7
80018a2: b002 add sp, #8
80018a4: bd80 pop {r7, pc}
080018a6 <HAL_SYSTICK_Config>:
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
80018a6: b580 push {r7, lr}
80018a8: b082 sub sp, #8
80018aa: af00 add r7, sp, #0
80018ac: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
80018ae: 687b ldr r3, [r7, #4]
80018b0: 0018 movs r0, r3
80018b2: f7ff ffaf bl 8001814 <SysTick_Config>
80018b6: 0003 movs r3, r0
}
80018b8: 0018 movs r0, r3
80018ba: 46bd mov sp, r7
80018bc: b002 add sp, #8
80018be: bd80 pop {r7, pc}
080018c0 <HAL_GPIO_Init>:
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
80018c0: b580 push {r7, lr}
80018c2: b086 sub sp, #24
80018c4: af00 add r7, sp, #0
80018c6: 6078 str r0, [r7, #4]
80018c8: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
80018ca: 2300 movs r3, #0
80018cc: 617b str r3, [r7, #20]
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
80018ce: e14f b.n 8001b70 <HAL_GPIO_Init+0x2b0>
{
/* Get current io position */
iocurrent = (GPIO_Init->Pin) & (1uL << position);
80018d0: 683b ldr r3, [r7, #0]
80018d2: 681b ldr r3, [r3, #0]
80018d4: 2101 movs r1, #1
80018d6: 697a ldr r2, [r7, #20]
80018d8: 4091 lsls r1, r2
80018da: 000a movs r2, r1
80018dc: 4013 ands r3, r2
80018de: 60fb str r3, [r7, #12]
if (iocurrent != 0x00u)
80018e0: 68fb ldr r3, [r7, #12]
80018e2: 2b00 cmp r3, #0
80018e4: d100 bne.n 80018e8 <HAL_GPIO_Init+0x28>
80018e6: e140 b.n 8001b6a <HAL_GPIO_Init+0x2aa>
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
80018e8: 683b ldr r3, [r7, #0]
80018ea: 685b ldr r3, [r3, #4]
80018ec: 2b01 cmp r3, #1
80018ee: d00b beq.n 8001908 <HAL_GPIO_Init+0x48>
80018f0: 683b ldr r3, [r7, #0]
80018f2: 685b ldr r3, [r3, #4]
80018f4: 2b02 cmp r3, #2
80018f6: d007 beq.n 8001908 <HAL_GPIO_Init+0x48>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
80018f8: 683b ldr r3, [r7, #0]
80018fa: 685b ldr r3, [r3, #4]
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
80018fc: 2b11 cmp r3, #17
80018fe: d003 beq.n 8001908 <HAL_GPIO_Init+0x48>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
8001900: 683b ldr r3, [r7, #0]
8001902: 685b ldr r3, [r3, #4]
8001904: 2b12 cmp r3, #18
8001906: d130 bne.n 800196a <HAL_GPIO_Init+0xaa>
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
8001908: 687b ldr r3, [r7, #4]
800190a: 689b ldr r3, [r3, #8]
800190c: 613b str r3, [r7, #16]
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u));
800190e: 697b ldr r3, [r7, #20]
8001910: 005b lsls r3, r3, #1
8001912: 2203 movs r2, #3
8001914: 409a lsls r2, r3
8001916: 0013 movs r3, r2
8001918: 43da mvns r2, r3
800191a: 693b ldr r3, [r7, #16]
800191c: 4013 ands r3, r2
800191e: 613b str r3, [r7, #16]
temp |= (GPIO_Init->Speed << (position * 2u));
8001920: 683b ldr r3, [r7, #0]
8001922: 68da ldr r2, [r3, #12]
8001924: 697b ldr r3, [r7, #20]
8001926: 005b lsls r3, r3, #1
8001928: 409a lsls r2, r3
800192a: 0013 movs r3, r2
800192c: 693a ldr r2, [r7, #16]
800192e: 4313 orrs r3, r2
8001930: 613b str r3, [r7, #16]
GPIOx->OSPEEDR = temp;
8001932: 687b ldr r3, [r7, #4]
8001934: 693a ldr r2, [r7, #16]
8001936: 609a str r2, [r3, #8]
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
8001938: 687b ldr r3, [r7, #4]
800193a: 685b ldr r3, [r3, #4]
800193c: 613b str r3, [r7, #16]
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
800193e: 2201 movs r2, #1
8001940: 697b ldr r3, [r7, #20]
8001942: 409a lsls r2, r3
8001944: 0013 movs r3, r2
8001946: 43da mvns r2, r3
8001948: 693b ldr r3, [r7, #16]
800194a: 4013 ands r3, r2
800194c: 613b str r3, [r7, #16]
temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4u) << position);
800194e: 683b ldr r3, [r7, #0]
8001950: 685b ldr r3, [r3, #4]
8001952: 091b lsrs r3, r3, #4
8001954: 2201 movs r2, #1
8001956: 401a ands r2, r3
8001958: 697b ldr r3, [r7, #20]
800195a: 409a lsls r2, r3
800195c: 0013 movs r3, r2
800195e: 693a ldr r2, [r7, #16]
8001960: 4313 orrs r3, r2
8001962: 613b str r3, [r7, #16]
GPIOx->OTYPER = temp;
8001964: 687b ldr r3, [r7, #4]
8001966: 693a ldr r2, [r7, #16]
8001968: 605a str r2, [r3, #4]
}
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
800196a: 687b ldr r3, [r7, #4]
800196c: 68db ldr r3, [r3, #12]
800196e: 613b str r3, [r7, #16]
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u));
8001970: 697b ldr r3, [r7, #20]
8001972: 005b lsls r3, r3, #1
8001974: 2203 movs r2, #3
8001976: 409a lsls r2, r3
8001978: 0013 movs r3, r2
800197a: 43da mvns r2, r3
800197c: 693b ldr r3, [r7, #16]
800197e: 4013 ands r3, r2
8001980: 613b str r3, [r7, #16]
temp |= ((GPIO_Init->Pull) << (position * 2u));
8001982: 683b ldr r3, [r7, #0]
8001984: 689a ldr r2, [r3, #8]
8001986: 697b ldr r3, [r7, #20]
8001988: 005b lsls r3, r3, #1
800198a: 409a lsls r2, r3
800198c: 0013 movs r3, r2
800198e: 693a ldr r2, [r7, #16]
8001990: 4313 orrs r3, r2
8001992: 613b str r3, [r7, #16]
GPIOx->PUPDR = temp;
8001994: 687b ldr r3, [r7, #4]
8001996: 693a ldr r2, [r7, #16]
8001998: 60da str r2, [r3, #12]
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
800199a: 683b ldr r3, [r7, #0]
800199c: 685b ldr r3, [r3, #4]
800199e: 2b02 cmp r3, #2
80019a0: d003 beq.n 80019aa <HAL_GPIO_Init+0xea>
80019a2: 683b ldr r3, [r7, #0]
80019a4: 685b ldr r3, [r3, #4]
80019a6: 2b12 cmp r3, #18
80019a8: d123 bne.n 80019f2 <HAL_GPIO_Init+0x132>
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3u];
80019aa: 697b ldr r3, [r7, #20]
80019ac: 08da lsrs r2, r3, #3
80019ae: 687b ldr r3, [r7, #4]
80019b0: 3208 adds r2, #8
80019b2: 0092 lsls r2, r2, #2
80019b4: 58d3 ldr r3, [r2, r3]
80019b6: 613b str r3, [r7, #16]
temp &= ~(0xFu << ((position & 0x07u) * 4u));
80019b8: 697b ldr r3, [r7, #20]
80019ba: 2207 movs r2, #7
80019bc: 4013 ands r3, r2
80019be: 009b lsls r3, r3, #2
80019c0: 220f movs r2, #15
80019c2: 409a lsls r2, r3
80019c4: 0013 movs r3, r2
80019c6: 43da mvns r2, r3
80019c8: 693b ldr r3, [r7, #16]
80019ca: 4013 ands r3, r2
80019cc: 613b str r3, [r7, #16]
temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u));
80019ce: 683b ldr r3, [r7, #0]
80019d0: 691a ldr r2, [r3, #16]
80019d2: 697b ldr r3, [r7, #20]
80019d4: 2107 movs r1, #7
80019d6: 400b ands r3, r1
80019d8: 009b lsls r3, r3, #2
80019da: 409a lsls r2, r3
80019dc: 0013 movs r3, r2
80019de: 693a ldr r2, [r7, #16]
80019e0: 4313 orrs r3, r2
80019e2: 613b str r3, [r7, #16]
GPIOx->AFR[position >> 3u] = temp;
80019e4: 697b ldr r3, [r7, #20]
80019e6: 08da lsrs r2, r3, #3
80019e8: 687b ldr r3, [r7, #4]
80019ea: 3208 adds r2, #8
80019ec: 0092 lsls r2, r2, #2
80019ee: 6939 ldr r1, [r7, #16]
80019f0: 50d1 str r1, [r2, r3]
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
80019f2: 687b ldr r3, [r7, #4]
80019f4: 681b ldr r3, [r3, #0]
80019f6: 613b str r3, [r7, #16]
temp &= ~(GPIO_MODER_MODER0 << (position * 2u));
80019f8: 697b ldr r3, [r7, #20]
80019fa: 005b lsls r3, r3, #1
80019fc: 2203 movs r2, #3
80019fe: 409a lsls r2, r3
8001a00: 0013 movs r3, r2
8001a02: 43da mvns r2, r3
8001a04: 693b ldr r3, [r7, #16]
8001a06: 4013 ands r3, r2
8001a08: 613b str r3, [r7, #16]
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u));
8001a0a: 683b ldr r3, [r7, #0]
8001a0c: 685b ldr r3, [r3, #4]
8001a0e: 2203 movs r2, #3
8001a10: 401a ands r2, r3
8001a12: 697b ldr r3, [r7, #20]
8001a14: 005b lsls r3, r3, #1
8001a16: 409a lsls r2, r3
8001a18: 0013 movs r3, r2
8001a1a: 693a ldr r2, [r7, #16]
8001a1c: 4313 orrs r3, r2
8001a1e: 613b str r3, [r7, #16]
GPIOx->MODER = temp;
8001a20: 687b ldr r3, [r7, #4]
8001a22: 693a ldr r2, [r7, #16]
8001a24: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8001a26: 683b ldr r3, [r7, #0]
8001a28: 685a ldr r2, [r3, #4]
8001a2a: 2380 movs r3, #128 ; 0x80
8001a2c: 055b lsls r3, r3, #21
8001a2e: 4013 ands r3, r2
8001a30: d100 bne.n 8001a34 <HAL_GPIO_Init+0x174>
8001a32: e09a b.n 8001b6a <HAL_GPIO_Init+0x2aa>
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8001a34: 4b54 ldr r3, [pc, #336] ; (8001b88 <HAL_GPIO_Init+0x2c8>)
8001a36: 699a ldr r2, [r3, #24]
8001a38: 4b53 ldr r3, [pc, #332] ; (8001b88 <HAL_GPIO_Init+0x2c8>)
8001a3a: 2101 movs r1, #1
8001a3c: 430a orrs r2, r1
8001a3e: 619a str r2, [r3, #24]
8001a40: 4b51 ldr r3, [pc, #324] ; (8001b88 <HAL_GPIO_Init+0x2c8>)
8001a42: 699b ldr r3, [r3, #24]
8001a44: 2201 movs r2, #1
8001a46: 4013 ands r3, r2
8001a48: 60bb str r3, [r7, #8]
8001a4a: 68bb ldr r3, [r7, #8]
temp = SYSCFG->EXTICR[position >> 2u];
8001a4c: 4a4f ldr r2, [pc, #316] ; (8001b8c <HAL_GPIO_Init+0x2cc>)
8001a4e: 697b ldr r3, [r7, #20]
8001a50: 089b lsrs r3, r3, #2
8001a52: 3302 adds r3, #2
8001a54: 009b lsls r3, r3, #2
8001a56: 589b ldr r3, [r3, r2]
8001a58: 613b str r3, [r7, #16]
temp &= ~(0x0FuL << (4u * (position & 0x03u)));
8001a5a: 697b ldr r3, [r7, #20]
8001a5c: 2203 movs r2, #3
8001a5e: 4013 ands r3, r2
8001a60: 009b lsls r3, r3, #2
8001a62: 220f movs r2, #15
8001a64: 409a lsls r2, r3
8001a66: 0013 movs r3, r2
8001a68: 43da mvns r2, r3
8001a6a: 693b ldr r3, [r7, #16]
8001a6c: 4013 ands r3, r2
8001a6e: 613b str r3, [r7, #16]
temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)));
8001a70: 687a ldr r2, [r7, #4]
8001a72: 2390 movs r3, #144 ; 0x90
8001a74: 05db lsls r3, r3, #23
8001a76: 429a cmp r2, r3
8001a78: d013 beq.n 8001aa2 <HAL_GPIO_Init+0x1e2>
8001a7a: 687b ldr r3, [r7, #4]
8001a7c: 4a44 ldr r2, [pc, #272] ; (8001b90 <HAL_GPIO_Init+0x2d0>)
8001a7e: 4293 cmp r3, r2
8001a80: d00d beq.n 8001a9e <HAL_GPIO_Init+0x1de>
8001a82: 687b ldr r3, [r7, #4]
8001a84: 4a43 ldr r2, [pc, #268] ; (8001b94 <HAL_GPIO_Init+0x2d4>)
8001a86: 4293 cmp r3, r2
8001a88: d007 beq.n 8001a9a <HAL_GPIO_Init+0x1da>
8001a8a: 687b ldr r3, [r7, #4]
8001a8c: 4a42 ldr r2, [pc, #264] ; (8001b98 <HAL_GPIO_Init+0x2d8>)
8001a8e: 4293 cmp r3, r2
8001a90: d101 bne.n 8001a96 <HAL_GPIO_Init+0x1d6>
8001a92: 2303 movs r3, #3
8001a94: e006 b.n 8001aa4 <HAL_GPIO_Init+0x1e4>
8001a96: 2305 movs r3, #5
8001a98: e004 b.n 8001aa4 <HAL_GPIO_Init+0x1e4>
8001a9a: 2302 movs r3, #2
8001a9c: e002 b.n 8001aa4 <HAL_GPIO_Init+0x1e4>
8001a9e: 2301 movs r3, #1
8001aa0: e000 b.n 8001aa4 <HAL_GPIO_Init+0x1e4>
8001aa2: 2300 movs r3, #0
8001aa4: 697a ldr r2, [r7, #20]
8001aa6: 2103 movs r1, #3
8001aa8: 400a ands r2, r1
8001aaa: 0092 lsls r2, r2, #2
8001aac: 4093 lsls r3, r2
8001aae: 693a ldr r2, [r7, #16]
8001ab0: 4313 orrs r3, r2
8001ab2: 613b str r3, [r7, #16]
SYSCFG->EXTICR[position >> 2u] = temp;
8001ab4: 4935 ldr r1, [pc, #212] ; (8001b8c <HAL_GPIO_Init+0x2cc>)
8001ab6: 697b ldr r3, [r7, #20]
8001ab8: 089b lsrs r3, r3, #2
8001aba: 3302 adds r3, #2
8001abc: 009b lsls r3, r3, #2
8001abe: 693a ldr r2, [r7, #16]
8001ac0: 505a str r2, [r3, r1]
/* Clear EXTI line configuration */
temp = EXTI->IMR;
8001ac2: 4b36 ldr r3, [pc, #216] ; (8001b9c <HAL_GPIO_Init+0x2dc>)
8001ac4: 681b ldr r3, [r3, #0]
8001ac6: 613b str r3, [r7, #16]
temp &= ~(iocurrent);
8001ac8: 68fb ldr r3, [r7, #12]
8001aca: 43da mvns r2, r3
8001acc: 693b ldr r3, [r7, #16]
8001ace: 4013 ands r3, r2
8001ad0: 613b str r3, [r7, #16]
if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8001ad2: 683b ldr r3, [r7, #0]
8001ad4: 685a ldr r2, [r3, #4]
8001ad6: 2380 movs r3, #128 ; 0x80
8001ad8: 025b lsls r3, r3, #9
8001ada: 4013 ands r3, r2
8001adc: d003 beq.n 8001ae6 <HAL_GPIO_Init+0x226>
{
temp |= iocurrent;
8001ade: 693a ldr r2, [r7, #16]
8001ae0: 68fb ldr r3, [r7, #12]
8001ae2: 4313 orrs r3, r2
8001ae4: 613b str r3, [r7, #16]
}
EXTI->IMR = temp;
8001ae6: 4b2d ldr r3, [pc, #180] ; (8001b9c <HAL_GPIO_Init+0x2dc>)
8001ae8: 693a ldr r2, [r7, #16]
8001aea: 601a str r2, [r3, #0]
temp = EXTI->EMR;
8001aec: 4b2b ldr r3, [pc, #172] ; (8001b9c <HAL_GPIO_Init+0x2dc>)
8001aee: 685b ldr r3, [r3, #4]
8001af0: 613b str r3, [r7, #16]
temp &= ~(iocurrent);
8001af2: 68fb ldr r3, [r7, #12]
8001af4: 43da mvns r2, r3
8001af6: 693b ldr r3, [r7, #16]
8001af8: 4013 ands r3, r2
8001afa: 613b str r3, [r7, #16]
if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8001afc: 683b ldr r3, [r7, #0]
8001afe: 685a ldr r2, [r3, #4]
8001b00: 2380 movs r3, #128 ; 0x80
8001b02: 029b lsls r3, r3, #10
8001b04: 4013 ands r3, r2
8001b06: d003 beq.n 8001b10 <HAL_GPIO_Init+0x250>
{
temp |= iocurrent;
8001b08: 693a ldr r2, [r7, #16]
8001b0a: 68fb ldr r3, [r7, #12]
8001b0c: 4313 orrs r3, r2
8001b0e: 613b str r3, [r7, #16]
}
EXTI->EMR = temp;
8001b10: 4b22 ldr r3, [pc, #136] ; (8001b9c <HAL_GPIO_Init+0x2dc>)
8001b12: 693a ldr r2, [r7, #16]
8001b14: 605a str r2, [r3, #4]
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
8001b16: 4b21 ldr r3, [pc, #132] ; (8001b9c <HAL_GPIO_Init+0x2dc>)
8001b18: 689b ldr r3, [r3, #8]
8001b1a: 613b str r3, [r7, #16]
temp &= ~(iocurrent);
8001b1c: 68fb ldr r3, [r7, #12]
8001b1e: 43da mvns r2, r3
8001b20: 693b ldr r3, [r7, #16]
8001b22: 4013 ands r3, r2
8001b24: 613b str r3, [r7, #16]
if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8001b26: 683b ldr r3, [r7, #0]
8001b28: 685a ldr r2, [r3, #4]
8001b2a: 2380 movs r3, #128 ; 0x80
8001b2c: 035b lsls r3, r3, #13
8001b2e: 4013 ands r3, r2
8001b30: d003 beq.n 8001b3a <HAL_GPIO_Init+0x27a>
{
temp |= iocurrent;
8001b32: 693a ldr r2, [r7, #16]
8001b34: 68fb ldr r3, [r7, #12]
8001b36: 4313 orrs r3, r2
8001b38: 613b str r3, [r7, #16]
}
EXTI->RTSR = temp;
8001b3a: 4b18 ldr r3, [pc, #96] ; (8001b9c <HAL_GPIO_Init+0x2dc>)
8001b3c: 693a ldr r2, [r7, #16]
8001b3e: 609a str r2, [r3, #8]
temp = EXTI->FTSR;
8001b40: 4b16 ldr r3, [pc, #88] ; (8001b9c <HAL_GPIO_Init+0x2dc>)
8001b42: 68db ldr r3, [r3, #12]
8001b44: 613b str r3, [r7, #16]
temp &= ~(iocurrent);
8001b46: 68fb ldr r3, [r7, #12]
8001b48: 43da mvns r2, r3
8001b4a: 693b ldr r3, [r7, #16]
8001b4c: 4013 ands r3, r2
8001b4e: 613b str r3, [r7, #16]
if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8001b50: 683b ldr r3, [r7, #0]
8001b52: 685a ldr r2, [r3, #4]
8001b54: 2380 movs r3, #128 ; 0x80
8001b56: 039b lsls r3, r3, #14
8001b58: 4013 ands r3, r2
8001b5a: d003 beq.n 8001b64 <HAL_GPIO_Init+0x2a4>
{
temp |= iocurrent;
8001b5c: 693a ldr r2, [r7, #16]
8001b5e: 68fb ldr r3, [r7, #12]
8001b60: 4313 orrs r3, r2
8001b62: 613b str r3, [r7, #16]
}
EXTI->FTSR = temp;
8001b64: 4b0d ldr r3, [pc, #52] ; (8001b9c <HAL_GPIO_Init+0x2dc>)
8001b66: 693a ldr r2, [r7, #16]
8001b68: 60da str r2, [r3, #12]
}
}
position++;
8001b6a: 697b ldr r3, [r7, #20]
8001b6c: 3301 adds r3, #1
8001b6e: 617b str r3, [r7, #20]
while (((GPIO_Init->Pin) >> position) != 0x00u)
8001b70: 683b ldr r3, [r7, #0]
8001b72: 681a ldr r2, [r3, #0]
8001b74: 697b ldr r3, [r7, #20]
8001b76: 40da lsrs r2, r3
8001b78: 1e13 subs r3, r2, #0
8001b7a: d000 beq.n 8001b7e <HAL_GPIO_Init+0x2be>
8001b7c: e6a8 b.n 80018d0 <HAL_GPIO_Init+0x10>
}
}
8001b7e: 46c0 nop ; (mov r8, r8)
8001b80: 46bd mov sp, r7
8001b82: b006 add sp, #24
8001b84: bd80 pop {r7, pc}
8001b86: 46c0 nop ; (mov r8, r8)
8001b88: 40021000 .word 0x40021000
8001b8c: 40010000 .word 0x40010000
8001b90: 48000400 .word 0x48000400
8001b94: 48000800 .word 0x48000800
8001b98: 48000c00 .word 0x48000c00
8001b9c: 40010400 .word 0x40010400
08001ba0 <HAL_GPIO_ReadPin>:
* @param GPIO_Pin specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
8001ba0: b580 push {r7, lr}
8001ba2: b084 sub sp, #16
8001ba4: af00 add r7, sp, #0
8001ba6: 6078 str r0, [r7, #4]
8001ba8: 000a movs r2, r1
8001baa: 1cbb adds r3, r7, #2
8001bac: 801a strh r2, [r3, #0]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
8001bae: 687b ldr r3, [r7, #4]
8001bb0: 691b ldr r3, [r3, #16]
8001bb2: 1cba adds r2, r7, #2
8001bb4: 8812 ldrh r2, [r2, #0]
8001bb6: 4013 ands r3, r2
8001bb8: d004 beq.n 8001bc4 <HAL_GPIO_ReadPin+0x24>
{
bitstatus = GPIO_PIN_SET;
8001bba: 230f movs r3, #15
8001bbc: 18fb adds r3, r7, r3
8001bbe: 2201 movs r2, #1
8001bc0: 701a strb r2, [r3, #0]
8001bc2: e003 b.n 8001bcc <HAL_GPIO_ReadPin+0x2c>
}
else
{
bitstatus = GPIO_PIN_RESET;
8001bc4: 230f movs r3, #15
8001bc6: 18fb adds r3, r7, r3
8001bc8: 2200 movs r2, #0
8001bca: 701a strb r2, [r3, #0]
}
return bitstatus;
8001bcc: 230f movs r3, #15
8001bce: 18fb adds r3, r7, r3
8001bd0: 781b ldrb r3, [r3, #0]
}
8001bd2: 0018 movs r0, r3
8001bd4: 46bd mov sp, r7
8001bd6: b004 add sp, #16
8001bd8: bd80 pop {r7, pc}
08001bda <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8001bda: b580 push {r7, lr}
8001bdc: b082 sub sp, #8
8001bde: af00 add r7, sp, #0
8001be0: 6078 str r0, [r7, #4]
8001be2: 0008 movs r0, r1
8001be4: 0011 movs r1, r2
8001be6: 1cbb adds r3, r7, #2
8001be8: 1c02 adds r2, r0, #0
8001bea: 801a strh r2, [r3, #0]
8001bec: 1c7b adds r3, r7, #1
8001bee: 1c0a adds r2, r1, #0
8001bf0: 701a strb r2, [r3, #0]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
8001bf2: 1c7b adds r3, r7, #1
8001bf4: 781b ldrb r3, [r3, #0]
8001bf6: 2b00 cmp r3, #0
8001bf8: d004 beq.n 8001c04 <HAL_GPIO_WritePin+0x2a>
{
GPIOx->BSRR = (uint32_t)GPIO_Pin;
8001bfa: 1cbb adds r3, r7, #2
8001bfc: 881a ldrh r2, [r3, #0]
8001bfe: 687b ldr r3, [r7, #4]
8001c00: 619a str r2, [r3, #24]
}
else
{
GPIOx->BRR = (uint32_t)GPIO_Pin;
}
}
8001c02: e003 b.n 8001c0c <HAL_GPIO_WritePin+0x32>
GPIOx->BRR = (uint32_t)GPIO_Pin;
8001c04: 1cbb adds r3, r7, #2
8001c06: 881a ldrh r2, [r3, #0]
8001c08: 687b ldr r3, [r7, #4]
8001c0a: 629a str r2, [r3, #40] ; 0x28
}
8001c0c: 46c0 nop ; (mov r8, r8)
8001c0e: 46bd mov sp, r7
8001c10: b002 add sp, #8
8001c12: bd80 pop {r7, pc}
08001c14 <HAL_GPIO_TogglePin>:
* @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family
* @param GPIO_Pin specifies the pin to be toggled.
* @retval None
*/
void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
8001c14: b580 push {r7, lr}
8001c16: b084 sub sp, #16
8001c18: af00 add r7, sp, #0
8001c1a: 6078 str r0, [r7, #4]
8001c1c: 000a movs r2, r1
8001c1e: 1cbb adds r3, r7, #2
8001c20: 801a strh r2, [r3, #0]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
/* get current Ouput Data Register value */
odr = GPIOx->ODR;
8001c22: 687b ldr r3, [r7, #4]
8001c24: 695b ldr r3, [r3, #20]
8001c26: 60fb str r3, [r7, #12]
/* Set selected pins that were at low level, and reset ones that were high */
GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
8001c28: 1cbb adds r3, r7, #2
8001c2a: 881b ldrh r3, [r3, #0]
8001c2c: 68fa ldr r2, [r7, #12]
8001c2e: 4013 ands r3, r2
8001c30: 041a lsls r2, r3, #16
8001c32: 68fb ldr r3, [r7, #12]
8001c34: 43db mvns r3, r3
8001c36: 1cb9 adds r1, r7, #2
8001c38: 8809 ldrh r1, [r1, #0]
8001c3a: 400b ands r3, r1
8001c3c: 431a orrs r2, r3
8001c3e: 687b ldr r3, [r7, #4]
8001c40: 619a str r2, [r3, #24]
}
8001c42: 46c0 nop ; (mov r8, r8)
8001c44: 46bd mov sp, r7
8001c46: b004 add sp, #16
8001c48: bd80 pop {r7, pc}
...
08001c4c <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8001c4c: b580 push {r7, lr}
8001c4e: b088 sub sp, #32
8001c50: af00 add r7, sp, #0
8001c52: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
uint32_t pll_config2;
/* Check Null pointer */
if(RCC_OscInitStruct == NULL)
8001c54: 687b ldr r3, [r7, #4]
8001c56: 2b00 cmp r3, #0
8001c58: d101 bne.n 8001c5e <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8001c5a: 2301 movs r3, #1
8001c5c: e303 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8001c5e: 687b ldr r3, [r7, #4]
8001c60: 681b ldr r3, [r3, #0]
8001c62: 2201 movs r2, #1
8001c64: 4013 ands r3, r2
8001c66: d100 bne.n 8001c6a <HAL_RCC_OscConfig+0x1e>
8001c68: e08d b.n 8001d86 <HAL_RCC_OscConfig+0x13a>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
8001c6a: 4bc4 ldr r3, [pc, #784] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001c6c: 685b ldr r3, [r3, #4]
8001c6e: 220c movs r2, #12
8001c70: 4013 ands r3, r2
8001c72: 2b04 cmp r3, #4
8001c74: d00e beq.n 8001c94 <HAL_RCC_OscConfig+0x48>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
8001c76: 4bc1 ldr r3, [pc, #772] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001c78: 685b ldr r3, [r3, #4]
8001c7a: 220c movs r2, #12
8001c7c: 4013 ands r3, r2
8001c7e: 2b08 cmp r3, #8
8001c80: d116 bne.n 8001cb0 <HAL_RCC_OscConfig+0x64>
8001c82: 4bbe ldr r3, [pc, #760] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001c84: 685a ldr r2, [r3, #4]
8001c86: 2380 movs r3, #128 ; 0x80
8001c88: 025b lsls r3, r3, #9
8001c8a: 401a ands r2, r3
8001c8c: 2380 movs r3, #128 ; 0x80
8001c8e: 025b lsls r3, r3, #9
8001c90: 429a cmp r2, r3
8001c92: d10d bne.n 8001cb0 <HAL_RCC_OscConfig+0x64>
{
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8001c94: 4bb9 ldr r3, [pc, #740] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001c96: 681a ldr r2, [r3, #0]
8001c98: 2380 movs r3, #128 ; 0x80
8001c9a: 029b lsls r3, r3, #10
8001c9c: 4013 ands r3, r2
8001c9e: d100 bne.n 8001ca2 <HAL_RCC_OscConfig+0x56>
8001ca0: e070 b.n 8001d84 <HAL_RCC_OscConfig+0x138>
8001ca2: 687b ldr r3, [r7, #4]
8001ca4: 685b ldr r3, [r3, #4]
8001ca6: 2b00 cmp r3, #0
8001ca8: d000 beq.n 8001cac <HAL_RCC_OscConfig+0x60>
8001caa: e06b b.n 8001d84 <HAL_RCC_OscConfig+0x138>
{
return HAL_ERROR;
8001cac: 2301 movs r3, #1
8001cae: e2da b.n 8002266 <HAL_RCC_OscConfig+0x61a>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8001cb0: 687b ldr r3, [r7, #4]
8001cb2: 685b ldr r3, [r3, #4]
8001cb4: 2b01 cmp r3, #1
8001cb6: d107 bne.n 8001cc8 <HAL_RCC_OscConfig+0x7c>
8001cb8: 4bb0 ldr r3, [pc, #704] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001cba: 681a ldr r2, [r3, #0]
8001cbc: 4baf ldr r3, [pc, #700] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001cbe: 2180 movs r1, #128 ; 0x80
8001cc0: 0249 lsls r1, r1, #9
8001cc2: 430a orrs r2, r1
8001cc4: 601a str r2, [r3, #0]
8001cc6: e02f b.n 8001d28 <HAL_RCC_OscConfig+0xdc>
8001cc8: 687b ldr r3, [r7, #4]
8001cca: 685b ldr r3, [r3, #4]
8001ccc: 2b00 cmp r3, #0
8001cce: d10c bne.n 8001cea <HAL_RCC_OscConfig+0x9e>
8001cd0: 4baa ldr r3, [pc, #680] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001cd2: 681a ldr r2, [r3, #0]
8001cd4: 4ba9 ldr r3, [pc, #676] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001cd6: 49aa ldr r1, [pc, #680] ; (8001f80 <HAL_RCC_OscConfig+0x334>)
8001cd8: 400a ands r2, r1
8001cda: 601a str r2, [r3, #0]
8001cdc: 4ba7 ldr r3, [pc, #668] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001cde: 681a ldr r2, [r3, #0]
8001ce0: 4ba6 ldr r3, [pc, #664] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001ce2: 49a8 ldr r1, [pc, #672] ; (8001f84 <HAL_RCC_OscConfig+0x338>)
8001ce4: 400a ands r2, r1
8001ce6: 601a str r2, [r3, #0]
8001ce8: e01e b.n 8001d28 <HAL_RCC_OscConfig+0xdc>
8001cea: 687b ldr r3, [r7, #4]
8001cec: 685b ldr r3, [r3, #4]
8001cee: 2b05 cmp r3, #5
8001cf0: d10e bne.n 8001d10 <HAL_RCC_OscConfig+0xc4>
8001cf2: 4ba2 ldr r3, [pc, #648] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001cf4: 681a ldr r2, [r3, #0]
8001cf6: 4ba1 ldr r3, [pc, #644] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001cf8: 2180 movs r1, #128 ; 0x80
8001cfa: 02c9 lsls r1, r1, #11
8001cfc: 430a orrs r2, r1
8001cfe: 601a str r2, [r3, #0]
8001d00: 4b9e ldr r3, [pc, #632] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001d02: 681a ldr r2, [r3, #0]
8001d04: 4b9d ldr r3, [pc, #628] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001d06: 2180 movs r1, #128 ; 0x80
8001d08: 0249 lsls r1, r1, #9
8001d0a: 430a orrs r2, r1
8001d0c: 601a str r2, [r3, #0]
8001d0e: e00b b.n 8001d28 <HAL_RCC_OscConfig+0xdc>
8001d10: 4b9a ldr r3, [pc, #616] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001d12: 681a ldr r2, [r3, #0]
8001d14: 4b99 ldr r3, [pc, #612] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001d16: 499a ldr r1, [pc, #616] ; (8001f80 <HAL_RCC_OscConfig+0x334>)
8001d18: 400a ands r2, r1
8001d1a: 601a str r2, [r3, #0]
8001d1c: 4b97 ldr r3, [pc, #604] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001d1e: 681a ldr r2, [r3, #0]
8001d20: 4b96 ldr r3, [pc, #600] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001d22: 4998 ldr r1, [pc, #608] ; (8001f84 <HAL_RCC_OscConfig+0x338>)
8001d24: 400a ands r2, r1
8001d26: 601a str r2, [r3, #0]
/* Check the HSE State */
if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8001d28: 687b ldr r3, [r7, #4]
8001d2a: 685b ldr r3, [r3, #4]
8001d2c: 2b00 cmp r3, #0
8001d2e: d014 beq.n 8001d5a <HAL_RCC_OscConfig+0x10e>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8001d30: f7ff fcbc bl 80016ac <HAL_GetTick>
8001d34: 0003 movs r3, r0
8001d36: 61bb str r3, [r7, #24]
/* Wait till HSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8001d38: e008 b.n 8001d4c <HAL_RCC_OscConfig+0x100>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8001d3a: f7ff fcb7 bl 80016ac <HAL_GetTick>
8001d3e: 0002 movs r2, r0
8001d40: 69bb ldr r3, [r7, #24]
8001d42: 1ad3 subs r3, r2, r3
8001d44: 2b64 cmp r3, #100 ; 0x64
8001d46: d901 bls.n 8001d4c <HAL_RCC_OscConfig+0x100>
{
return HAL_TIMEOUT;
8001d48: 2303 movs r3, #3
8001d4a: e28c b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8001d4c: 4b8b ldr r3, [pc, #556] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001d4e: 681a ldr r2, [r3, #0]
8001d50: 2380 movs r3, #128 ; 0x80
8001d52: 029b lsls r3, r3, #10
8001d54: 4013 ands r3, r2
8001d56: d0f0 beq.n 8001d3a <HAL_RCC_OscConfig+0xee>
8001d58: e015 b.n 8001d86 <HAL_RCC_OscConfig+0x13a>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8001d5a: f7ff fca7 bl 80016ac <HAL_GetTick>
8001d5e: 0003 movs r3, r0
8001d60: 61bb str r3, [r7, #24]
/* Wait till HSE is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8001d62: e008 b.n 8001d76 <HAL_RCC_OscConfig+0x12a>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8001d64: f7ff fca2 bl 80016ac <HAL_GetTick>
8001d68: 0002 movs r2, r0
8001d6a: 69bb ldr r3, [r7, #24]
8001d6c: 1ad3 subs r3, r2, r3
8001d6e: 2b64 cmp r3, #100 ; 0x64
8001d70: d901 bls.n 8001d76 <HAL_RCC_OscConfig+0x12a>
{
return HAL_TIMEOUT;
8001d72: 2303 movs r3, #3
8001d74: e277 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8001d76: 4b81 ldr r3, [pc, #516] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001d78: 681a ldr r2, [r3, #0]
8001d7a: 2380 movs r3, #128 ; 0x80
8001d7c: 029b lsls r3, r3, #10
8001d7e: 4013 ands r3, r2
8001d80: d1f0 bne.n 8001d64 <HAL_RCC_OscConfig+0x118>
8001d82: e000 b.n 8001d86 <HAL_RCC_OscConfig+0x13a>
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8001d84: 46c0 nop ; (mov r8, r8)
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8001d86: 687b ldr r3, [r7, #4]
8001d88: 681b ldr r3, [r3, #0]
8001d8a: 2202 movs r2, #2
8001d8c: 4013 ands r3, r2
8001d8e: d100 bne.n 8001d92 <HAL_RCC_OscConfig+0x146>
8001d90: e069 b.n 8001e66 <HAL_RCC_OscConfig+0x21a>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
8001d92: 4b7a ldr r3, [pc, #488] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001d94: 685b ldr r3, [r3, #4]
8001d96: 220c movs r2, #12
8001d98: 4013 ands r3, r2
8001d9a: d00b beq.n 8001db4 <HAL_RCC_OscConfig+0x168>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
8001d9c: 4b77 ldr r3, [pc, #476] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001d9e: 685b ldr r3, [r3, #4]
8001da0: 220c movs r2, #12
8001da2: 4013 ands r3, r2
8001da4: 2b08 cmp r3, #8
8001da6: d11c bne.n 8001de2 <HAL_RCC_OscConfig+0x196>
8001da8: 4b74 ldr r3, [pc, #464] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001daa: 685a ldr r2, [r3, #4]
8001dac: 2380 movs r3, #128 ; 0x80
8001dae: 025b lsls r3, r3, #9
8001db0: 4013 ands r3, r2
8001db2: d116 bne.n 8001de2 <HAL_RCC_OscConfig+0x196>
{
/* When HSI is used as system clock it will not disabled */
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8001db4: 4b71 ldr r3, [pc, #452] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001db6: 681b ldr r3, [r3, #0]
8001db8: 2202 movs r2, #2
8001dba: 4013 ands r3, r2
8001dbc: d005 beq.n 8001dca <HAL_RCC_OscConfig+0x17e>
8001dbe: 687b ldr r3, [r7, #4]
8001dc0: 68db ldr r3, [r3, #12]
8001dc2: 2b01 cmp r3, #1
8001dc4: d001 beq.n 8001dca <HAL_RCC_OscConfig+0x17e>
{
return HAL_ERROR;
8001dc6: 2301 movs r3, #1
8001dc8: e24d b.n 8002266 <HAL_RCC_OscConfig+0x61a>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8001dca: 4b6c ldr r3, [pc, #432] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001dcc: 681b ldr r3, [r3, #0]
8001dce: 22f8 movs r2, #248 ; 0xf8
8001dd0: 4393 bics r3, r2
8001dd2: 0019 movs r1, r3
8001dd4: 687b ldr r3, [r7, #4]
8001dd6: 691b ldr r3, [r3, #16]
8001dd8: 00da lsls r2, r3, #3
8001dda: 4b68 ldr r3, [pc, #416] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001ddc: 430a orrs r2, r1
8001dde: 601a str r2, [r3, #0]
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8001de0: e041 b.n 8001e66 <HAL_RCC_OscConfig+0x21a>
}
}
else
{
/* Check the HSI State */
if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8001de2: 687b ldr r3, [r7, #4]
8001de4: 68db ldr r3, [r3, #12]
8001de6: 2b00 cmp r3, #0
8001de8: d024 beq.n 8001e34 <HAL_RCC_OscConfig+0x1e8>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8001dea: 4b64 ldr r3, [pc, #400] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001dec: 681a ldr r2, [r3, #0]
8001dee: 4b63 ldr r3, [pc, #396] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001df0: 2101 movs r1, #1
8001df2: 430a orrs r2, r1
8001df4: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8001df6: f7ff fc59 bl 80016ac <HAL_GetTick>
8001dfa: 0003 movs r3, r0
8001dfc: 61bb str r3, [r7, #24]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8001dfe: e008 b.n 8001e12 <HAL_RCC_OscConfig+0x1c6>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8001e00: f7ff fc54 bl 80016ac <HAL_GetTick>
8001e04: 0002 movs r2, r0
8001e06: 69bb ldr r3, [r7, #24]
8001e08: 1ad3 subs r3, r2, r3
8001e0a: 2b02 cmp r3, #2
8001e0c: d901 bls.n 8001e12 <HAL_RCC_OscConfig+0x1c6>
{
return HAL_TIMEOUT;
8001e0e: 2303 movs r3, #3
8001e10: e229 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8001e12: 4b5a ldr r3, [pc, #360] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001e14: 681b ldr r3, [r3, #0]
8001e16: 2202 movs r2, #2
8001e18: 4013 ands r3, r2
8001e1a: d0f1 beq.n 8001e00 <HAL_RCC_OscConfig+0x1b4>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8001e1c: 4b57 ldr r3, [pc, #348] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001e1e: 681b ldr r3, [r3, #0]
8001e20: 22f8 movs r2, #248 ; 0xf8
8001e22: 4393 bics r3, r2
8001e24: 0019 movs r1, r3
8001e26: 687b ldr r3, [r7, #4]
8001e28: 691b ldr r3, [r3, #16]
8001e2a: 00da lsls r2, r3, #3
8001e2c: 4b53 ldr r3, [pc, #332] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001e2e: 430a orrs r2, r1
8001e30: 601a str r2, [r3, #0]
8001e32: e018 b.n 8001e66 <HAL_RCC_OscConfig+0x21a>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8001e34: 4b51 ldr r3, [pc, #324] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001e36: 681a ldr r2, [r3, #0]
8001e38: 4b50 ldr r3, [pc, #320] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001e3a: 2101 movs r1, #1
8001e3c: 438a bics r2, r1
8001e3e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8001e40: f7ff fc34 bl 80016ac <HAL_GetTick>
8001e44: 0003 movs r3, r0
8001e46: 61bb str r3, [r7, #24]
/* Wait till HSI is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8001e48: e008 b.n 8001e5c <HAL_RCC_OscConfig+0x210>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8001e4a: f7ff fc2f bl 80016ac <HAL_GetTick>
8001e4e: 0002 movs r2, r0
8001e50: 69bb ldr r3, [r7, #24]
8001e52: 1ad3 subs r3, r2, r3
8001e54: 2b02 cmp r3, #2
8001e56: d901 bls.n 8001e5c <HAL_RCC_OscConfig+0x210>
{
return HAL_TIMEOUT;
8001e58: 2303 movs r3, #3
8001e5a: e204 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8001e5c: 4b47 ldr r3, [pc, #284] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001e5e: 681b ldr r3, [r3, #0]
8001e60: 2202 movs r2, #2
8001e62: 4013 ands r3, r2
8001e64: d1f1 bne.n 8001e4a <HAL_RCC_OscConfig+0x1fe>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8001e66: 687b ldr r3, [r7, #4]
8001e68: 681b ldr r3, [r3, #0]
8001e6a: 2208 movs r2, #8
8001e6c: 4013 ands r3, r2
8001e6e: d036 beq.n 8001ede <HAL_RCC_OscConfig+0x292>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
8001e70: 687b ldr r3, [r7, #4]
8001e72: 69db ldr r3, [r3, #28]
8001e74: 2b00 cmp r3, #0
8001e76: d019 beq.n 8001eac <HAL_RCC_OscConfig+0x260>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8001e78: 4b40 ldr r3, [pc, #256] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001e7a: 6a5a ldr r2, [r3, #36] ; 0x24
8001e7c: 4b3f ldr r3, [pc, #252] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001e7e: 2101 movs r1, #1
8001e80: 430a orrs r2, r1
8001e82: 625a str r2, [r3, #36] ; 0x24
/* Get Start Tick */
tickstart = HAL_GetTick();
8001e84: f7ff fc12 bl 80016ac <HAL_GetTick>
8001e88: 0003 movs r3, r0
8001e8a: 61bb str r3, [r7, #24]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8001e8c: e008 b.n 8001ea0 <HAL_RCC_OscConfig+0x254>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8001e8e: f7ff fc0d bl 80016ac <HAL_GetTick>
8001e92: 0002 movs r2, r0
8001e94: 69bb ldr r3, [r7, #24]
8001e96: 1ad3 subs r3, r2, r3
8001e98: 2b02 cmp r3, #2
8001e9a: d901 bls.n 8001ea0 <HAL_RCC_OscConfig+0x254>
{
return HAL_TIMEOUT;
8001e9c: 2303 movs r3, #3
8001e9e: e1e2 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8001ea0: 4b36 ldr r3, [pc, #216] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001ea2: 6a5b ldr r3, [r3, #36] ; 0x24
8001ea4: 2202 movs r2, #2
8001ea6: 4013 ands r3, r2
8001ea8: d0f1 beq.n 8001e8e <HAL_RCC_OscConfig+0x242>
8001eaa: e018 b.n 8001ede <HAL_RCC_OscConfig+0x292>
}
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8001eac: 4b33 ldr r3, [pc, #204] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001eae: 6a5a ldr r2, [r3, #36] ; 0x24
8001eb0: 4b32 ldr r3, [pc, #200] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001eb2: 2101 movs r1, #1
8001eb4: 438a bics r2, r1
8001eb6: 625a str r2, [r3, #36] ; 0x24
/* Get Start Tick */
tickstart = HAL_GetTick();
8001eb8: f7ff fbf8 bl 80016ac <HAL_GetTick>
8001ebc: 0003 movs r3, r0
8001ebe: 61bb str r3, [r7, #24]
/* Wait till LSI is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8001ec0: e008 b.n 8001ed4 <HAL_RCC_OscConfig+0x288>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8001ec2: f7ff fbf3 bl 80016ac <HAL_GetTick>
8001ec6: 0002 movs r2, r0
8001ec8: 69bb ldr r3, [r7, #24]
8001eca: 1ad3 subs r3, r2, r3
8001ecc: 2b02 cmp r3, #2
8001ece: d901 bls.n 8001ed4 <HAL_RCC_OscConfig+0x288>
{
return HAL_TIMEOUT;
8001ed0: 2303 movs r3, #3
8001ed2: e1c8 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8001ed4: 4b29 ldr r3, [pc, #164] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001ed6: 6a5b ldr r3, [r3, #36] ; 0x24
8001ed8: 2202 movs r2, #2
8001eda: 4013 ands r3, r2
8001edc: d1f1 bne.n 8001ec2 <HAL_RCC_OscConfig+0x276>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8001ede: 687b ldr r3, [r7, #4]
8001ee0: 681b ldr r3, [r3, #0]
8001ee2: 2204 movs r2, #4
8001ee4: 4013 ands r3, r2
8001ee6: d100 bne.n 8001eea <HAL_RCC_OscConfig+0x29e>
8001ee8: e0b6 b.n 8002058 <HAL_RCC_OscConfig+0x40c>
{
FlagStatus pwrclkchanged = RESET;
8001eea: 231f movs r3, #31
8001eec: 18fb adds r3, r7, r3
8001eee: 2200 movs r2, #0
8001ef0: 701a strb r2, [r3, #0]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
8001ef2: 4b22 ldr r3, [pc, #136] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001ef4: 69da ldr r2, [r3, #28]
8001ef6: 2380 movs r3, #128 ; 0x80
8001ef8: 055b lsls r3, r3, #21
8001efa: 4013 ands r3, r2
8001efc: d111 bne.n 8001f22 <HAL_RCC_OscConfig+0x2d6>
{
__HAL_RCC_PWR_CLK_ENABLE();
8001efe: 4b1f ldr r3, [pc, #124] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001f00: 69da ldr r2, [r3, #28]
8001f02: 4b1e ldr r3, [pc, #120] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001f04: 2180 movs r1, #128 ; 0x80
8001f06: 0549 lsls r1, r1, #21
8001f08: 430a orrs r2, r1
8001f0a: 61da str r2, [r3, #28]
8001f0c: 4b1b ldr r3, [pc, #108] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001f0e: 69da ldr r2, [r3, #28]
8001f10: 2380 movs r3, #128 ; 0x80
8001f12: 055b lsls r3, r3, #21
8001f14: 4013 ands r3, r2
8001f16: 60fb str r3, [r7, #12]
8001f18: 68fb ldr r3, [r7, #12]
pwrclkchanged = SET;
8001f1a: 231f movs r3, #31
8001f1c: 18fb adds r3, r7, r3
8001f1e: 2201 movs r2, #1
8001f20: 701a strb r2, [r3, #0]
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8001f22: 4b19 ldr r3, [pc, #100] ; (8001f88 <HAL_RCC_OscConfig+0x33c>)
8001f24: 681a ldr r2, [r3, #0]
8001f26: 2380 movs r3, #128 ; 0x80
8001f28: 005b lsls r3, r3, #1
8001f2a: 4013 ands r3, r2
8001f2c: d11a bne.n 8001f64 <HAL_RCC_OscConfig+0x318>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8001f2e: 4b16 ldr r3, [pc, #88] ; (8001f88 <HAL_RCC_OscConfig+0x33c>)
8001f30: 681a ldr r2, [r3, #0]
8001f32: 4b15 ldr r3, [pc, #84] ; (8001f88 <HAL_RCC_OscConfig+0x33c>)
8001f34: 2180 movs r1, #128 ; 0x80
8001f36: 0049 lsls r1, r1, #1
8001f38: 430a orrs r2, r1
8001f3a: 601a str r2, [r3, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8001f3c: f7ff fbb6 bl 80016ac <HAL_GetTick>
8001f40: 0003 movs r3, r0
8001f42: 61bb str r3, [r7, #24]
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8001f44: e008 b.n 8001f58 <HAL_RCC_OscConfig+0x30c>
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8001f46: f7ff fbb1 bl 80016ac <HAL_GetTick>
8001f4a: 0002 movs r2, r0
8001f4c: 69bb ldr r3, [r7, #24]
8001f4e: 1ad3 subs r3, r2, r3
8001f50: 2b64 cmp r3, #100 ; 0x64
8001f52: d901 bls.n 8001f58 <HAL_RCC_OscConfig+0x30c>
{
return HAL_TIMEOUT;
8001f54: 2303 movs r3, #3
8001f56: e186 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8001f58: 4b0b ldr r3, [pc, #44] ; (8001f88 <HAL_RCC_OscConfig+0x33c>)
8001f5a: 681a ldr r2, [r3, #0]
8001f5c: 2380 movs r3, #128 ; 0x80
8001f5e: 005b lsls r3, r3, #1
8001f60: 4013 ands r3, r2
8001f62: d0f0 beq.n 8001f46 <HAL_RCC_OscConfig+0x2fa>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8001f64: 687b ldr r3, [r7, #4]
8001f66: 689b ldr r3, [r3, #8]
8001f68: 2b01 cmp r3, #1
8001f6a: d10f bne.n 8001f8c <HAL_RCC_OscConfig+0x340>
8001f6c: 4b03 ldr r3, [pc, #12] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001f6e: 6a1a ldr r2, [r3, #32]
8001f70: 4b02 ldr r3, [pc, #8] ; (8001f7c <HAL_RCC_OscConfig+0x330>)
8001f72: 2101 movs r1, #1
8001f74: 430a orrs r2, r1
8001f76: 621a str r2, [r3, #32]
8001f78: e036 b.n 8001fe8 <HAL_RCC_OscConfig+0x39c>
8001f7a: 46c0 nop ; (mov r8, r8)
8001f7c: 40021000 .word 0x40021000
8001f80: fffeffff .word 0xfffeffff
8001f84: fffbffff .word 0xfffbffff
8001f88: 40007000 .word 0x40007000
8001f8c: 687b ldr r3, [r7, #4]
8001f8e: 689b ldr r3, [r3, #8]
8001f90: 2b00 cmp r3, #0
8001f92: d10c bne.n 8001fae <HAL_RCC_OscConfig+0x362>
8001f94: 4bb6 ldr r3, [pc, #728] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001f96: 6a1a ldr r2, [r3, #32]
8001f98: 4bb5 ldr r3, [pc, #724] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001f9a: 2101 movs r1, #1
8001f9c: 438a bics r2, r1
8001f9e: 621a str r2, [r3, #32]
8001fa0: 4bb3 ldr r3, [pc, #716] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001fa2: 6a1a ldr r2, [r3, #32]
8001fa4: 4bb2 ldr r3, [pc, #712] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001fa6: 2104 movs r1, #4
8001fa8: 438a bics r2, r1
8001faa: 621a str r2, [r3, #32]
8001fac: e01c b.n 8001fe8 <HAL_RCC_OscConfig+0x39c>
8001fae: 687b ldr r3, [r7, #4]
8001fb0: 689b ldr r3, [r3, #8]
8001fb2: 2b05 cmp r3, #5
8001fb4: d10c bne.n 8001fd0 <HAL_RCC_OscConfig+0x384>
8001fb6: 4bae ldr r3, [pc, #696] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001fb8: 6a1a ldr r2, [r3, #32]
8001fba: 4bad ldr r3, [pc, #692] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001fbc: 2104 movs r1, #4
8001fbe: 430a orrs r2, r1
8001fc0: 621a str r2, [r3, #32]
8001fc2: 4bab ldr r3, [pc, #684] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001fc4: 6a1a ldr r2, [r3, #32]
8001fc6: 4baa ldr r3, [pc, #680] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001fc8: 2101 movs r1, #1
8001fca: 430a orrs r2, r1
8001fcc: 621a str r2, [r3, #32]
8001fce: e00b b.n 8001fe8 <HAL_RCC_OscConfig+0x39c>
8001fd0: 4ba7 ldr r3, [pc, #668] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001fd2: 6a1a ldr r2, [r3, #32]
8001fd4: 4ba6 ldr r3, [pc, #664] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001fd6: 2101 movs r1, #1
8001fd8: 438a bics r2, r1
8001fda: 621a str r2, [r3, #32]
8001fdc: 4ba4 ldr r3, [pc, #656] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001fde: 6a1a ldr r2, [r3, #32]
8001fe0: 4ba3 ldr r3, [pc, #652] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8001fe2: 2104 movs r1, #4
8001fe4: 438a bics r2, r1
8001fe6: 621a str r2, [r3, #32]
/* Check the LSE State */
if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
8001fe8: 687b ldr r3, [r7, #4]
8001fea: 689b ldr r3, [r3, #8]
8001fec: 2b00 cmp r3, #0
8001fee: d014 beq.n 800201a <HAL_RCC_OscConfig+0x3ce>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8001ff0: f7ff fb5c bl 80016ac <HAL_GetTick>
8001ff4: 0003 movs r3, r0
8001ff6: 61bb str r3, [r7, #24]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8001ff8: e009 b.n 800200e <HAL_RCC_OscConfig+0x3c2>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
8001ffa: f7ff fb57 bl 80016ac <HAL_GetTick>
8001ffe: 0002 movs r2, r0
8002000: 69bb ldr r3, [r7, #24]
8002002: 1ad3 subs r3, r2, r3
8002004: 4a9b ldr r2, [pc, #620] ; (8002274 <HAL_RCC_OscConfig+0x628>)
8002006: 4293 cmp r3, r2
8002008: d901 bls.n 800200e <HAL_RCC_OscConfig+0x3c2>
{
return HAL_TIMEOUT;
800200a: 2303 movs r3, #3
800200c: e12b b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800200e: 4b98 ldr r3, [pc, #608] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8002010: 6a1b ldr r3, [r3, #32]
8002012: 2202 movs r2, #2
8002014: 4013 ands r3, r2
8002016: d0f0 beq.n 8001ffa <HAL_RCC_OscConfig+0x3ae>
8002018: e013 b.n 8002042 <HAL_RCC_OscConfig+0x3f6>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800201a: f7ff fb47 bl 80016ac <HAL_GetTick>
800201e: 0003 movs r3, r0
8002020: 61bb str r3, [r7, #24]
/* Wait till LSE is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8002022: e009 b.n 8002038 <HAL_RCC_OscConfig+0x3ec>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
8002024: f7ff fb42 bl 80016ac <HAL_GetTick>
8002028: 0002 movs r2, r0
800202a: 69bb ldr r3, [r7, #24]
800202c: 1ad3 subs r3, r2, r3
800202e: 4a91 ldr r2, [pc, #580] ; (8002274 <HAL_RCC_OscConfig+0x628>)
8002030: 4293 cmp r3, r2
8002032: d901 bls.n 8002038 <HAL_RCC_OscConfig+0x3ec>
{
return HAL_TIMEOUT;
8002034: 2303 movs r3, #3
8002036: e116 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8002038: 4b8d ldr r3, [pc, #564] ; (8002270 <HAL_RCC_OscConfig+0x624>)
800203a: 6a1b ldr r3, [r3, #32]
800203c: 2202 movs r2, #2
800203e: 4013 ands r3, r2
8002040: d1f0 bne.n 8002024 <HAL_RCC_OscConfig+0x3d8>
}
}
}
/* Require to disable power clock if necessary */
if(pwrclkchanged == SET)
8002042: 231f movs r3, #31
8002044: 18fb adds r3, r7, r3
8002046: 781b ldrb r3, [r3, #0]
8002048: 2b01 cmp r3, #1
800204a: d105 bne.n 8002058 <HAL_RCC_OscConfig+0x40c>
{
__HAL_RCC_PWR_CLK_DISABLE();
800204c: 4b88 ldr r3, [pc, #544] ; (8002270 <HAL_RCC_OscConfig+0x624>)
800204e: 69da ldr r2, [r3, #28]
8002050: 4b87 ldr r3, [pc, #540] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8002052: 4989 ldr r1, [pc, #548] ; (8002278 <HAL_RCC_OscConfig+0x62c>)
8002054: 400a ands r2, r1
8002056: 61da str r2, [r3, #28]
}
}
/*----------------------------- HSI14 Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14)
8002058: 687b ldr r3, [r7, #4]
800205a: 681b ldr r3, [r3, #0]
800205c: 2210 movs r2, #16
800205e: 4013 ands r3, r2
8002060: d063 beq.n 800212a <HAL_RCC_OscConfig+0x4de>
/* Check the parameters */
assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue));
/* Check the HSI14 State */
if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON)
8002062: 687b ldr r3, [r7, #4]
8002064: 695b ldr r3, [r3, #20]
8002066: 2b01 cmp r3, #1
8002068: d12a bne.n 80020c0 <HAL_RCC_OscConfig+0x474>
{
/* Disable ADC control of the Internal High Speed oscillator HSI14 */
__HAL_RCC_HSI14ADC_DISABLE();
800206a: 4b81 ldr r3, [pc, #516] ; (8002270 <HAL_RCC_OscConfig+0x624>)
800206c: 6b5a ldr r2, [r3, #52] ; 0x34
800206e: 4b80 ldr r3, [pc, #512] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8002070: 2104 movs r1, #4
8002072: 430a orrs r2, r1
8002074: 635a str r2, [r3, #52] ; 0x34
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI14_ENABLE();
8002076: 4b7e ldr r3, [pc, #504] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8002078: 6b5a ldr r2, [r3, #52] ; 0x34
800207a: 4b7d ldr r3, [pc, #500] ; (8002270 <HAL_RCC_OscConfig+0x624>)
800207c: 2101 movs r1, #1
800207e: 430a orrs r2, r1
8002080: 635a str r2, [r3, #52] ; 0x34
/* Get Start Tick */
tickstart = HAL_GetTick();
8002082: f7ff fb13 bl 80016ac <HAL_GetTick>
8002086: 0003 movs r3, r0
8002088: 61bb str r3, [r7, #24]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
800208a: e008 b.n 800209e <HAL_RCC_OscConfig+0x452>
{
if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
800208c: f7ff fb0e bl 80016ac <HAL_GetTick>
8002090: 0002 movs r2, r0
8002092: 69bb ldr r3, [r7, #24]
8002094: 1ad3 subs r3, r2, r3
8002096: 2b02 cmp r3, #2
8002098: d901 bls.n 800209e <HAL_RCC_OscConfig+0x452>
{
return HAL_TIMEOUT;
800209a: 2303 movs r3, #3
800209c: e0e3 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
800209e: 4b74 ldr r3, [pc, #464] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80020a0: 6b5b ldr r3, [r3, #52] ; 0x34
80020a2: 2202 movs r2, #2
80020a4: 4013 ands r3, r2
80020a6: d0f1 beq.n 800208c <HAL_RCC_OscConfig+0x440>
}
}
/* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
__HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
80020a8: 4b71 ldr r3, [pc, #452] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80020aa: 6b5b ldr r3, [r3, #52] ; 0x34
80020ac: 22f8 movs r2, #248 ; 0xf8
80020ae: 4393 bics r3, r2
80020b0: 0019 movs r1, r3
80020b2: 687b ldr r3, [r7, #4]
80020b4: 699b ldr r3, [r3, #24]
80020b6: 00da lsls r2, r3, #3
80020b8: 4b6d ldr r3, [pc, #436] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80020ba: 430a orrs r2, r1
80020bc: 635a str r2, [r3, #52] ; 0x34
80020be: e034 b.n 800212a <HAL_RCC_OscConfig+0x4de>
}
else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL)
80020c0: 687b ldr r3, [r7, #4]
80020c2: 695b ldr r3, [r3, #20]
80020c4: 3305 adds r3, #5
80020c6: d111 bne.n 80020ec <HAL_RCC_OscConfig+0x4a0>
{
/* Enable ADC control of the Internal High Speed oscillator HSI14 */
__HAL_RCC_HSI14ADC_ENABLE();
80020c8: 4b69 ldr r3, [pc, #420] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80020ca: 6b5a ldr r2, [r3, #52] ; 0x34
80020cc: 4b68 ldr r3, [pc, #416] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80020ce: 2104 movs r1, #4
80020d0: 438a bics r2, r1
80020d2: 635a str r2, [r3, #52] ; 0x34
/* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
__HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
80020d4: 4b66 ldr r3, [pc, #408] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80020d6: 6b5b ldr r3, [r3, #52] ; 0x34
80020d8: 22f8 movs r2, #248 ; 0xf8
80020da: 4393 bics r3, r2
80020dc: 0019 movs r1, r3
80020de: 687b ldr r3, [r7, #4]
80020e0: 699b ldr r3, [r3, #24]
80020e2: 00da lsls r2, r3, #3
80020e4: 4b62 ldr r3, [pc, #392] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80020e6: 430a orrs r2, r1
80020e8: 635a str r2, [r3, #52] ; 0x34
80020ea: e01e b.n 800212a <HAL_RCC_OscConfig+0x4de>
}
else
{
/* Disable ADC control of the Internal High Speed oscillator HSI14 */
__HAL_RCC_HSI14ADC_DISABLE();
80020ec: 4b60 ldr r3, [pc, #384] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80020ee: 6b5a ldr r2, [r3, #52] ; 0x34
80020f0: 4b5f ldr r3, [pc, #380] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80020f2: 2104 movs r1, #4
80020f4: 430a orrs r2, r1
80020f6: 635a str r2, [r3, #52] ; 0x34
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI14_DISABLE();
80020f8: 4b5d ldr r3, [pc, #372] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80020fa: 6b5a ldr r2, [r3, #52] ; 0x34
80020fc: 4b5c ldr r3, [pc, #368] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80020fe: 2101 movs r1, #1
8002100: 438a bics r2, r1
8002102: 635a str r2, [r3, #52] ; 0x34
/* Get Start Tick */
tickstart = HAL_GetTick();
8002104: f7ff fad2 bl 80016ac <HAL_GetTick>
8002108: 0003 movs r3, r0
800210a: 61bb str r3, [r7, #24]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
800210c: e008 b.n 8002120 <HAL_RCC_OscConfig+0x4d4>
{
if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
800210e: f7ff facd bl 80016ac <HAL_GetTick>
8002112: 0002 movs r2, r0
8002114: 69bb ldr r3, [r7, #24]
8002116: 1ad3 subs r3, r2, r3
8002118: 2b02 cmp r3, #2
800211a: d901 bls.n 8002120 <HAL_RCC_OscConfig+0x4d4>
{
return HAL_TIMEOUT;
800211c: 2303 movs r3, #3
800211e: e0a2 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
8002120: 4b53 ldr r3, [pc, #332] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8002122: 6b5b ldr r3, [r3, #52] ; 0x34
8002124: 2202 movs r2, #2
8002126: 4013 ands r3, r2
8002128: d1f1 bne.n 800210e <HAL_RCC_OscConfig+0x4c2>
#endif /* RCC_HSI48_SUPPORT */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
800212a: 687b ldr r3, [r7, #4]
800212c: 6a1b ldr r3, [r3, #32]
800212e: 2b00 cmp r3, #0
8002130: d100 bne.n 8002134 <HAL_RCC_OscConfig+0x4e8>
8002132: e097 b.n 8002264 <HAL_RCC_OscConfig+0x618>
{
/* Check if the PLL is used as system clock or not */
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8002134: 4b4e ldr r3, [pc, #312] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8002136: 685b ldr r3, [r3, #4]
8002138: 220c movs r2, #12
800213a: 4013 ands r3, r2
800213c: 2b08 cmp r3, #8
800213e: d100 bne.n 8002142 <HAL_RCC_OscConfig+0x4f6>
8002140: e06b b.n 800221a <HAL_RCC_OscConfig+0x5ce>
{
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8002142: 687b ldr r3, [r7, #4]
8002144: 6a1b ldr r3, [r3, #32]
8002146: 2b02 cmp r3, #2
8002148: d14c bne.n 80021e4 <HAL_RCC_OscConfig+0x598>
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
800214a: 4b49 ldr r3, [pc, #292] ; (8002270 <HAL_RCC_OscConfig+0x624>)
800214c: 681a ldr r2, [r3, #0]
800214e: 4b48 ldr r3, [pc, #288] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8002150: 494a ldr r1, [pc, #296] ; (800227c <HAL_RCC_OscConfig+0x630>)
8002152: 400a ands r2, r1
8002154: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002156: f7ff faa9 bl 80016ac <HAL_GetTick>
800215a: 0003 movs r3, r0
800215c: 61bb str r3, [r7, #24]
/* Wait till PLL is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800215e: e008 b.n 8002172 <HAL_RCC_OscConfig+0x526>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
8002160: f7ff faa4 bl 80016ac <HAL_GetTick>
8002164: 0002 movs r2, r0
8002166: 69bb ldr r3, [r7, #24]
8002168: 1ad3 subs r3, r2, r3
800216a: 2b02 cmp r3, #2
800216c: d901 bls.n 8002172 <HAL_RCC_OscConfig+0x526>
{
return HAL_TIMEOUT;
800216e: 2303 movs r3, #3
8002170: e079 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8002172: 4b3f ldr r3, [pc, #252] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8002174: 681a ldr r2, [r3, #0]
8002176: 2380 movs r3, #128 ; 0x80
8002178: 049b lsls r3, r3, #18
800217a: 4013 ands r3, r2
800217c: d1f0 bne.n 8002160 <HAL_RCC_OscConfig+0x514>
}
}
/* Configure the main PLL clock source, predivider and multiplication factor. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
800217e: 4b3c ldr r3, [pc, #240] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8002180: 6adb ldr r3, [r3, #44] ; 0x2c
8002182: 220f movs r2, #15
8002184: 4393 bics r3, r2
8002186: 0019 movs r1, r3
8002188: 687b ldr r3, [r7, #4]
800218a: 6ada ldr r2, [r3, #44] ; 0x2c
800218c: 4b38 ldr r3, [pc, #224] ; (8002270 <HAL_RCC_OscConfig+0x624>)
800218e: 430a orrs r2, r1
8002190: 62da str r2, [r3, #44] ; 0x2c
8002192: 4b37 ldr r3, [pc, #220] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8002194: 685b ldr r3, [r3, #4]
8002196: 4a3a ldr r2, [pc, #232] ; (8002280 <HAL_RCC_OscConfig+0x634>)
8002198: 4013 ands r3, r2
800219a: 0019 movs r1, r3
800219c: 687b ldr r3, [r7, #4]
800219e: 6a9a ldr r2, [r3, #40] ; 0x28
80021a0: 687b ldr r3, [r7, #4]
80021a2: 6a5b ldr r3, [r3, #36] ; 0x24
80021a4: 431a orrs r2, r3
80021a6: 4b32 ldr r3, [pc, #200] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80021a8: 430a orrs r2, r1
80021aa: 605a str r2, [r3, #4]
RCC_OscInitStruct->PLL.PREDIV,
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
80021ac: 4b30 ldr r3, [pc, #192] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80021ae: 681a ldr r2, [r3, #0]
80021b0: 4b2f ldr r3, [pc, #188] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80021b2: 2180 movs r1, #128 ; 0x80
80021b4: 0449 lsls r1, r1, #17
80021b6: 430a orrs r2, r1
80021b8: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80021ba: f7ff fa77 bl 80016ac <HAL_GetTick>
80021be: 0003 movs r3, r0
80021c0: 61bb str r3, [r7, #24]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80021c2: e008 b.n 80021d6 <HAL_RCC_OscConfig+0x58a>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
80021c4: f7ff fa72 bl 80016ac <HAL_GetTick>
80021c8: 0002 movs r2, r0
80021ca: 69bb ldr r3, [r7, #24]
80021cc: 1ad3 subs r3, r2, r3
80021ce: 2b02 cmp r3, #2
80021d0: d901 bls.n 80021d6 <HAL_RCC_OscConfig+0x58a>
{
return HAL_TIMEOUT;
80021d2: 2303 movs r3, #3
80021d4: e047 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80021d6: 4b26 ldr r3, [pc, #152] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80021d8: 681a ldr r2, [r3, #0]
80021da: 2380 movs r3, #128 ; 0x80
80021dc: 049b lsls r3, r3, #18
80021de: 4013 ands r3, r2
80021e0: d0f0 beq.n 80021c4 <HAL_RCC_OscConfig+0x578>
80021e2: e03f b.n 8002264 <HAL_RCC_OscConfig+0x618>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80021e4: 4b22 ldr r3, [pc, #136] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80021e6: 681a ldr r2, [r3, #0]
80021e8: 4b21 ldr r3, [pc, #132] ; (8002270 <HAL_RCC_OscConfig+0x624>)
80021ea: 4924 ldr r1, [pc, #144] ; (800227c <HAL_RCC_OscConfig+0x630>)
80021ec: 400a ands r2, r1
80021ee: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80021f0: f7ff fa5c bl 80016ac <HAL_GetTick>
80021f4: 0003 movs r3, r0
80021f6: 61bb str r3, [r7, #24]
/* Wait till PLL is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80021f8: e008 b.n 800220c <HAL_RCC_OscConfig+0x5c0>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
80021fa: f7ff fa57 bl 80016ac <HAL_GetTick>
80021fe: 0002 movs r2, r0
8002200: 69bb ldr r3, [r7, #24]
8002202: 1ad3 subs r3, r2, r3
8002204: 2b02 cmp r3, #2
8002206: d901 bls.n 800220c <HAL_RCC_OscConfig+0x5c0>
{
return HAL_TIMEOUT;
8002208: 2303 movs r3, #3
800220a: e02c b.n 8002266 <HAL_RCC_OscConfig+0x61a>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800220c: 4b18 ldr r3, [pc, #96] ; (8002270 <HAL_RCC_OscConfig+0x624>)
800220e: 681a ldr r2, [r3, #0]
8002210: 2380 movs r3, #128 ; 0x80
8002212: 049b lsls r3, r3, #18
8002214: 4013 ands r3, r2
8002216: d1f0 bne.n 80021fa <HAL_RCC_OscConfig+0x5ae>
8002218: e024 b.n 8002264 <HAL_RCC_OscConfig+0x618>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
800221a: 687b ldr r3, [r7, #4]
800221c: 6a1b ldr r3, [r3, #32]
800221e: 2b01 cmp r3, #1
8002220: d101 bne.n 8002226 <HAL_RCC_OscConfig+0x5da>
{
return HAL_ERROR;
8002222: 2301 movs r3, #1
8002224: e01f b.n 8002266 <HAL_RCC_OscConfig+0x61a>
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8002226: 4b12 ldr r3, [pc, #72] ; (8002270 <HAL_RCC_OscConfig+0x624>)
8002228: 685b ldr r3, [r3, #4]
800222a: 617b str r3, [r7, #20]
pll_config2 = RCC->CFGR2;
800222c: 4b10 ldr r3, [pc, #64] ; (8002270 <HAL_RCC_OscConfig+0x624>)
800222e: 6adb ldr r3, [r3, #44] ; 0x2c
8002230: 613b str r3, [r7, #16]
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8002232: 697a ldr r2, [r7, #20]
8002234: 2380 movs r3, #128 ; 0x80
8002236: 025b lsls r3, r3, #9
8002238: 401a ands r2, r3
800223a: 687b ldr r3, [r7, #4]
800223c: 6a5b ldr r3, [r3, #36] ; 0x24
800223e: 429a cmp r2, r3
8002240: d10e bne.n 8002260 <HAL_RCC_OscConfig+0x614>
(READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
8002242: 693b ldr r3, [r7, #16]
8002244: 220f movs r2, #15
8002246: 401a ands r2, r3
8002248: 687b ldr r3, [r7, #4]
800224a: 6adb ldr r3, [r3, #44] ; 0x2c
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800224c: 429a cmp r2, r3
800224e: d107 bne.n 8002260 <HAL_RCC_OscConfig+0x614>
(READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
8002250: 697a ldr r2, [r7, #20]
8002252: 23f0 movs r3, #240 ; 0xf0
8002254: 039b lsls r3, r3, #14
8002256: 401a ands r2, r3
8002258: 687b ldr r3, [r7, #4]
800225a: 6a9b ldr r3, [r3, #40] ; 0x28
(READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
800225c: 429a cmp r2, r3
800225e: d001 beq.n 8002264 <HAL_RCC_OscConfig+0x618>
{
return HAL_ERROR;
8002260: 2301 movs r3, #1
8002262: e000 b.n 8002266 <HAL_RCC_OscConfig+0x61a>
}
}
}
}
return HAL_OK;
8002264: 2300 movs r3, #0
}
8002266: 0018 movs r0, r3
8002268: 46bd mov sp, r7
800226a: b008 add sp, #32
800226c: bd80 pop {r7, pc}
800226e: 46c0 nop ; (mov r8, r8)
8002270: 40021000 .word 0x40021000
8002274: 00001388 .word 0x00001388
8002278: efffffff .word 0xefffffff
800227c: feffffff .word 0xfeffffff
8002280: ffc2ffff .word 0xffc2ffff
08002284 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8002284: b580 push {r7, lr}
8002286: b084 sub sp, #16
8002288: af00 add r7, sp, #0
800228a: 6078 str r0, [r7, #4]
800228c: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if(RCC_ClkInitStruct == NULL)
800228e: 687b ldr r3, [r7, #4]
8002290: 2b00 cmp r3, #0
8002292: d101 bne.n 8002298 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8002294: 2301 movs r3, #1
8002296: e0b3 b.n 8002400 <HAL_RCC_ClockConfig+0x17c>
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
/* Increasing the number of wait states because of higher CPU frequency */
if(FLatency > __HAL_FLASH_GET_LATENCY())
8002298: 4b5b ldr r3, [pc, #364] ; (8002408 <HAL_RCC_ClockConfig+0x184>)
800229a: 681b ldr r3, [r3, #0]
800229c: 2201 movs r2, #1
800229e: 4013 ands r3, r2
80022a0: 683a ldr r2, [r7, #0]
80022a2: 429a cmp r2, r3
80022a4: d911 bls.n 80022ca <HAL_RCC_ClockConfig+0x46>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80022a6: 4b58 ldr r3, [pc, #352] ; (8002408 <HAL_RCC_ClockConfig+0x184>)
80022a8: 681b ldr r3, [r3, #0]
80022aa: 2201 movs r2, #1
80022ac: 4393 bics r3, r2
80022ae: 0019 movs r1, r3
80022b0: 4b55 ldr r3, [pc, #340] ; (8002408 <HAL_RCC_ClockConfig+0x184>)
80022b2: 683a ldr r2, [r7, #0]
80022b4: 430a orrs r2, r1
80022b6: 601a str r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
80022b8: 4b53 ldr r3, [pc, #332] ; (8002408 <HAL_RCC_ClockConfig+0x184>)
80022ba: 681b ldr r3, [r3, #0]
80022bc: 2201 movs r2, #1
80022be: 4013 ands r3, r2
80022c0: 683a ldr r2, [r7, #0]
80022c2: 429a cmp r2, r3
80022c4: d001 beq.n 80022ca <HAL_RCC_ClockConfig+0x46>
{
return HAL_ERROR;
80022c6: 2301 movs r3, #1
80022c8: e09a b.n 8002400 <HAL_RCC_ClockConfig+0x17c>
}
}
/*-------------------------- HCLK Configuration --------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
80022ca: 687b ldr r3, [r7, #4]
80022cc: 681b ldr r3, [r3, #0]
80022ce: 2202 movs r2, #2
80022d0: 4013 ands r3, r2
80022d2: d015 beq.n 8002300 <HAL_RCC_ClockConfig+0x7c>
{
/* Set the highest APB divider in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80022d4: 687b ldr r3, [r7, #4]
80022d6: 681b ldr r3, [r3, #0]
80022d8: 2204 movs r2, #4
80022da: 4013 ands r3, r2
80022dc: d006 beq.n 80022ec <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16);
80022de: 4b4b ldr r3, [pc, #300] ; (800240c <HAL_RCC_ClockConfig+0x188>)
80022e0: 685a ldr r2, [r3, #4]
80022e2: 4b4a ldr r3, [pc, #296] ; (800240c <HAL_RCC_ClockConfig+0x188>)
80022e4: 21e0 movs r1, #224 ; 0xe0
80022e6: 00c9 lsls r1, r1, #3
80022e8: 430a orrs r2, r1
80022ea: 605a str r2, [r3, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
80022ec: 4b47 ldr r3, [pc, #284] ; (800240c <HAL_RCC_ClockConfig+0x188>)
80022ee: 685b ldr r3, [r3, #4]
80022f0: 22f0 movs r2, #240 ; 0xf0
80022f2: 4393 bics r3, r2
80022f4: 0019 movs r1, r3
80022f6: 687b ldr r3, [r7, #4]
80022f8: 689a ldr r2, [r3, #8]
80022fa: 4b44 ldr r3, [pc, #272] ; (800240c <HAL_RCC_ClockConfig+0x188>)
80022fc: 430a orrs r2, r1
80022fe: 605a str r2, [r3, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8002300: 687b ldr r3, [r7, #4]
8002302: 681b ldr r3, [r3, #0]
8002304: 2201 movs r2, #1
8002306: 4013 ands r3, r2
8002308: d040 beq.n 800238c <HAL_RCC_ClockConfig+0x108>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
800230a: 687b ldr r3, [r7, #4]
800230c: 685b ldr r3, [r3, #4]
800230e: 2b01 cmp r3, #1
8002310: d107 bne.n 8002322 <HAL_RCC_ClockConfig+0x9e>
{
/* Check the HSE ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8002312: 4b3e ldr r3, [pc, #248] ; (800240c <HAL_RCC_ClockConfig+0x188>)
8002314: 681a ldr r2, [r3, #0]
8002316: 2380 movs r3, #128 ; 0x80
8002318: 029b lsls r3, r3, #10
800231a: 4013 ands r3, r2
800231c: d114 bne.n 8002348 <HAL_RCC_ClockConfig+0xc4>
{
return HAL_ERROR;
800231e: 2301 movs r3, #1
8002320: e06e b.n 8002400 <HAL_RCC_ClockConfig+0x17c>
}
}
/* PLL is selected as System Clock Source */
else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8002322: 687b ldr r3, [r7, #4]
8002324: 685b ldr r3, [r3, #4]
8002326: 2b02 cmp r3, #2
8002328: d107 bne.n 800233a <HAL_RCC_ClockConfig+0xb6>
{
/* Check the PLL ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800232a: 4b38 ldr r3, [pc, #224] ; (800240c <HAL_RCC_ClockConfig+0x188>)
800232c: 681a ldr r2, [r3, #0]
800232e: 2380 movs r3, #128 ; 0x80
8002330: 049b lsls r3, r3, #18
8002332: 4013 ands r3, r2
8002334: d108 bne.n 8002348 <HAL_RCC_ClockConfig+0xc4>
{
return HAL_ERROR;
8002336: 2301 movs r3, #1
8002338: e062 b.n 8002400 <HAL_RCC_ClockConfig+0x17c>
#endif /* RCC_CFGR_SWS_HSI48 */
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800233a: 4b34 ldr r3, [pc, #208] ; (800240c <HAL_RCC_ClockConfig+0x188>)
800233c: 681b ldr r3, [r3, #0]
800233e: 2202 movs r2, #2
8002340: 4013 ands r3, r2
8002342: d101 bne.n 8002348 <HAL_RCC_ClockConfig+0xc4>
{
return HAL_ERROR;
8002344: 2301 movs r3, #1
8002346: e05b b.n 8002400 <HAL_RCC_ClockConfig+0x17c>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8002348: 4b30 ldr r3, [pc, #192] ; (800240c <HAL_RCC_ClockConfig+0x188>)
800234a: 685b ldr r3, [r3, #4]
800234c: 2203 movs r2, #3
800234e: 4393 bics r3, r2
8002350: 0019 movs r1, r3
8002352: 687b ldr r3, [r7, #4]
8002354: 685a ldr r2, [r3, #4]
8002356: 4b2d ldr r3, [pc, #180] ; (800240c <HAL_RCC_ClockConfig+0x188>)
8002358: 430a orrs r2, r1
800235a: 605a str r2, [r3, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
800235c: f7ff f9a6 bl 80016ac <HAL_GetTick>
8002360: 0003 movs r3, r0
8002362: 60fb str r3, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8002364: e009 b.n 800237a <HAL_RCC_ClockConfig+0xf6>
{
if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
8002366: f7ff f9a1 bl 80016ac <HAL_GetTick>
800236a: 0002 movs r2, r0
800236c: 68fb ldr r3, [r7, #12]
800236e: 1ad3 subs r3, r2, r3
8002370: 4a27 ldr r2, [pc, #156] ; (8002410 <HAL_RCC_ClockConfig+0x18c>)
8002372: 4293 cmp r3, r2
8002374: d901 bls.n 800237a <HAL_RCC_ClockConfig+0xf6>
{
return HAL_TIMEOUT;
8002376: 2303 movs r3, #3
8002378: e042 b.n 8002400 <HAL_RCC_ClockConfig+0x17c>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800237a: 4b24 ldr r3, [pc, #144] ; (800240c <HAL_RCC_ClockConfig+0x188>)
800237c: 685b ldr r3, [r3, #4]
800237e: 220c movs r2, #12
8002380: 401a ands r2, r3
8002382: 687b ldr r3, [r7, #4]
8002384: 685b ldr r3, [r3, #4]
8002386: 009b lsls r3, r3, #2
8002388: 429a cmp r2, r3
800238a: d1ec bne.n 8002366 <HAL_RCC_ClockConfig+0xe2>
}
}
}
/* Decreasing the number of wait states because of lower CPU frequency */
if(FLatency < __HAL_FLASH_GET_LATENCY())
800238c: 4b1e ldr r3, [pc, #120] ; (8002408 <HAL_RCC_ClockConfig+0x184>)
800238e: 681b ldr r3, [r3, #0]
8002390: 2201 movs r2, #1
8002392: 4013 ands r3, r2
8002394: 683a ldr r2, [r7, #0]
8002396: 429a cmp r2, r3
8002398: d211 bcs.n 80023be <HAL_RCC_ClockConfig+0x13a>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800239a: 4b1b ldr r3, [pc, #108] ; (8002408 <HAL_RCC_ClockConfig+0x184>)
800239c: 681b ldr r3, [r3, #0]
800239e: 2201 movs r2, #1
80023a0: 4393 bics r3, r2
80023a2: 0019 movs r1, r3
80023a4: 4b18 ldr r3, [pc, #96] ; (8002408 <HAL_RCC_ClockConfig+0x184>)
80023a6: 683a ldr r2, [r7, #0]
80023a8: 430a orrs r2, r1
80023aa: 601a str r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
80023ac: 4b16 ldr r3, [pc, #88] ; (8002408 <HAL_RCC_ClockConfig+0x184>)
80023ae: 681b ldr r3, [r3, #0]
80023b0: 2201 movs r2, #1
80023b2: 4013 ands r3, r2
80023b4: 683a ldr r2, [r7, #0]
80023b6: 429a cmp r2, r3
80023b8: d001 beq.n 80023be <HAL_RCC_ClockConfig+0x13a>
{
return HAL_ERROR;
80023ba: 2301 movs r3, #1
80023bc: e020 b.n 8002400 <HAL_RCC_ClockConfig+0x17c>
}
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80023be: 687b ldr r3, [r7, #4]
80023c0: 681b ldr r3, [r3, #0]
80023c2: 2204 movs r2, #4
80023c4: 4013 ands r3, r2
80023c6: d009 beq.n 80023dc <HAL_RCC_ClockConfig+0x158>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
80023c8: 4b10 ldr r3, [pc, #64] ; (800240c <HAL_RCC_ClockConfig+0x188>)
80023ca: 685b ldr r3, [r3, #4]
80023cc: 4a11 ldr r2, [pc, #68] ; (8002414 <HAL_RCC_ClockConfig+0x190>)
80023ce: 4013 ands r3, r2
80023d0: 0019 movs r1, r3
80023d2: 687b ldr r3, [r7, #4]
80023d4: 68da ldr r2, [r3, #12]
80023d6: 4b0d ldr r3, [pc, #52] ; (800240c <HAL_RCC_ClockConfig+0x188>)
80023d8: 430a orrs r2, r1
80023da: 605a str r2, [r3, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER];
80023dc: f000 f820 bl 8002420 <HAL_RCC_GetSysClockFreq>
80023e0: 0001 movs r1, r0
80023e2: 4b0a ldr r3, [pc, #40] ; (800240c <HAL_RCC_ClockConfig+0x188>)
80023e4: 685b ldr r3, [r3, #4]
80023e6: 091b lsrs r3, r3, #4
80023e8: 220f movs r2, #15
80023ea: 4013 ands r3, r2
80023ec: 4a0a ldr r2, [pc, #40] ; (8002418 <HAL_RCC_ClockConfig+0x194>)
80023ee: 5cd3 ldrb r3, [r2, r3]
80023f0: 000a movs r2, r1
80023f2: 40da lsrs r2, r3
80023f4: 4b09 ldr r3, [pc, #36] ; (800241c <HAL_RCC_ClockConfig+0x198>)
80023f6: 601a str r2, [r3, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick (TICK_INT_PRIORITY);
80023f8: 2000 movs r0, #0
80023fa: f7ff f911 bl 8001620 <HAL_InitTick>
return HAL_OK;
80023fe: 2300 movs r3, #0
}
8002400: 0018 movs r0, r3
8002402: 46bd mov sp, r7
8002404: b004 add sp, #16
8002406: bd80 pop {r7, pc}
8002408: 40022000 .word 0x40022000
800240c: 40021000 .word 0x40021000
8002410: 00001388 .word 0x00001388
8002414: fffff8ff .word 0xfffff8ff
8002418: 080030d4 .word 0x080030d4
800241c: 20000004 .word 0x20000004
08002420 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8002420: b590 push {r4, r7, lr}
8002422: b08f sub sp, #60 ; 0x3c
8002424: af00 add r7, sp, #0
const uint8_t aPLLMULFactorTable[16] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U,
8002426: 2314 movs r3, #20
8002428: 18fb adds r3, r7, r3
800242a: 4a2b ldr r2, [pc, #172] ; (80024d8 <HAL_RCC_GetSysClockFreq+0xb8>)
800242c: ca13 ldmia r2!, {r0, r1, r4}
800242e: c313 stmia r3!, {r0, r1, r4}
8002430: 6812 ldr r2, [r2, #0]
8002432: 601a str r2, [r3, #0]
10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U};
const uint8_t aPredivFactorTable[16] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U,
8002434: 1d3b adds r3, r7, #4
8002436: 4a29 ldr r2, [pc, #164] ; (80024dc <HAL_RCC_GetSysClockFreq+0xbc>)
8002438: ca13 ldmia r2!, {r0, r1, r4}
800243a: c313 stmia r3!, {r0, r1, r4}
800243c: 6812 ldr r2, [r2, #0]
800243e: 601a str r2, [r3, #0]
9U,10U, 11U, 12U, 13U, 14U, 15U, 16U};
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8002440: 2300 movs r3, #0
8002442: 62fb str r3, [r7, #44] ; 0x2c
8002444: 2300 movs r3, #0
8002446: 62bb str r3, [r7, #40] ; 0x28
8002448: 2300 movs r3, #0
800244a: 637b str r3, [r7, #52] ; 0x34
800244c: 2300 movs r3, #0
800244e: 627b str r3, [r7, #36] ; 0x24
uint32_t sysclockfreq = 0U;
8002450: 2300 movs r3, #0
8002452: 633b str r3, [r7, #48] ; 0x30
tmpreg = RCC->CFGR;
8002454: 4b22 ldr r3, [pc, #136] ; (80024e0 <HAL_RCC_GetSysClockFreq+0xc0>)
8002456: 685b ldr r3, [r3, #4]
8002458: 62fb str r3, [r7, #44] ; 0x2c
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
800245a: 6afb ldr r3, [r7, #44] ; 0x2c
800245c: 220c movs r2, #12
800245e: 4013 ands r3, r2
8002460: 2b04 cmp r3, #4
8002462: d002 beq.n 800246a <HAL_RCC_GetSysClockFreq+0x4a>
8002464: 2b08 cmp r3, #8
8002466: d003 beq.n 8002470 <HAL_RCC_GetSysClockFreq+0x50>
8002468: e02d b.n 80024c6 <HAL_RCC_GetSysClockFreq+0xa6>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
800246a: 4b1e ldr r3, [pc, #120] ; (80024e4 <HAL_RCC_GetSysClockFreq+0xc4>)
800246c: 633b str r3, [r7, #48] ; 0x30
break;
800246e: e02d b.n 80024cc <HAL_RCC_GetSysClockFreq+0xac>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER];
8002470: 6afb ldr r3, [r7, #44] ; 0x2c
8002472: 0c9b lsrs r3, r3, #18
8002474: 220f movs r2, #15
8002476: 4013 ands r3, r2
8002478: 2214 movs r2, #20
800247a: 18ba adds r2, r7, r2
800247c: 5cd3 ldrb r3, [r2, r3]
800247e: 627b str r3, [r7, #36] ; 0x24
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER];
8002480: 4b17 ldr r3, [pc, #92] ; (80024e0 <HAL_RCC_GetSysClockFreq+0xc0>)
8002482: 6adb ldr r3, [r3, #44] ; 0x2c
8002484: 220f movs r2, #15
8002486: 4013 ands r3, r2
8002488: 1d3a adds r2, r7, #4
800248a: 5cd3 ldrb r3, [r2, r3]
800248c: 62bb str r3, [r7, #40] ; 0x28
if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
800248e: 6afa ldr r2, [r7, #44] ; 0x2c
8002490: 2380 movs r3, #128 ; 0x80
8002492: 025b lsls r3, r3, #9
8002494: 4013 ands r3, r2
8002496: d009 beq.n 80024ac <HAL_RCC_GetSysClockFreq+0x8c>
{
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
8002498: 6ab9 ldr r1, [r7, #40] ; 0x28
800249a: 4812 ldr r0, [pc, #72] ; (80024e4 <HAL_RCC_GetSysClockFreq+0xc4>)
800249c: f7fd fe3c bl 8000118 <__udivsi3>
80024a0: 0003 movs r3, r0
80024a2: 001a movs r2, r3
80024a4: 6a7b ldr r3, [r7, #36] ; 0x24
80024a6: 4353 muls r3, r2
80024a8: 637b str r3, [r7, #52] ; 0x34
80024aa: e009 b.n 80024c0 <HAL_RCC_GetSysClockFreq+0xa0>
#if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC))
/* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
#else
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul));
80024ac: 6a79 ldr r1, [r7, #36] ; 0x24
80024ae: 000a movs r2, r1
80024b0: 0152 lsls r2, r2, #5
80024b2: 1a52 subs r2, r2, r1
80024b4: 0193 lsls r3, r2, #6
80024b6: 1a9b subs r3, r3, r2
80024b8: 00db lsls r3, r3, #3
80024ba: 185b adds r3, r3, r1
80024bc: 021b lsls r3, r3, #8
80024be: 637b str r3, [r7, #52] ; 0x34
#endif
}
sysclockfreq = pllclk;
80024c0: 6b7b ldr r3, [r7, #52] ; 0x34
80024c2: 633b str r3, [r7, #48] ; 0x30
break;
80024c4: e002 b.n 80024cc <HAL_RCC_GetSysClockFreq+0xac>
}
#endif /* RCC_CFGR_SWS_HSI48 */
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
80024c6: 4b07 ldr r3, [pc, #28] ; (80024e4 <HAL_RCC_GetSysClockFreq+0xc4>)
80024c8: 633b str r3, [r7, #48] ; 0x30
break;
80024ca: 46c0 nop ; (mov r8, r8)
}
}
return sysclockfreq;
80024cc: 6b3b ldr r3, [r7, #48] ; 0x30
}
80024ce: 0018 movs r0, r3
80024d0: 46bd mov sp, r7
80024d2: b00f add sp, #60 ; 0x3c
80024d4: bd90 pop {r4, r7, pc}
80024d6: 46c0 nop ; (mov r8, r8)
80024d8: 080030a0 .word 0x080030a0
80024dc: 080030b0 .word 0x080030b0
80024e0: 40021000 .word 0x40021000
80024e4: 007a1200 .word 0x007a1200
080024e8 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
80024e8: b580 push {r7, lr}
80024ea: af00 add r7, sp, #0
return SystemCoreClock;
80024ec: 4b02 ldr r3, [pc, #8] ; (80024f8 <HAL_RCC_GetHCLKFreq+0x10>)
80024ee: 681b ldr r3, [r3, #0]
}
80024f0: 0018 movs r0, r3
80024f2: 46bd mov sp, r7
80024f4: bd80 pop {r7, pc}
80024f6: 46c0 nop ; (mov r8, r8)
80024f8: 20000004 .word 0x20000004
080024fc <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
80024fc: b580 push {r7, lr}
80024fe: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_BITNUMBER]);
8002500: f7ff fff2 bl 80024e8 <HAL_RCC_GetHCLKFreq>
8002504: 0001 movs r1, r0
8002506: 4b06 ldr r3, [pc, #24] ; (8002520 <HAL_RCC_GetPCLK1Freq+0x24>)
8002508: 685b ldr r3, [r3, #4]
800250a: 0a1b lsrs r3, r3, #8
800250c: 2207 movs r2, #7
800250e: 4013 ands r3, r2
8002510: 4a04 ldr r2, [pc, #16] ; (8002524 <HAL_RCC_GetPCLK1Freq+0x28>)
8002512: 5cd3 ldrb r3, [r2, r3]
8002514: 40d9 lsrs r1, r3
8002516: 000b movs r3, r1
}
8002518: 0018 movs r0, r3
800251a: 46bd mov sp, r7
800251c: bd80 pop {r7, pc}
800251e: 46c0 nop ; (mov r8, r8)
8002520: 40021000 .word 0x40021000
8002524: 080030e4 .word 0x080030e4
08002528 <HAL_RCCEx_PeriphCLKConfig>:
* the backup registers) and RCC_BDCR register are set to their reset values.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8002528: b580 push {r7, lr}
800252a: b086 sub sp, #24
800252c: af00 add r7, sp, #0
800252e: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8002530: 2300 movs r3, #0
8002532: 613b str r3, [r7, #16]
uint32_t temp_reg = 0U;
8002534: 2300 movs r3, #0
8002536: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*---------------------------- RTC configuration -------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
8002538: 687b ldr r3, [r7, #4]
800253a: 681a ldr r2, [r3, #0]
800253c: 2380 movs r3, #128 ; 0x80
800253e: 025b lsls r3, r3, #9
8002540: 4013 ands r3, r2
8002542: d100 bne.n 8002546 <HAL_RCCEx_PeriphCLKConfig+0x1e>
8002544: e08f b.n 8002666 <HAL_RCCEx_PeriphCLKConfig+0x13e>
{
/* check for RTC Parameters used to output RTCCLK */
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
FlagStatus pwrclkchanged = RESET;
8002546: 2317 movs r3, #23
8002548: 18fb adds r3, r7, r3
800254a: 2200 movs r2, #0
800254c: 701a strb r2, [r3, #0]
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
800254e: 4b57 ldr r3, [pc, #348] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
8002550: 69da ldr r2, [r3, #28]
8002552: 2380 movs r3, #128 ; 0x80
8002554: 055b lsls r3, r3, #21
8002556: 4013 ands r3, r2
8002558: d111 bne.n 800257e <HAL_RCCEx_PeriphCLKConfig+0x56>
{
__HAL_RCC_PWR_CLK_ENABLE();
800255a: 4b54 ldr r3, [pc, #336] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
800255c: 69da ldr r2, [r3, #28]
800255e: 4b53 ldr r3, [pc, #332] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
8002560: 2180 movs r1, #128 ; 0x80
8002562: 0549 lsls r1, r1, #21
8002564: 430a orrs r2, r1
8002566: 61da str r2, [r3, #28]
8002568: 4b50 ldr r3, [pc, #320] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
800256a: 69da ldr r2, [r3, #28]
800256c: 2380 movs r3, #128 ; 0x80
800256e: 055b lsls r3, r3, #21
8002570: 4013 ands r3, r2
8002572: 60bb str r3, [r7, #8]
8002574: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8002576: 2317 movs r3, #23
8002578: 18fb adds r3, r7, r3
800257a: 2201 movs r2, #1
800257c: 701a strb r2, [r3, #0]
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800257e: 4b4c ldr r3, [pc, #304] ; (80026b0 <HAL_RCCEx_PeriphCLKConfig+0x188>)
8002580: 681a ldr r2, [r3, #0]
8002582: 2380 movs r3, #128 ; 0x80
8002584: 005b lsls r3, r3, #1
8002586: 4013 ands r3, r2
8002588: d11a bne.n 80025c0 <HAL_RCCEx_PeriphCLKConfig+0x98>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
800258a: 4b49 ldr r3, [pc, #292] ; (80026b0 <HAL_RCCEx_PeriphCLKConfig+0x188>)
800258c: 681a ldr r2, [r3, #0]
800258e: 4b48 ldr r3, [pc, #288] ; (80026b0 <HAL_RCCEx_PeriphCLKConfig+0x188>)
8002590: 2180 movs r1, #128 ; 0x80
8002592: 0049 lsls r1, r1, #1
8002594: 430a orrs r2, r1
8002596: 601a str r2, [r3, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8002598: f7ff f888 bl 80016ac <HAL_GetTick>
800259c: 0003 movs r3, r0
800259e: 613b str r3, [r7, #16]
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80025a0: e008 b.n 80025b4 <HAL_RCCEx_PeriphCLKConfig+0x8c>
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
80025a2: f7ff f883 bl 80016ac <HAL_GetTick>
80025a6: 0002 movs r2, r0
80025a8: 693b ldr r3, [r7, #16]
80025aa: 1ad3 subs r3, r2, r3
80025ac: 2b64 cmp r3, #100 ; 0x64
80025ae: d901 bls.n 80025b4 <HAL_RCCEx_PeriphCLKConfig+0x8c>
{
return HAL_TIMEOUT;
80025b0: 2303 movs r3, #3
80025b2: e077 b.n 80026a4 <HAL_RCCEx_PeriphCLKConfig+0x17c>
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80025b4: 4b3e ldr r3, [pc, #248] ; (80026b0 <HAL_RCCEx_PeriphCLKConfig+0x188>)
80025b6: 681a ldr r2, [r3, #0]
80025b8: 2380 movs r3, #128 ; 0x80
80025ba: 005b lsls r3, r3, #1
80025bc: 4013 ands r3, r2
80025be: d0f0 beq.n 80025a2 <HAL_RCCEx_PeriphCLKConfig+0x7a>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
80025c0: 4b3a ldr r3, [pc, #232] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
80025c2: 6a1a ldr r2, [r3, #32]
80025c4: 23c0 movs r3, #192 ; 0xc0
80025c6: 009b lsls r3, r3, #2
80025c8: 4013 ands r3, r2
80025ca: 60fb str r3, [r7, #12]
if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
80025cc: 68fb ldr r3, [r7, #12]
80025ce: 2b00 cmp r3, #0
80025d0: d034 beq.n 800263c <HAL_RCCEx_PeriphCLKConfig+0x114>
80025d2: 687b ldr r3, [r7, #4]
80025d4: 685a ldr r2, [r3, #4]
80025d6: 23c0 movs r3, #192 ; 0xc0
80025d8: 009b lsls r3, r3, #2
80025da: 4013 ands r3, r2
80025dc: 68fa ldr r2, [r7, #12]
80025de: 429a cmp r2, r3
80025e0: d02c beq.n 800263c <HAL_RCCEx_PeriphCLKConfig+0x114>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
80025e2: 4b32 ldr r3, [pc, #200] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
80025e4: 6a1b ldr r3, [r3, #32]
80025e6: 4a33 ldr r2, [pc, #204] ; (80026b4 <HAL_RCCEx_PeriphCLKConfig+0x18c>)
80025e8: 4013 ands r3, r2
80025ea: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
80025ec: 4b2f ldr r3, [pc, #188] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
80025ee: 6a1a ldr r2, [r3, #32]
80025f0: 4b2e ldr r3, [pc, #184] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
80025f2: 2180 movs r1, #128 ; 0x80
80025f4: 0249 lsls r1, r1, #9
80025f6: 430a orrs r2, r1
80025f8: 621a str r2, [r3, #32]
__HAL_RCC_BACKUPRESET_RELEASE();
80025fa: 4b2c ldr r3, [pc, #176] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
80025fc: 6a1a ldr r2, [r3, #32]
80025fe: 4b2b ldr r3, [pc, #172] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
8002600: 492d ldr r1, [pc, #180] ; (80026b8 <HAL_RCCEx_PeriphCLKConfig+0x190>)
8002602: 400a ands r2, r1
8002604: 621a str r2, [r3, #32]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8002606: 4b29 ldr r3, [pc, #164] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
8002608: 68fa ldr r2, [r7, #12]
800260a: 621a str r2, [r3, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
800260c: 68fb ldr r3, [r7, #12]
800260e: 2201 movs r2, #1
8002610: 4013 ands r3, r2
8002612: d013 beq.n 800263c <HAL_RCCEx_PeriphCLKConfig+0x114>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002614: f7ff f84a bl 80016ac <HAL_GetTick>
8002618: 0003 movs r3, r0
800261a: 613b str r3, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800261c: e009 b.n 8002632 <HAL_RCCEx_PeriphCLKConfig+0x10a>
{
if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800261e: f7ff f845 bl 80016ac <HAL_GetTick>
8002622: 0002 movs r2, r0
8002624: 693b ldr r3, [r7, #16]
8002626: 1ad3 subs r3, r2, r3
8002628: 4a24 ldr r2, [pc, #144] ; (80026bc <HAL_RCCEx_PeriphCLKConfig+0x194>)
800262a: 4293 cmp r3, r2
800262c: d901 bls.n 8002632 <HAL_RCCEx_PeriphCLKConfig+0x10a>
{
return HAL_TIMEOUT;
800262e: 2303 movs r3, #3
8002630: e038 b.n 80026a4 <HAL_RCCEx_PeriphCLKConfig+0x17c>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8002632: 4b1e ldr r3, [pc, #120] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
8002634: 6a1b ldr r3, [r3, #32]
8002636: 2202 movs r2, #2
8002638: 4013 ands r3, r2
800263a: d0f0 beq.n 800261e <HAL_RCCEx_PeriphCLKConfig+0xf6>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
800263c: 4b1b ldr r3, [pc, #108] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
800263e: 6a1b ldr r3, [r3, #32]
8002640: 4a1c ldr r2, [pc, #112] ; (80026b4 <HAL_RCCEx_PeriphCLKConfig+0x18c>)
8002642: 4013 ands r3, r2
8002644: 0019 movs r1, r3
8002646: 687b ldr r3, [r7, #4]
8002648: 685a ldr r2, [r3, #4]
800264a: 4b18 ldr r3, [pc, #96] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
800264c: 430a orrs r2, r1
800264e: 621a str r2, [r3, #32]
/* Require to disable power clock if necessary */
if(pwrclkchanged == SET)
8002650: 2317 movs r3, #23
8002652: 18fb adds r3, r7, r3
8002654: 781b ldrb r3, [r3, #0]
8002656: 2b01 cmp r3, #1
8002658: d105 bne.n 8002666 <HAL_RCCEx_PeriphCLKConfig+0x13e>
{
__HAL_RCC_PWR_CLK_DISABLE();
800265a: 4b14 ldr r3, [pc, #80] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
800265c: 69da ldr r2, [r3, #28]
800265e: 4b13 ldr r3, [pc, #76] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
8002660: 4917 ldr r1, [pc, #92] ; (80026c0 <HAL_RCCEx_PeriphCLKConfig+0x198>)
8002662: 400a ands r2, r1
8002664: 61da str r2, [r3, #28]
}
}
/*------------------------------- USART1 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
8002666: 687b ldr r3, [r7, #4]
8002668: 681b ldr r3, [r3, #0]
800266a: 2201 movs r2, #1
800266c: 4013 ands r3, r2
800266e: d009 beq.n 8002684 <HAL_RCCEx_PeriphCLKConfig+0x15c>
{
/* Check the parameters */
assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
/* Configure the USART1 clock source */
__HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
8002670: 4b0e ldr r3, [pc, #56] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
8002672: 6b1b ldr r3, [r3, #48] ; 0x30
8002674: 2203 movs r2, #3
8002676: 4393 bics r3, r2
8002678: 0019 movs r1, r3
800267a: 687b ldr r3, [r7, #4]
800267c: 689a ldr r2, [r3, #8]
800267e: 4b0b ldr r3, [pc, #44] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
8002680: 430a orrs r2, r1
8002682: 631a str r2, [r3, #48] ; 0x30
__HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
}
#endif /* STM32F091xC || STM32F098xx */
/*------------------------------ I2C1 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
8002684: 687b ldr r3, [r7, #4]
8002686: 681b ldr r3, [r3, #0]
8002688: 2220 movs r2, #32
800268a: 4013 ands r3, r2
800268c: d009 beq.n 80026a2 <HAL_RCCEx_PeriphCLKConfig+0x17a>
{
/* Check the parameters */
assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
/* Configure the I2C1 clock source */
__HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
800268e: 4b07 ldr r3, [pc, #28] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
8002690: 6b1b ldr r3, [r3, #48] ; 0x30
8002692: 2210 movs r2, #16
8002694: 4393 bics r3, r2
8002696: 0019 movs r1, r3
8002698: 687b ldr r3, [r7, #4]
800269a: 68da ldr r2, [r3, #12]
800269c: 4b03 ldr r3, [pc, #12] ; (80026ac <HAL_RCCEx_PeriphCLKConfig+0x184>)
800269e: 430a orrs r2, r1
80026a0: 631a str r2, [r3, #48] ; 0x30
#endif /* STM32F042x6 || STM32F048xx || */
/* STM32F051x8 || STM32F058xx || */
/* STM32F071xB || STM32F072xB || STM32F078xx || */
/* STM32F091xC || STM32F098xx */
return HAL_OK;
80026a2: 2300 movs r3, #0
}
80026a4: 0018 movs r0, r3
80026a6: 46bd mov sp, r7
80026a8: b006 add sp, #24
80026aa: bd80 pop {r7, pc}
80026ac: 40021000 .word 0x40021000
80026b0: 40007000 .word 0x40007000
80026b4: fffffcff .word 0xfffffcff
80026b8: fffeffff .word 0xfffeffff
80026bc: 00001388 .word 0x00001388
80026c0: efffffff .word 0xefffffff
080026c4 <HAL_UART_Init>:
* parameters in the UART_InitTypeDef and initialize the associated handle.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
80026c4: b580 push {r7, lr}
80026c6: b082 sub sp, #8
80026c8: af00 add r7, sp, #0
80026ca: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
80026cc: 687b ldr r3, [r7, #4]
80026ce: 2b00 cmp r3, #0
80026d0: d101 bne.n 80026d6 <HAL_UART_Init+0x12>
{
return HAL_ERROR;
80026d2: 2301 movs r3, #1
80026d4: e044 b.n 8002760 <HAL_UART_Init+0x9c>
{
/* Check the parameters */
assert_param(IS_UART_INSTANCE(huart->Instance));
}
if (huart->gState == HAL_UART_STATE_RESET)
80026d6: 687b ldr r3, [r7, #4]
80026d8: 6f9b ldr r3, [r3, #120] ; 0x78
80026da: 2b00 cmp r3, #0
80026dc: d107 bne.n 80026ee <HAL_UART_Init+0x2a>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
80026de: 687b ldr r3, [r7, #4]
80026e0: 2274 movs r2, #116 ; 0x74
80026e2: 2100 movs r1, #0
80026e4: 5499 strb r1, [r3, r2]
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
80026e6: 687b ldr r3, [r7, #4]
80026e8: 0018 movs r0, r3
80026ea: f7fe fe9d bl 8001428 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
80026ee: 687b ldr r3, [r7, #4]
80026f0: 2224 movs r2, #36 ; 0x24
80026f2: 679a str r2, [r3, #120] ; 0x78
__HAL_UART_DISABLE(huart);
80026f4: 687b ldr r3, [r7, #4]
80026f6: 681b ldr r3, [r3, #0]
80026f8: 681a ldr r2, [r3, #0]
80026fa: 687b ldr r3, [r7, #4]
80026fc: 681b ldr r3, [r3, #0]
80026fe: 2101 movs r1, #1
8002700: 438a bics r2, r1
8002702: 601a str r2, [r3, #0]
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
8002704: 687b ldr r3, [r7, #4]
8002706: 0018 movs r0, r3
8002708: f000 f8da bl 80028c0 <UART_SetConfig>
800270c: 0003 movs r3, r0
800270e: 2b01 cmp r3, #1
8002710: d101 bne.n 8002716 <HAL_UART_Init+0x52>
{
return HAL_ERROR;
8002712: 2301 movs r3, #1
8002714: e024 b.n 8002760 <HAL_UART_Init+0x9c>
}
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
8002716: 687b ldr r3, [r7, #4]
8002718: 6a5b ldr r3, [r3, #36] ; 0x24
800271a: 2b00 cmp r3, #0
800271c: d003 beq.n 8002726 <HAL_UART_Init+0x62>
{
UART_AdvFeatureConfig(huart);
800271e: 687b ldr r3, [r7, #4]
8002720: 0018 movs r0, r3
8002722: f000 f9f3 bl 8002b0c <UART_AdvFeatureConfig>
- LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register,
- SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register.*/
#if defined (USART_CR2_LINEN)
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
#else
CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
8002726: 687b ldr r3, [r7, #4]
8002728: 681b ldr r3, [r3, #0]
800272a: 685a ldr r2, [r3, #4]
800272c: 687b ldr r3, [r7, #4]
800272e: 681b ldr r3, [r3, #0]
8002730: 490d ldr r1, [pc, #52] ; (8002768 <HAL_UART_Init+0xa4>)
8002732: 400a ands r2, r1
8002734: 605a str r2, [r3, #4]
#endif /* USART_CR3_IREN */
#else
#if defined (USART_CR3_IREN)
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN));
#else
CLEAR_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
8002736: 687b ldr r3, [r7, #4]
8002738: 681b ldr r3, [r3, #0]
800273a: 689a ldr r2, [r3, #8]
800273c: 687b ldr r3, [r7, #4]
800273e: 681b ldr r3, [r3, #0]
8002740: 2108 movs r1, #8
8002742: 438a bics r2, r1
8002744: 609a str r2, [r3, #8]
#endif /* USART_CR3_IREN*/
#endif /* USART_CR3_SCEN */
__HAL_UART_ENABLE(huart);
8002746: 687b ldr r3, [r7, #4]
8002748: 681b ldr r3, [r3, #0]
800274a: 681a ldr r2, [r3, #0]
800274c: 687b ldr r3, [r7, #4]
800274e: 681b ldr r3, [r3, #0]
8002750: 2101 movs r1, #1
8002752: 430a orrs r2, r1
8002754: 601a str r2, [r3, #0]
/* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
return (UART_CheckIdleState(huart));
8002756: 687b ldr r3, [r7, #4]
8002758: 0018 movs r0, r3
800275a: f000 fa8b bl 8002c74 <UART_CheckIdleState>
800275e: 0003 movs r3, r0
}
8002760: 0018 movs r0, r3
8002762: 46bd mov sp, r7
8002764: b002 add sp, #8
8002766: bd80 pop {r7, pc}
8002768: fffff7ff .word 0xfffff7ff
0800276c <HAL_UART_Transmit>:
* @param Size Amount of data elements (u8 or u16) to be sent.
* @param Timeout Timeout duration.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
800276c: b580 push {r7, lr}
800276e: b08a sub sp, #40 ; 0x28
8002770: af02 add r7, sp, #8
8002772: 60f8 str r0, [r7, #12]
8002774: 60b9 str r1, [r7, #8]
8002776: 603b str r3, [r7, #0]
8002778: 1dbb adds r3, r7, #6
800277a: 801a strh r2, [r3, #0]
uint8_t *pdata8bits;
uint16_t *pdata16bits;
uint32_t tickstart;
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
800277c: 68fb ldr r3, [r7, #12]
800277e: 6f9b ldr r3, [r3, #120] ; 0x78
8002780: 2b20 cmp r3, #32
8002782: d000 beq.n 8002786 <HAL_UART_Transmit+0x1a>
8002784: e096 b.n 80028b4 <HAL_UART_Transmit+0x148>
{
if ((pData == NULL) || (Size == 0U))
8002786: 68bb ldr r3, [r7, #8]
8002788: 2b00 cmp r3, #0
800278a: d003 beq.n 8002794 <HAL_UART_Transmit+0x28>
800278c: 1dbb adds r3, r7, #6
800278e: 881b ldrh r3, [r3, #0]
8002790: 2b00 cmp r3, #0
8002792: d101 bne.n 8002798 <HAL_UART_Transmit+0x2c>
{
return HAL_ERROR;
8002794: 2301 movs r3, #1
8002796: e08e b.n 80028b6 <HAL_UART_Transmit+0x14a>
}
/* In case of 9bits/No Parity transfer, pData buffer provided as input parameter
should be aligned on a u16 frontier, as data to be filled into TDR will be
handled through a u16 cast. */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
8002798: 68fb ldr r3, [r7, #12]
800279a: 689a ldr r2, [r3, #8]
800279c: 2380 movs r3, #128 ; 0x80
800279e: 015b lsls r3, r3, #5
80027a0: 429a cmp r2, r3
80027a2: d109 bne.n 80027b8 <HAL_UART_Transmit+0x4c>
80027a4: 68fb ldr r3, [r7, #12]
80027a6: 691b ldr r3, [r3, #16]
80027a8: 2b00 cmp r3, #0
80027aa: d105 bne.n 80027b8 <HAL_UART_Transmit+0x4c>
{
if ((((uint32_t)pData) & 1U) != 0U)
80027ac: 68bb ldr r3, [r7, #8]
80027ae: 2201 movs r2, #1
80027b0: 4013 ands r3, r2
80027b2: d001 beq.n 80027b8 <HAL_UART_Transmit+0x4c>
{
return HAL_ERROR;
80027b4: 2301 movs r3, #1
80027b6: e07e b.n 80028b6 <HAL_UART_Transmit+0x14a>
}
}
__HAL_LOCK(huart);
80027b8: 68fb ldr r3, [r7, #12]
80027ba: 2274 movs r2, #116 ; 0x74
80027bc: 5c9b ldrb r3, [r3, r2]
80027be: 2b01 cmp r3, #1
80027c0: d101 bne.n 80027c6 <HAL_UART_Transmit+0x5a>
80027c2: 2302 movs r3, #2
80027c4: e077 b.n 80028b6 <HAL_UART_Transmit+0x14a>
80027c6: 68fb ldr r3, [r7, #12]
80027c8: 2274 movs r2, #116 ; 0x74
80027ca: 2101 movs r1, #1
80027cc: 5499 strb r1, [r3, r2]
huart->ErrorCode = HAL_UART_ERROR_NONE;
80027ce: 68fb ldr r3, [r7, #12]
80027d0: 2280 movs r2, #128 ; 0x80
80027d2: 2100 movs r1, #0
80027d4: 5099 str r1, [r3, r2]
huart->gState = HAL_UART_STATE_BUSY_TX;
80027d6: 68fb ldr r3, [r7, #12]
80027d8: 2221 movs r2, #33 ; 0x21
80027da: 679a str r2, [r3, #120] ; 0x78
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
80027dc: f7fe ff66 bl 80016ac <HAL_GetTick>
80027e0: 0003 movs r3, r0
80027e2: 617b str r3, [r7, #20]
huart->TxXferSize = Size;
80027e4: 68fb ldr r3, [r7, #12]
80027e6: 1dba adds r2, r7, #6
80027e8: 2150 movs r1, #80 ; 0x50
80027ea: 8812 ldrh r2, [r2, #0]
80027ec: 525a strh r2, [r3, r1]
huart->TxXferCount = Size;
80027ee: 68fb ldr r3, [r7, #12]
80027f0: 1dba adds r2, r7, #6
80027f2: 2152 movs r1, #82 ; 0x52
80027f4: 8812 ldrh r2, [r2, #0]
80027f6: 525a strh r2, [r3, r1]
/* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
80027f8: 68fb ldr r3, [r7, #12]
80027fa: 689a ldr r2, [r3, #8]
80027fc: 2380 movs r3, #128 ; 0x80
80027fe: 015b lsls r3, r3, #5
8002800: 429a cmp r2, r3
8002802: d108 bne.n 8002816 <HAL_UART_Transmit+0xaa>
8002804: 68fb ldr r3, [r7, #12]
8002806: 691b ldr r3, [r3, #16]
8002808: 2b00 cmp r3, #0
800280a: d104 bne.n 8002816 <HAL_UART_Transmit+0xaa>
{
pdata8bits = NULL;
800280c: 2300 movs r3, #0
800280e: 61fb str r3, [r7, #28]
pdata16bits = (uint16_t *) pData;
8002810: 68bb ldr r3, [r7, #8]
8002812: 61bb str r3, [r7, #24]
8002814: e003 b.n 800281e <HAL_UART_Transmit+0xb2>
}
else
{
pdata8bits = pData;
8002816: 68bb ldr r3, [r7, #8]
8002818: 61fb str r3, [r7, #28]
pdata16bits = NULL;
800281a: 2300 movs r3, #0
800281c: 61bb str r3, [r7, #24]
}
__HAL_UNLOCK(huart);
800281e: 68fb ldr r3, [r7, #12]
8002820: 2274 movs r2, #116 ; 0x74
8002822: 2100 movs r1, #0
8002824: 5499 strb r1, [r3, r2]
while (huart->TxXferCount > 0U)
8002826: e02d b.n 8002884 <HAL_UART_Transmit+0x118>
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
8002828: 697a ldr r2, [r7, #20]
800282a: 68f8 ldr r0, [r7, #12]
800282c: 683b ldr r3, [r7, #0]
800282e: 9300 str r3, [sp, #0]
8002830: 0013 movs r3, r2
8002832: 2200 movs r2, #0
8002834: 2180 movs r1, #128 ; 0x80
8002836: f000 fa67 bl 8002d08 <UART_WaitOnFlagUntilTimeout>
800283a: 1e03 subs r3, r0, #0
800283c: d001 beq.n 8002842 <HAL_UART_Transmit+0xd6>
{
return HAL_TIMEOUT;
800283e: 2303 movs r3, #3
8002840: e039 b.n 80028b6 <HAL_UART_Transmit+0x14a>
}
if (pdata8bits == NULL)
8002842: 69fb ldr r3, [r7, #28]
8002844: 2b00 cmp r3, #0
8002846: d10b bne.n 8002860 <HAL_UART_Transmit+0xf4>
{
huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
8002848: 69bb ldr r3, [r7, #24]
800284a: 881a ldrh r2, [r3, #0]
800284c: 68fb ldr r3, [r7, #12]
800284e: 681b ldr r3, [r3, #0]
8002850: 05d2 lsls r2, r2, #23
8002852: 0dd2 lsrs r2, r2, #23
8002854: b292 uxth r2, r2
8002856: 851a strh r2, [r3, #40] ; 0x28
pdata16bits++;
8002858: 69bb ldr r3, [r7, #24]
800285a: 3302 adds r3, #2
800285c: 61bb str r3, [r7, #24]
800285e: e008 b.n 8002872 <HAL_UART_Transmit+0x106>
}
else
{
huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
8002860: 69fb ldr r3, [r7, #28]
8002862: 781a ldrb r2, [r3, #0]
8002864: 68fb ldr r3, [r7, #12]
8002866: 681b ldr r3, [r3, #0]
8002868: b292 uxth r2, r2
800286a: 851a strh r2, [r3, #40] ; 0x28
pdata8bits++;
800286c: 69fb ldr r3, [r7, #28]
800286e: 3301 adds r3, #1
8002870: 61fb str r3, [r7, #28]
}
huart->TxXferCount--;
8002872: 68fb ldr r3, [r7, #12]
8002874: 2252 movs r2, #82 ; 0x52
8002876: 5a9b ldrh r3, [r3, r2]
8002878: b29b uxth r3, r3
800287a: 3b01 subs r3, #1
800287c: b299 uxth r1, r3
800287e: 68fb ldr r3, [r7, #12]
8002880: 2252 movs r2, #82 ; 0x52
8002882: 5299 strh r1, [r3, r2]
while (huart->TxXferCount > 0U)
8002884: 68fb ldr r3, [r7, #12]
8002886: 2252 movs r2, #82 ; 0x52
8002888: 5a9b ldrh r3, [r3, r2]
800288a: b29b uxth r3, r3
800288c: 2b00 cmp r3, #0
800288e: d1cb bne.n 8002828 <HAL_UART_Transmit+0xbc>
}
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
8002890: 697a ldr r2, [r7, #20]
8002892: 68f8 ldr r0, [r7, #12]
8002894: 683b ldr r3, [r7, #0]
8002896: 9300 str r3, [sp, #0]
8002898: 0013 movs r3, r2
800289a: 2200 movs r2, #0
800289c: 2140 movs r1, #64 ; 0x40
800289e: f000 fa33 bl 8002d08 <UART_WaitOnFlagUntilTimeout>
80028a2: 1e03 subs r3, r0, #0
80028a4: d001 beq.n 80028aa <HAL_UART_Transmit+0x13e>
{
return HAL_TIMEOUT;
80028a6: 2303 movs r3, #3
80028a8: e005 b.n 80028b6 <HAL_UART_Transmit+0x14a>
}
/* At end of Tx process, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
80028aa: 68fb ldr r3, [r7, #12]
80028ac: 2220 movs r2, #32
80028ae: 679a str r2, [r3, #120] ; 0x78
return HAL_OK;
80028b0: 2300 movs r3, #0
80028b2: e000 b.n 80028b6 <HAL_UART_Transmit+0x14a>
}
else
{
return HAL_BUSY;
80028b4: 2302 movs r3, #2
}
}
80028b6: 0018 movs r0, r3
80028b8: 46bd mov sp, r7
80028ba: b008 add sp, #32
80028bc: bd80 pop {r7, pc}
...
080028c0 <UART_SetConfig>:
* @brief Configure the UART peripheral.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
{
80028c0: b580 push {r7, lr}
80028c2: b088 sub sp, #32
80028c4: af00 add r7, sp, #0
80028c6: 6078 str r0, [r7, #4]
uint32_t tmpreg;
uint16_t brrtemp;
UART_ClockSourceTypeDef clocksource;
uint32_t usartdiv;
HAL_StatusTypeDef ret = HAL_OK;
80028c8: 231e movs r3, #30
80028ca: 18fb adds r3, r7, r3
80028cc: 2200 movs r2, #0
80028ce: 701a strb r2, [r3, #0]
* the UART Word Length, Parity, Mode and oversampling:
* set the M bits according to huart->Init.WordLength value
* set PCE and PS bits according to huart->Init.Parity value
* set TE and RE bits according to huart->Init.Mode value
* set OVER8 bit according to huart->Init.OverSampling value */
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
80028d0: 687b ldr r3, [r7, #4]
80028d2: 689a ldr r2, [r3, #8]
80028d4: 687b ldr r3, [r7, #4]
80028d6: 691b ldr r3, [r3, #16]
80028d8: 431a orrs r2, r3
80028da: 687b ldr r3, [r7, #4]
80028dc: 695b ldr r3, [r3, #20]
80028de: 431a orrs r2, r3
80028e0: 687b ldr r3, [r7, #4]
80028e2: 69db ldr r3, [r3, #28]
80028e4: 4313 orrs r3, r2
80028e6: 617b str r3, [r7, #20]
MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
80028e8: 687b ldr r3, [r7, #4]
80028ea: 681b ldr r3, [r3, #0]
80028ec: 681b ldr r3, [r3, #0]
80028ee: 4a81 ldr r2, [pc, #516] ; (8002af4 <UART_SetConfig+0x234>)
80028f0: 4013 ands r3, r2
80028f2: 0019 movs r1, r3
80028f4: 687b ldr r3, [r7, #4]
80028f6: 681b ldr r3, [r3, #0]
80028f8: 697a ldr r2, [r7, #20]
80028fa: 430a orrs r2, r1
80028fc: 601a str r2, [r3, #0]
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits according
* to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
80028fe: 687b ldr r3, [r7, #4]
8002900: 681b ldr r3, [r3, #0]
8002902: 685b ldr r3, [r3, #4]
8002904: 4a7c ldr r2, [pc, #496] ; (8002af8 <UART_SetConfig+0x238>)
8002906: 4013 ands r3, r2
8002908: 0019 movs r1, r3
800290a: 687b ldr r3, [r7, #4]
800290c: 68da ldr r2, [r3, #12]
800290e: 687b ldr r3, [r7, #4]
8002910: 681b ldr r3, [r3, #0]
8002912: 430a orrs r2, r1
8002914: 605a str r2, [r3, #4]
/* Configure
* - UART HardWare Flow Control: set CTSE and RTSE bits according
* to huart->Init.HwFlowCtl value
* - one-bit sampling method versus three samples' majority rule according
* to huart->Init.OneBitSampling (not applicable to LPUART) */
tmpreg = (uint32_t)huart->Init.HwFlowCtl;
8002916: 687b ldr r3, [r7, #4]
8002918: 699b ldr r3, [r3, #24]
800291a: 617b str r3, [r7, #20]
tmpreg |= huart->Init.OneBitSampling;
800291c: 687b ldr r3, [r7, #4]
800291e: 6a1b ldr r3, [r3, #32]
8002920: 697a ldr r2, [r7, #20]
8002922: 4313 orrs r3, r2
8002924: 617b str r3, [r7, #20]
MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
8002926: 687b ldr r3, [r7, #4]
8002928: 681b ldr r3, [r3, #0]
800292a: 689b ldr r3, [r3, #8]
800292c: 4a73 ldr r2, [pc, #460] ; (8002afc <UART_SetConfig+0x23c>)
800292e: 4013 ands r3, r2
8002930: 0019 movs r1, r3
8002932: 687b ldr r3, [r7, #4]
8002934: 681b ldr r3, [r3, #0]
8002936: 697a ldr r2, [r7, #20]
8002938: 430a orrs r2, r1
800293a: 609a str r2, [r3, #8]
/*-------------------------- USART BRR Configuration -----------------------*/
UART_GETCLOCKSOURCE(huart, clocksource);
800293c: 4b70 ldr r3, [pc, #448] ; (8002b00 <UART_SetConfig+0x240>)
800293e: 6b1b ldr r3, [r3, #48] ; 0x30
8002940: 2203 movs r2, #3
8002942: 4013 ands r3, r2
8002944: 2b01 cmp r3, #1
8002946: d00f beq.n 8002968 <UART_SetConfig+0xa8>
8002948: d304 bcc.n 8002954 <UART_SetConfig+0x94>
800294a: 2b02 cmp r3, #2
800294c: d011 beq.n 8002972 <UART_SetConfig+0xb2>
800294e: 2b03 cmp r3, #3
8002950: d005 beq.n 800295e <UART_SetConfig+0x9e>
8002952: e013 b.n 800297c <UART_SetConfig+0xbc>
8002954: 231f movs r3, #31
8002956: 18fb adds r3, r7, r3
8002958: 2200 movs r2, #0
800295a: 701a strb r2, [r3, #0]
800295c: e012 b.n 8002984 <UART_SetConfig+0xc4>
800295e: 231f movs r3, #31
8002960: 18fb adds r3, r7, r3
8002962: 2202 movs r2, #2
8002964: 701a strb r2, [r3, #0]
8002966: e00d b.n 8002984 <UART_SetConfig+0xc4>
8002968: 231f movs r3, #31
800296a: 18fb adds r3, r7, r3
800296c: 2204 movs r2, #4
800296e: 701a strb r2, [r3, #0]
8002970: e008 b.n 8002984 <UART_SetConfig+0xc4>
8002972: 231f movs r3, #31
8002974: 18fb adds r3, r7, r3
8002976: 2208 movs r2, #8
8002978: 701a strb r2, [r3, #0]
800297a: e003 b.n 8002984 <UART_SetConfig+0xc4>
800297c: 231f movs r3, #31
800297e: 18fb adds r3, r7, r3
8002980: 2210 movs r2, #16
8002982: 701a strb r2, [r3, #0]
8002984: 46c0 nop ; (mov r8, r8)
if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
8002986: 687b ldr r3, [r7, #4]
8002988: 69da ldr r2, [r3, #28]
800298a: 2380 movs r3, #128 ; 0x80
800298c: 021b lsls r3, r3, #8
800298e: 429a cmp r2, r3
8002990: d15c bne.n 8002a4c <UART_SetConfig+0x18c>
{
switch (clocksource)
8002992: 231f movs r3, #31
8002994: 18fb adds r3, r7, r3
8002996: 781b ldrb r3, [r3, #0]
8002998: 2b02 cmp r3, #2
800299a: d00d beq.n 80029b8 <UART_SetConfig+0xf8>
800299c: dc02 bgt.n 80029a4 <UART_SetConfig+0xe4>
800299e: 2b00 cmp r3, #0
80029a0: d005 beq.n 80029ae <UART_SetConfig+0xee>
80029a2: e015 b.n 80029d0 <UART_SetConfig+0x110>
80029a4: 2b04 cmp r3, #4
80029a6: d00a beq.n 80029be <UART_SetConfig+0xfe>
80029a8: 2b08 cmp r3, #8
80029aa: d00d beq.n 80029c8 <UART_SetConfig+0x108>
80029ac: e010 b.n 80029d0 <UART_SetConfig+0x110>
{
case UART_CLOCKSOURCE_PCLK1:
pclk = HAL_RCC_GetPCLK1Freq();
80029ae: f7ff fda5 bl 80024fc <HAL_RCC_GetPCLK1Freq>
80029b2: 0003 movs r3, r0
80029b4: 61bb str r3, [r7, #24]
break;
80029b6: e012 b.n 80029de <UART_SetConfig+0x11e>
case UART_CLOCKSOURCE_HSI:
pclk = (uint32_t) HSI_VALUE;
80029b8: 4b52 ldr r3, [pc, #328] ; (8002b04 <UART_SetConfig+0x244>)
80029ba: 61bb str r3, [r7, #24]
break;
80029bc: e00f b.n 80029de <UART_SetConfig+0x11e>
case UART_CLOCKSOURCE_SYSCLK:
pclk = HAL_RCC_GetSysClockFreq();
80029be: f7ff fd2f bl 8002420 <HAL_RCC_GetSysClockFreq>
80029c2: 0003 movs r3, r0
80029c4: 61bb str r3, [r7, #24]
break;
80029c6: e00a b.n 80029de <UART_SetConfig+0x11e>
case UART_CLOCKSOURCE_LSE:
pclk = (uint32_t) LSE_VALUE;
80029c8: 2380 movs r3, #128 ; 0x80
80029ca: 021b lsls r3, r3, #8
80029cc: 61bb str r3, [r7, #24]
break;
80029ce: e006 b.n 80029de <UART_SetConfig+0x11e>
default:
pclk = 0U;
80029d0: 2300 movs r3, #0
80029d2: 61bb str r3, [r7, #24]
ret = HAL_ERROR;
80029d4: 231e movs r3, #30
80029d6: 18fb adds r3, r7, r3
80029d8: 2201 movs r2, #1
80029da: 701a strb r2, [r3, #0]
break;
80029dc: 46c0 nop ; (mov r8, r8)
}
/* USARTDIV must be greater than or equal to 0d16 */
if (pclk != 0U)
80029de: 69bb ldr r3, [r7, #24]
80029e0: 2b00 cmp r3, #0
80029e2: d100 bne.n 80029e6 <UART_SetConfig+0x126>
80029e4: e079 b.n 8002ada <UART_SetConfig+0x21a>
{
usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
80029e6: 69bb ldr r3, [r7, #24]
80029e8: 005a lsls r2, r3, #1
80029ea: 687b ldr r3, [r7, #4]
80029ec: 685b ldr r3, [r3, #4]
80029ee: 085b lsrs r3, r3, #1
80029f0: 18d2 adds r2, r2, r3
80029f2: 687b ldr r3, [r7, #4]
80029f4: 685b ldr r3, [r3, #4]
80029f6: 0019 movs r1, r3
80029f8: 0010 movs r0, r2
80029fa: f7fd fb8d bl 8000118 <__udivsi3>
80029fe: 0003 movs r3, r0
8002a00: b29b uxth r3, r3
8002a02: 613b str r3, [r7, #16]
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
8002a04: 693b ldr r3, [r7, #16]
8002a06: 2b0f cmp r3, #15
8002a08: d91b bls.n 8002a42 <UART_SetConfig+0x182>
8002a0a: 693b ldr r3, [r7, #16]
8002a0c: 4a3e ldr r2, [pc, #248] ; (8002b08 <UART_SetConfig+0x248>)
8002a0e: 4293 cmp r3, r2
8002a10: d817 bhi.n 8002a42 <UART_SetConfig+0x182>
{
brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
8002a12: 693b ldr r3, [r7, #16]
8002a14: b29a uxth r2, r3
8002a16: 200e movs r0, #14
8002a18: 183b adds r3, r7, r0
8002a1a: 210f movs r1, #15
8002a1c: 438a bics r2, r1
8002a1e: 801a strh r2, [r3, #0]
brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
8002a20: 693b ldr r3, [r7, #16]
8002a22: 085b lsrs r3, r3, #1
8002a24: b29b uxth r3, r3
8002a26: 2207 movs r2, #7
8002a28: 4013 ands r3, r2
8002a2a: b299 uxth r1, r3
8002a2c: 183b adds r3, r7, r0
8002a2e: 183a adds r2, r7, r0
8002a30: 8812 ldrh r2, [r2, #0]
8002a32: 430a orrs r2, r1
8002a34: 801a strh r2, [r3, #0]
huart->Instance->BRR = brrtemp;
8002a36: 687b ldr r3, [r7, #4]
8002a38: 681b ldr r3, [r3, #0]
8002a3a: 183a adds r2, r7, r0
8002a3c: 8812 ldrh r2, [r2, #0]
8002a3e: 60da str r2, [r3, #12]
8002a40: e04b b.n 8002ada <UART_SetConfig+0x21a>
}
else
{
ret = HAL_ERROR;
8002a42: 231e movs r3, #30
8002a44: 18fb adds r3, r7, r3
8002a46: 2201 movs r2, #1
8002a48: 701a strb r2, [r3, #0]
8002a4a: e046 b.n 8002ada <UART_SetConfig+0x21a>
}
}
}
else
{
switch (clocksource)
8002a4c: 231f movs r3, #31
8002a4e: 18fb adds r3, r7, r3
8002a50: 781b ldrb r3, [r3, #0]
8002a52: 2b02 cmp r3, #2
8002a54: d00d beq.n 8002a72 <UART_SetConfig+0x1b2>
8002a56: dc02 bgt.n 8002a5e <UART_SetConfig+0x19e>
8002a58: 2b00 cmp r3, #0
8002a5a: d005 beq.n 8002a68 <UART_SetConfig+0x1a8>
8002a5c: e015 b.n 8002a8a <UART_SetConfig+0x1ca>
8002a5e: 2b04 cmp r3, #4
8002a60: d00a beq.n 8002a78 <UART_SetConfig+0x1b8>
8002a62: 2b08 cmp r3, #8
8002a64: d00d beq.n 8002a82 <UART_SetConfig+0x1c2>
8002a66: e010 b.n 8002a8a <UART_SetConfig+0x1ca>
{
case UART_CLOCKSOURCE_PCLK1:
pclk = HAL_RCC_GetPCLK1Freq();
8002a68: f7ff fd48 bl 80024fc <HAL_RCC_GetPCLK1Freq>
8002a6c: 0003 movs r3, r0
8002a6e: 61bb str r3, [r7, #24]
break;
8002a70: e012 b.n 8002a98 <UART_SetConfig+0x1d8>
case UART_CLOCKSOURCE_HSI:
pclk = (uint32_t) HSI_VALUE;
8002a72: 4b24 ldr r3, [pc, #144] ; (8002b04 <UART_SetConfig+0x244>)
8002a74: 61bb str r3, [r7, #24]
break;
8002a76: e00f b.n 8002a98 <UART_SetConfig+0x1d8>
case UART_CLOCKSOURCE_SYSCLK:
pclk = HAL_RCC_GetSysClockFreq();
8002a78: f7ff fcd2 bl 8002420 <HAL_RCC_GetSysClockFreq>
8002a7c: 0003 movs r3, r0
8002a7e: 61bb str r3, [r7, #24]
break;
8002a80: e00a b.n 8002a98 <UART_SetConfig+0x1d8>
case UART_CLOCKSOURCE_LSE:
pclk = (uint32_t) LSE_VALUE;
8002a82: 2380 movs r3, #128 ; 0x80
8002a84: 021b lsls r3, r3, #8
8002a86: 61bb str r3, [r7, #24]
break;
8002a88: e006 b.n 8002a98 <UART_SetConfig+0x1d8>
default:
pclk = 0U;
8002a8a: 2300 movs r3, #0
8002a8c: 61bb str r3, [r7, #24]
ret = HAL_ERROR;
8002a8e: 231e movs r3, #30
8002a90: 18fb adds r3, r7, r3
8002a92: 2201 movs r2, #1
8002a94: 701a strb r2, [r3, #0]
break;
8002a96: 46c0 nop ; (mov r8, r8)
}
if (pclk != 0U)
8002a98: 69bb ldr r3, [r7, #24]
8002a9a: 2b00 cmp r3, #0
8002a9c: d01d beq.n 8002ada <UART_SetConfig+0x21a>
{
/* USARTDIV must be greater than or equal to 0d16 */
usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
8002a9e: 687b ldr r3, [r7, #4]
8002aa0: 685b ldr r3, [r3, #4]
8002aa2: 085a lsrs r2, r3, #1
8002aa4: 69bb ldr r3, [r7, #24]
8002aa6: 18d2 adds r2, r2, r3
8002aa8: 687b ldr r3, [r7, #4]
8002aaa: 685b ldr r3, [r3, #4]
8002aac: 0019 movs r1, r3
8002aae: 0010 movs r0, r2
8002ab0: f7fd fb32 bl 8000118 <__udivsi3>
8002ab4: 0003 movs r3, r0
8002ab6: b29b uxth r3, r3
8002ab8: 613b str r3, [r7, #16]
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
8002aba: 693b ldr r3, [r7, #16]
8002abc: 2b0f cmp r3, #15
8002abe: d908 bls.n 8002ad2 <UART_SetConfig+0x212>
8002ac0: 693b ldr r3, [r7, #16]
8002ac2: 4a11 ldr r2, [pc, #68] ; (8002b08 <UART_SetConfig+0x248>)
8002ac4: 4293 cmp r3, r2
8002ac6: d804 bhi.n 8002ad2 <UART_SetConfig+0x212>
{
huart->Instance->BRR = usartdiv;
8002ac8: 687b ldr r3, [r7, #4]
8002aca: 681b ldr r3, [r3, #0]
8002acc: 693a ldr r2, [r7, #16]
8002ace: 60da str r2, [r3, #12]
8002ad0: e003 b.n 8002ada <UART_SetConfig+0x21a>
}
else
{
ret = HAL_ERROR;
8002ad2: 231e movs r3, #30
8002ad4: 18fb adds r3, r7, r3
8002ad6: 2201 movs r2, #1
8002ad8: 701a strb r2, [r3, #0]
}
}
/* Clear ISR function pointers */
huart->RxISR = NULL;
8002ada: 687b ldr r3, [r7, #4]
8002adc: 2200 movs r2, #0
8002ade: 665a str r2, [r3, #100] ; 0x64
huart->TxISR = NULL;
8002ae0: 687b ldr r3, [r7, #4]
8002ae2: 2200 movs r2, #0
8002ae4: 669a str r2, [r3, #104] ; 0x68
return ret;
8002ae6: 231e movs r3, #30
8002ae8: 18fb adds r3, r7, r3
8002aea: 781b ldrb r3, [r3, #0]
}
8002aec: 0018 movs r0, r3
8002aee: 46bd mov sp, r7
8002af0: b008 add sp, #32
8002af2: bd80 pop {r7, pc}
8002af4: ffff69f3 .word 0xffff69f3
8002af8: ffffcfff .word 0xffffcfff
8002afc: fffff4ff .word 0xfffff4ff
8002b00: 40021000 .word 0x40021000
8002b04: 007a1200 .word 0x007a1200
8002b08: 0000ffff .word 0x0000ffff
08002b0c <UART_AdvFeatureConfig>:
* @brief Configure the UART peripheral advanced features.
* @param huart UART handle.
* @retval None
*/
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
{
8002b0c: b580 push {r7, lr}
8002b0e: b082 sub sp, #8
8002b10: af00 add r7, sp, #0
8002b12: 6078 str r0, [r7, #4]
/* Check whether the set of advanced features to configure is properly set */
assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
/* if required, configure TX pin active level inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
8002b14: 687b ldr r3, [r7, #4]
8002b16: 6a5b ldr r3, [r3, #36] ; 0x24
8002b18: 2201 movs r2, #1
8002b1a: 4013 ands r3, r2
8002b1c: d00b beq.n 8002b36 <UART_AdvFeatureConfig+0x2a>
{
assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
8002b1e: 687b ldr r3, [r7, #4]
8002b20: 681b ldr r3, [r3, #0]
8002b22: 685b ldr r3, [r3, #4]
8002b24: 4a4a ldr r2, [pc, #296] ; (8002c50 <UART_AdvFeatureConfig+0x144>)
8002b26: 4013 ands r3, r2
8002b28: 0019 movs r1, r3
8002b2a: 687b ldr r3, [r7, #4]
8002b2c: 6a9a ldr r2, [r3, #40] ; 0x28
8002b2e: 687b ldr r3, [r7, #4]
8002b30: 681b ldr r3, [r3, #0]
8002b32: 430a orrs r2, r1
8002b34: 605a str r2, [r3, #4]
}
/* if required, configure RX pin active level inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
8002b36: 687b ldr r3, [r7, #4]
8002b38: 6a5b ldr r3, [r3, #36] ; 0x24
8002b3a: 2202 movs r2, #2
8002b3c: 4013 ands r3, r2
8002b3e: d00b beq.n 8002b58 <UART_AdvFeatureConfig+0x4c>
{
assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
8002b40: 687b ldr r3, [r7, #4]
8002b42: 681b ldr r3, [r3, #0]
8002b44: 685b ldr r3, [r3, #4]
8002b46: 4a43 ldr r2, [pc, #268] ; (8002c54 <UART_AdvFeatureConfig+0x148>)
8002b48: 4013 ands r3, r2
8002b4a: 0019 movs r1, r3
8002b4c: 687b ldr r3, [r7, #4]
8002b4e: 6ada ldr r2, [r3, #44] ; 0x2c
8002b50: 687b ldr r3, [r7, #4]
8002b52: 681b ldr r3, [r3, #0]
8002b54: 430a orrs r2, r1
8002b56: 605a str r2, [r3, #4]
}
/* if required, configure data inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
8002b58: 687b ldr r3, [r7, #4]
8002b5a: 6a5b ldr r3, [r3, #36] ; 0x24
8002b5c: 2204 movs r2, #4
8002b5e: 4013 ands r3, r2
8002b60: d00b beq.n 8002b7a <UART_AdvFeatureConfig+0x6e>
{
assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
8002b62: 687b ldr r3, [r7, #4]
8002b64: 681b ldr r3, [r3, #0]
8002b66: 685b ldr r3, [r3, #4]
8002b68: 4a3b ldr r2, [pc, #236] ; (8002c58 <UART_AdvFeatureConfig+0x14c>)
8002b6a: 4013 ands r3, r2
8002b6c: 0019 movs r1, r3
8002b6e: 687b ldr r3, [r7, #4]
8002b70: 6b1a ldr r2, [r3, #48] ; 0x30
8002b72: 687b ldr r3, [r7, #4]
8002b74: 681b ldr r3, [r3, #0]
8002b76: 430a orrs r2, r1
8002b78: 605a str r2, [r3, #4]
}
/* if required, configure RX/TX pins swap */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
8002b7a: 687b ldr r3, [r7, #4]
8002b7c: 6a5b ldr r3, [r3, #36] ; 0x24
8002b7e: 2208 movs r2, #8
8002b80: 4013 ands r3, r2
8002b82: d00b beq.n 8002b9c <UART_AdvFeatureConfig+0x90>
{
assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
8002b84: 687b ldr r3, [r7, #4]
8002b86: 681b ldr r3, [r3, #0]
8002b88: 685b ldr r3, [r3, #4]
8002b8a: 4a34 ldr r2, [pc, #208] ; (8002c5c <UART_AdvFeatureConfig+0x150>)
8002b8c: 4013 ands r3, r2
8002b8e: 0019 movs r1, r3
8002b90: 687b ldr r3, [r7, #4]
8002b92: 6b5a ldr r2, [r3, #52] ; 0x34
8002b94: 687b ldr r3, [r7, #4]
8002b96: 681b ldr r3, [r3, #0]
8002b98: 430a orrs r2, r1
8002b9a: 605a str r2, [r3, #4]
}
/* if required, configure RX overrun detection disabling */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
8002b9c: 687b ldr r3, [r7, #4]
8002b9e: 6a5b ldr r3, [r3, #36] ; 0x24
8002ba0: 2210 movs r2, #16
8002ba2: 4013 ands r3, r2
8002ba4: d00b beq.n 8002bbe <UART_AdvFeatureConfig+0xb2>
{
assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
8002ba6: 687b ldr r3, [r7, #4]
8002ba8: 681b ldr r3, [r3, #0]
8002baa: 689b ldr r3, [r3, #8]
8002bac: 4a2c ldr r2, [pc, #176] ; (8002c60 <UART_AdvFeatureConfig+0x154>)
8002bae: 4013 ands r3, r2
8002bb0: 0019 movs r1, r3
8002bb2: 687b ldr r3, [r7, #4]
8002bb4: 6b9a ldr r2, [r3, #56] ; 0x38
8002bb6: 687b ldr r3, [r7, #4]
8002bb8: 681b ldr r3, [r3, #0]
8002bba: 430a orrs r2, r1
8002bbc: 609a str r2, [r3, #8]
}
/* if required, configure DMA disabling on reception error */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
8002bbe: 687b ldr r3, [r7, #4]
8002bc0: 6a5b ldr r3, [r3, #36] ; 0x24
8002bc2: 2220 movs r2, #32
8002bc4: 4013 ands r3, r2
8002bc6: d00b beq.n 8002be0 <UART_AdvFeatureConfig+0xd4>
{
assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
8002bc8: 687b ldr r3, [r7, #4]
8002bca: 681b ldr r3, [r3, #0]
8002bcc: 689b ldr r3, [r3, #8]
8002bce: 4a25 ldr r2, [pc, #148] ; (8002c64 <UART_AdvFeatureConfig+0x158>)
8002bd0: 4013 ands r3, r2
8002bd2: 0019 movs r1, r3
8002bd4: 687b ldr r3, [r7, #4]
8002bd6: 6bda ldr r2, [r3, #60] ; 0x3c
8002bd8: 687b ldr r3, [r7, #4]
8002bda: 681b ldr r3, [r3, #0]
8002bdc: 430a orrs r2, r1
8002bde: 609a str r2, [r3, #8]
}
/* if required, configure auto Baud rate detection scheme */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
8002be0: 687b ldr r3, [r7, #4]
8002be2: 6a5b ldr r3, [r3, #36] ; 0x24
8002be4: 2240 movs r2, #64 ; 0x40
8002be6: 4013 ands r3, r2
8002be8: d01d beq.n 8002c26 <UART_AdvFeatureConfig+0x11a>
{
assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
8002bea: 687b ldr r3, [r7, #4]
8002bec: 681b ldr r3, [r3, #0]
8002bee: 685b ldr r3, [r3, #4]
8002bf0: 4a1d ldr r2, [pc, #116] ; (8002c68 <UART_AdvFeatureConfig+0x15c>)
8002bf2: 4013 ands r3, r2
8002bf4: 0019 movs r1, r3
8002bf6: 687b ldr r3, [r7, #4]
8002bf8: 6c1a ldr r2, [r3, #64] ; 0x40
8002bfa: 687b ldr r3, [r7, #4]
8002bfc: 681b ldr r3, [r3, #0]
8002bfe: 430a orrs r2, r1
8002c00: 605a str r2, [r3, #4]
/* set auto Baudrate detection parameters if detection is enabled */
if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
8002c02: 687b ldr r3, [r7, #4]
8002c04: 6c1a ldr r2, [r3, #64] ; 0x40
8002c06: 2380 movs r3, #128 ; 0x80
8002c08: 035b lsls r3, r3, #13
8002c0a: 429a cmp r2, r3
8002c0c: d10b bne.n 8002c26 <UART_AdvFeatureConfig+0x11a>
{
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
8002c0e: 687b ldr r3, [r7, #4]
8002c10: 681b ldr r3, [r3, #0]
8002c12: 685b ldr r3, [r3, #4]
8002c14: 4a15 ldr r2, [pc, #84] ; (8002c6c <UART_AdvFeatureConfig+0x160>)
8002c16: 4013 ands r3, r2
8002c18: 0019 movs r1, r3
8002c1a: 687b ldr r3, [r7, #4]
8002c1c: 6c5a ldr r2, [r3, #68] ; 0x44
8002c1e: 687b ldr r3, [r7, #4]
8002c20: 681b ldr r3, [r3, #0]
8002c22: 430a orrs r2, r1
8002c24: 605a str r2, [r3, #4]
}
}
/* if required, configure MSB first on communication line */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
8002c26: 687b ldr r3, [r7, #4]
8002c28: 6a5b ldr r3, [r3, #36] ; 0x24
8002c2a: 2280 movs r2, #128 ; 0x80
8002c2c: 4013 ands r3, r2
8002c2e: d00b beq.n 8002c48 <UART_AdvFeatureConfig+0x13c>
{
assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
8002c30: 687b ldr r3, [r7, #4]
8002c32: 681b ldr r3, [r3, #0]
8002c34: 685b ldr r3, [r3, #4]
8002c36: 4a0e ldr r2, [pc, #56] ; (8002c70 <UART_AdvFeatureConfig+0x164>)
8002c38: 4013 ands r3, r2
8002c3a: 0019 movs r1, r3
8002c3c: 687b ldr r3, [r7, #4]
8002c3e: 6c9a ldr r2, [r3, #72] ; 0x48
8002c40: 687b ldr r3, [r7, #4]
8002c42: 681b ldr r3, [r3, #0]
8002c44: 430a orrs r2, r1
8002c46: 605a str r2, [r3, #4]
}
}
8002c48: 46c0 nop ; (mov r8, r8)
8002c4a: 46bd mov sp, r7
8002c4c: b002 add sp, #8
8002c4e: bd80 pop {r7, pc}
8002c50: fffdffff .word 0xfffdffff
8002c54: fffeffff .word 0xfffeffff
8002c58: fffbffff .word 0xfffbffff
8002c5c: ffff7fff .word 0xffff7fff
8002c60: ffffefff .word 0xffffefff
8002c64: ffffdfff .word 0xffffdfff
8002c68: ffefffff .word 0xffefffff
8002c6c: ff9fffff .word 0xff9fffff
8002c70: fff7ffff .word 0xfff7ffff
08002c74 <UART_CheckIdleState>:
* @brief Check the UART Idle State.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
{
8002c74: b580 push {r7, lr}
8002c76: b086 sub sp, #24
8002c78: af02 add r7, sp, #8
8002c7a: 6078 str r0, [r7, #4]
uint32_t tickstart;
/* Initialize the UART ErrorCode */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8002c7c: 687b ldr r3, [r7, #4]
8002c7e: 2280 movs r2, #128 ; 0x80
8002c80: 2100 movs r1, #0
8002c82: 5099 str r1, [r3, r2]
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
8002c84: f7fe fd12 bl 80016ac <HAL_GetTick>
8002c88: 0003 movs r3, r0
8002c8a: 60fb str r3, [r7, #12]
/* Check if the Transmitter is enabled */
if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
8002c8c: 687b ldr r3, [r7, #4]
8002c8e: 681b ldr r3, [r3, #0]
8002c90: 681b ldr r3, [r3, #0]
8002c92: 2208 movs r2, #8
8002c94: 4013 ands r3, r2
8002c96: 2b08 cmp r3, #8
8002c98: d10d bne.n 8002cb6 <UART_CheckIdleState+0x42>
{
/* Wait until TEACK flag is set */
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
8002c9a: 68fa ldr r2, [r7, #12]
8002c9c: 2380 movs r3, #128 ; 0x80
8002c9e: 0399 lsls r1, r3, #14
8002ca0: 6878 ldr r0, [r7, #4]
8002ca2: 4b18 ldr r3, [pc, #96] ; (8002d04 <UART_CheckIdleState+0x90>)
8002ca4: 9300 str r3, [sp, #0]
8002ca6: 0013 movs r3, r2
8002ca8: 2200 movs r2, #0
8002caa: f000 f82d bl 8002d08 <UART_WaitOnFlagUntilTimeout>
8002cae: 1e03 subs r3, r0, #0
8002cb0: d001 beq.n 8002cb6 <UART_CheckIdleState+0x42>
{
/* Timeout occurred */
return HAL_TIMEOUT;
8002cb2: 2303 movs r3, #3
8002cb4: e022 b.n 8002cfc <UART_CheckIdleState+0x88>
}
}
/* Check if the Receiver is enabled */
if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
8002cb6: 687b ldr r3, [r7, #4]
8002cb8: 681b ldr r3, [r3, #0]
8002cba: 681b ldr r3, [r3, #0]
8002cbc: 2204 movs r2, #4
8002cbe: 4013 ands r3, r2
8002cc0: 2b04 cmp r3, #4
8002cc2: d10d bne.n 8002ce0 <UART_CheckIdleState+0x6c>
{
/* Wait until REACK flag is set */
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
8002cc4: 68fa ldr r2, [r7, #12]
8002cc6: 2380 movs r3, #128 ; 0x80
8002cc8: 03d9 lsls r1, r3, #15
8002cca: 6878 ldr r0, [r7, #4]
8002ccc: 4b0d ldr r3, [pc, #52] ; (8002d04 <UART_CheckIdleState+0x90>)
8002cce: 9300 str r3, [sp, #0]
8002cd0: 0013 movs r3, r2
8002cd2: 2200 movs r2, #0
8002cd4: f000 f818 bl 8002d08 <UART_WaitOnFlagUntilTimeout>
8002cd8: 1e03 subs r3, r0, #0
8002cda: d001 beq.n 8002ce0 <UART_CheckIdleState+0x6c>
{
/* Timeout occurred */
return HAL_TIMEOUT;
8002cdc: 2303 movs r3, #3
8002cde: e00d b.n 8002cfc <UART_CheckIdleState+0x88>
}
}
/* Initialize the UART State */
huart->gState = HAL_UART_STATE_READY;
8002ce0: 687b ldr r3, [r7, #4]
8002ce2: 2220 movs r2, #32
8002ce4: 679a str r2, [r3, #120] ; 0x78
huart->RxState = HAL_UART_STATE_READY;
8002ce6: 687b ldr r3, [r7, #4]
8002ce8: 2220 movs r2, #32
8002cea: 67da str r2, [r3, #124] ; 0x7c
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
8002cec: 687b ldr r3, [r7, #4]
8002cee: 2200 movs r2, #0
8002cf0: 661a str r2, [r3, #96] ; 0x60
__HAL_UNLOCK(huart);
8002cf2: 687b ldr r3, [r7, #4]
8002cf4: 2274 movs r2, #116 ; 0x74
8002cf6: 2100 movs r1, #0
8002cf8: 5499 strb r1, [r3, r2]
return HAL_OK;
8002cfa: 2300 movs r3, #0
}
8002cfc: 0018 movs r0, r3
8002cfe: 46bd mov sp, r7
8002d00: b004 add sp, #16
8002d02: bd80 pop {r7, pc}
8002d04: 01ffffff .word 0x01ffffff
08002d08 <UART_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
uint32_t Tickstart, uint32_t Timeout)
{
8002d08: b580 push {r7, lr}
8002d0a: b084 sub sp, #16
8002d0c: af00 add r7, sp, #0
8002d0e: 60f8 str r0, [r7, #12]
8002d10: 60b9 str r1, [r7, #8]
8002d12: 603b str r3, [r7, #0]
8002d14: 1dfb adds r3, r7, #7
8002d16: 701a strb r2, [r3, #0]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8002d18: e05e b.n 8002dd8 <UART_WaitOnFlagUntilTimeout+0xd0>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
8002d1a: 69bb ldr r3, [r7, #24]
8002d1c: 3301 adds r3, #1
8002d1e: d05b beq.n 8002dd8 <UART_WaitOnFlagUntilTimeout+0xd0>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8002d20: f7fe fcc4 bl 80016ac <HAL_GetTick>
8002d24: 0002 movs r2, r0
8002d26: 683b ldr r3, [r7, #0]
8002d28: 1ad3 subs r3, r2, r3
8002d2a: 69ba ldr r2, [r7, #24]
8002d2c: 429a cmp r2, r3
8002d2e: d302 bcc.n 8002d36 <UART_WaitOnFlagUntilTimeout+0x2e>
8002d30: 69bb ldr r3, [r7, #24]
8002d32: 2b00 cmp r3, #0
8002d34: d11b bne.n 8002d6e <UART_WaitOnFlagUntilTimeout+0x66>
{
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
8002d36: 68fb ldr r3, [r7, #12]
8002d38: 681b ldr r3, [r3, #0]
8002d3a: 681a ldr r2, [r3, #0]
8002d3c: 68fb ldr r3, [r7, #12]
8002d3e: 681b ldr r3, [r3, #0]
8002d40: 492f ldr r1, [pc, #188] ; (8002e00 <UART_WaitOnFlagUntilTimeout+0xf8>)
8002d42: 400a ands r2, r1
8002d44: 601a str r2, [r3, #0]
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8002d46: 68fb ldr r3, [r7, #12]
8002d48: 681b ldr r3, [r3, #0]
8002d4a: 689a ldr r2, [r3, #8]
8002d4c: 68fb ldr r3, [r7, #12]
8002d4e: 681b ldr r3, [r3, #0]
8002d50: 2101 movs r1, #1
8002d52: 438a bics r2, r1
8002d54: 609a str r2, [r3, #8]
huart->gState = HAL_UART_STATE_READY;
8002d56: 68fb ldr r3, [r7, #12]
8002d58: 2220 movs r2, #32
8002d5a: 679a str r2, [r3, #120] ; 0x78
huart->RxState = HAL_UART_STATE_READY;
8002d5c: 68fb ldr r3, [r7, #12]
8002d5e: 2220 movs r2, #32
8002d60: 67da str r2, [r3, #124] ; 0x7c
__HAL_UNLOCK(huart);
8002d62: 68fb ldr r3, [r7, #12]
8002d64: 2274 movs r2, #116 ; 0x74
8002d66: 2100 movs r1, #0
8002d68: 5499 strb r1, [r3, r2]
return HAL_TIMEOUT;
8002d6a: 2303 movs r3, #3
8002d6c: e044 b.n 8002df8 <UART_WaitOnFlagUntilTimeout+0xf0>
}
if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
8002d6e: 68fb ldr r3, [r7, #12]
8002d70: 681b ldr r3, [r3, #0]
8002d72: 681b ldr r3, [r3, #0]
8002d74: 2204 movs r2, #4
8002d76: 4013 ands r3, r2
8002d78: d02e beq.n 8002dd8 <UART_WaitOnFlagUntilTimeout+0xd0>
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
8002d7a: 68fb ldr r3, [r7, #12]
8002d7c: 681b ldr r3, [r3, #0]
8002d7e: 69da ldr r2, [r3, #28]
8002d80: 2380 movs r3, #128 ; 0x80
8002d82: 011b lsls r3, r3, #4
8002d84: 401a ands r2, r3
8002d86: 2380 movs r3, #128 ; 0x80
8002d88: 011b lsls r3, r3, #4
8002d8a: 429a cmp r2, r3
8002d8c: d124 bne.n 8002dd8 <UART_WaitOnFlagUntilTimeout+0xd0>
{
/* Clear Receiver Timeout flag*/
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
8002d8e: 68fb ldr r3, [r7, #12]
8002d90: 681b ldr r3, [r3, #0]
8002d92: 2280 movs r2, #128 ; 0x80
8002d94: 0112 lsls r2, r2, #4
8002d96: 621a str r2, [r3, #32]
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
8002d98: 68fb ldr r3, [r7, #12]
8002d9a: 681b ldr r3, [r3, #0]
8002d9c: 681a ldr r2, [r3, #0]
8002d9e: 68fb ldr r3, [r7, #12]
8002da0: 681b ldr r3, [r3, #0]
8002da2: 4917 ldr r1, [pc, #92] ; (8002e00 <UART_WaitOnFlagUntilTimeout+0xf8>)
8002da4: 400a ands r2, r1
8002da6: 601a str r2, [r3, #0]
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8002da8: 68fb ldr r3, [r7, #12]
8002daa: 681b ldr r3, [r3, #0]
8002dac: 689a ldr r2, [r3, #8]
8002dae: 68fb ldr r3, [r7, #12]
8002db0: 681b ldr r3, [r3, #0]
8002db2: 2101 movs r1, #1
8002db4: 438a bics r2, r1
8002db6: 609a str r2, [r3, #8]
huart->gState = HAL_UART_STATE_READY;
8002db8: 68fb ldr r3, [r7, #12]
8002dba: 2220 movs r2, #32
8002dbc: 679a str r2, [r3, #120] ; 0x78
huart->RxState = HAL_UART_STATE_READY;
8002dbe: 68fb ldr r3, [r7, #12]
8002dc0: 2220 movs r2, #32
8002dc2: 67da str r2, [r3, #124] ; 0x7c
huart->ErrorCode = HAL_UART_ERROR_RTO;
8002dc4: 68fb ldr r3, [r7, #12]
8002dc6: 2280 movs r2, #128 ; 0x80
8002dc8: 2120 movs r1, #32
8002dca: 5099 str r1, [r3, r2]
/* Process Unlocked */
__HAL_UNLOCK(huart);
8002dcc: 68fb ldr r3, [r7, #12]
8002dce: 2274 movs r2, #116 ; 0x74
8002dd0: 2100 movs r1, #0
8002dd2: 5499 strb r1, [r3, r2]
return HAL_TIMEOUT;
8002dd4: 2303 movs r3, #3
8002dd6: e00f b.n 8002df8 <UART_WaitOnFlagUntilTimeout+0xf0>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8002dd8: 68fb ldr r3, [r7, #12]
8002dda: 681b ldr r3, [r3, #0]
8002ddc: 69db ldr r3, [r3, #28]
8002dde: 68ba ldr r2, [r7, #8]
8002de0: 4013 ands r3, r2
8002de2: 68ba ldr r2, [r7, #8]
8002de4: 1ad3 subs r3, r2, r3
8002de6: 425a negs r2, r3
8002de8: 4153 adcs r3, r2
8002dea: b2db uxtb r3, r3
8002dec: 001a movs r2, r3
8002dee: 1dfb adds r3, r7, #7
8002df0: 781b ldrb r3, [r3, #0]
8002df2: 429a cmp r2, r3
8002df4: d091 beq.n 8002d1a <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
}
return HAL_OK;
8002df6: 2300 movs r3, #0
}
8002df8: 0018 movs r0, r3
8002dfa: 46bd mov sp, r7
8002dfc: b004 add sp, #16
8002dfe: bd80 pop {r7, pc}
8002e00: fffffe5f .word 0xfffffe5f
08002e04 <__errno>:
8002e04: 4b01 ldr r3, [pc, #4] ; (8002e0c <__errno+0x8>)
8002e06: 6818 ldr r0, [r3, #0]
8002e08: 4770 bx lr
8002e0a: 46c0 nop ; (mov r8, r8)
8002e0c: 20000010 .word 0x20000010
08002e10 <__libc_init_array>:
8002e10: b570 push {r4, r5, r6, lr}
8002e12: 2600 movs r6, #0
8002e14: 4d0c ldr r5, [pc, #48] ; (8002e48 <__libc_init_array+0x38>)
8002e16: 4c0d ldr r4, [pc, #52] ; (8002e4c <__libc_init_array+0x3c>)
8002e18: 1b64 subs r4, r4, r5
8002e1a: 10a4 asrs r4, r4, #2
8002e1c: 42a6 cmp r6, r4
8002e1e: d109 bne.n 8002e34 <__libc_init_array+0x24>
8002e20: 2600 movs r6, #0
8002e22: f000 f905 bl 8003030 <_init>
8002e26: 4d0a ldr r5, [pc, #40] ; (8002e50 <__libc_init_array+0x40>)
8002e28: 4c0a ldr r4, [pc, #40] ; (8002e54 <__libc_init_array+0x44>)
8002e2a: 1b64 subs r4, r4, r5
8002e2c: 10a4 asrs r4, r4, #2
8002e2e: 42a6 cmp r6, r4
8002e30: d105 bne.n 8002e3e <__libc_init_array+0x2e>
8002e32: bd70 pop {r4, r5, r6, pc}
8002e34: 00b3 lsls r3, r6, #2
8002e36: 58eb ldr r3, [r5, r3]
8002e38: 4798 blx r3
8002e3a: 3601 adds r6, #1
8002e3c: e7ee b.n 8002e1c <__libc_init_array+0xc>
8002e3e: 00b3 lsls r3, r6, #2
8002e40: 58eb ldr r3, [r5, r3]
8002e42: 4798 blx r3
8002e44: 3601 adds r6, #1
8002e46: e7f2 b.n 8002e2e <__libc_init_array+0x1e>
8002e48: 080030ec .word 0x080030ec
8002e4c: 080030ec .word 0x080030ec
8002e50: 080030ec .word 0x080030ec
8002e54: 080030f0 .word 0x080030f0
08002e58 <memcpy>:
8002e58: 2300 movs r3, #0
8002e5a: b510 push {r4, lr}
8002e5c: 429a cmp r2, r3
8002e5e: d100 bne.n 8002e62 <memcpy+0xa>
8002e60: bd10 pop {r4, pc}
8002e62: 5ccc ldrb r4, [r1, r3]
8002e64: 54c4 strb r4, [r0, r3]
8002e66: 3301 adds r3, #1
8002e68: e7f8 b.n 8002e5c <memcpy+0x4>
08002e6a <memset>:
8002e6a: 0003 movs r3, r0
8002e6c: 1812 adds r2, r2, r0
8002e6e: 4293 cmp r3, r2
8002e70: d100 bne.n 8002e74 <memset+0xa>
8002e72: 4770 bx lr
8002e74: 7019 strb r1, [r3, #0]
8002e76: 3301 adds r3, #1
8002e78: e7f9 b.n 8002e6e <memset+0x4>
...
08002e7c <srand>:
8002e7c: 4b0d ldr r3, [pc, #52] ; (8002eb4 <srand+0x38>)
8002e7e: b570 push {r4, r5, r6, lr}
8002e80: 681c ldr r4, [r3, #0]
8002e82: 0005 movs r5, r0
8002e84: 6ba3 ldr r3, [r4, #56] ; 0x38
8002e86: 2b00 cmp r3, #0
8002e88: d10f bne.n 8002eaa <srand+0x2e>
8002e8a: 2018 movs r0, #24
8002e8c: f000 f854 bl 8002f38 <malloc>
8002e90: 4b09 ldr r3, [pc, #36] ; (8002eb8 <srand+0x3c>)
8002e92: 63a0 str r0, [r4, #56] ; 0x38
8002e94: 6003 str r3, [r0, #0]
8002e96: 4b09 ldr r3, [pc, #36] ; (8002ebc <srand+0x40>)
8002e98: 2201 movs r2, #1
8002e9a: 6043 str r3, [r0, #4]
8002e9c: 4b08 ldr r3, [pc, #32] ; (8002ec0 <srand+0x44>)
8002e9e: 6083 str r3, [r0, #8]
8002ea0: 230b movs r3, #11
8002ea2: 8183 strh r3, [r0, #12]
8002ea4: 2300 movs r3, #0
8002ea6: 6102 str r2, [r0, #16]
8002ea8: 6143 str r3, [r0, #20]
8002eaa: 2200 movs r2, #0
8002eac: 6ba3 ldr r3, [r4, #56] ; 0x38
8002eae: 611d str r5, [r3, #16]
8002eb0: 615a str r2, [r3, #20]
8002eb2: bd70 pop {r4, r5, r6, pc}
8002eb4: 20000010 .word 0x20000010
8002eb8: abcd330e .word 0xabcd330e
8002ebc: e66d1234 .word 0xe66d1234
8002ec0: 0005deec .word 0x0005deec
08002ec4 <rand>:
8002ec4: 4b12 ldr r3, [pc, #72] ; (8002f10 <rand+0x4c>)
8002ec6: b510 push {r4, lr}
8002ec8: 681c ldr r4, [r3, #0]
8002eca: 6ba3 ldr r3, [r4, #56] ; 0x38
8002ecc: 2b00 cmp r3, #0
8002ece: d10f bne.n 8002ef0 <rand+0x2c>
8002ed0: 2018 movs r0, #24
8002ed2: f000 f831 bl 8002f38 <malloc>
8002ed6: 4b0f ldr r3, [pc, #60] ; (8002f14 <rand+0x50>)
8002ed8: 63a0 str r0, [r4, #56] ; 0x38
8002eda: 6003 str r3, [r0, #0]
8002edc: 4b0e ldr r3, [pc, #56] ; (8002f18 <rand+0x54>)
8002ede: 2201 movs r2, #1
8002ee0: 6043 str r3, [r0, #4]
8002ee2: 4b0e ldr r3, [pc, #56] ; (8002f1c <rand+0x58>)
8002ee4: 6083 str r3, [r0, #8]
8002ee6: 230b movs r3, #11
8002ee8: 8183 strh r3, [r0, #12]
8002eea: 2300 movs r3, #0
8002eec: 6102 str r2, [r0, #16]
8002eee: 6143 str r3, [r0, #20]
8002ef0: 6ba4 ldr r4, [r4, #56] ; 0x38
8002ef2: 4a0b ldr r2, [pc, #44] ; (8002f20 <rand+0x5c>)
8002ef4: 6920 ldr r0, [r4, #16]
8002ef6: 6961 ldr r1, [r4, #20]
8002ef8: 4b0a ldr r3, [pc, #40] ; (8002f24 <rand+0x60>)
8002efa: f7fd fa83 bl 8000404 <__aeabi_lmul>
8002efe: 2201 movs r2, #1
8002f00: 2300 movs r3, #0
8002f02: 1880 adds r0, r0, r2
8002f04: 4159 adcs r1, r3
8002f06: 6120 str r0, [r4, #16]
8002f08: 6161 str r1, [r4, #20]
8002f0a: 0048 lsls r0, r1, #1
8002f0c: 0840 lsrs r0, r0, #1
8002f0e: bd10 pop {r4, pc}
8002f10: 20000010 .word 0x20000010
8002f14: abcd330e .word 0xabcd330e
8002f18: e66d1234 .word 0xe66d1234
8002f1c: 0005deec .word 0x0005deec
8002f20: 4c957f2d .word 0x4c957f2d
8002f24: 5851f42d .word 0x5851f42d
08002f28 <strcpy>:
8002f28: 0003 movs r3, r0
8002f2a: 780a ldrb r2, [r1, #0]
8002f2c: 3101 adds r1, #1
8002f2e: 701a strb r2, [r3, #0]
8002f30: 3301 adds r3, #1
8002f32: 2a00 cmp r2, #0
8002f34: d1f9 bne.n 8002f2a <strcpy+0x2>
8002f36: 4770 bx lr
08002f38 <malloc>:
8002f38: b510 push {r4, lr}
8002f3a: 4b03 ldr r3, [pc, #12] ; (8002f48 <malloc+0x10>)
8002f3c: 0001 movs r1, r0
8002f3e: 6818 ldr r0, [r3, #0]
8002f40: f000 f804 bl 8002f4c <_malloc_r>
8002f44: bd10 pop {r4, pc}
8002f46: 46c0 nop ; (mov r8, r8)
8002f48: 20000010 .word 0x20000010
08002f4c <_malloc_r>:
8002f4c: 2303 movs r3, #3
8002f4e: b570 push {r4, r5, r6, lr}
8002f50: 1ccd adds r5, r1, #3
8002f52: 439d bics r5, r3
8002f54: 3508 adds r5, #8
8002f56: 0006 movs r6, r0
8002f58: 2d0c cmp r5, #12
8002f5a: d21e bcs.n 8002f9a <_malloc_r+0x4e>
8002f5c: 250c movs r5, #12
8002f5e: 42a9 cmp r1, r5
8002f60: d81d bhi.n 8002f9e <_malloc_r+0x52>
8002f62: 0030 movs r0, r6
8002f64: f000 f862 bl 800302c <__malloc_lock>
8002f68: 4a25 ldr r2, [pc, #148] ; (8003000 <_malloc_r+0xb4>)
8002f6a: 6814 ldr r4, [r2, #0]
8002f6c: 0021 movs r1, r4
8002f6e: 2900 cmp r1, #0
8002f70: d119 bne.n 8002fa6 <_malloc_r+0x5a>
8002f72: 4c24 ldr r4, [pc, #144] ; (8003004 <_malloc_r+0xb8>)
8002f74: 6823 ldr r3, [r4, #0]
8002f76: 2b00 cmp r3, #0
8002f78: d103 bne.n 8002f82 <_malloc_r+0x36>
8002f7a: 0030 movs r0, r6
8002f7c: f000 f844 bl 8003008 <_sbrk_r>
8002f80: 6020 str r0, [r4, #0]
8002f82: 0029 movs r1, r5
8002f84: 0030 movs r0, r6
8002f86: f000 f83f bl 8003008 <_sbrk_r>
8002f8a: 1c43 adds r3, r0, #1
8002f8c: d12b bne.n 8002fe6 <_malloc_r+0x9a>
8002f8e: 230c movs r3, #12
8002f90: 0030 movs r0, r6
8002f92: 6033 str r3, [r6, #0]
8002f94: f000 f84b bl 800302e <__malloc_unlock>
8002f98: e003 b.n 8002fa2 <_malloc_r+0x56>
8002f9a: 2d00 cmp r5, #0
8002f9c: dadf bge.n 8002f5e <_malloc_r+0x12>
8002f9e: 230c movs r3, #12
8002fa0: 6033 str r3, [r6, #0]
8002fa2: 2000 movs r0, #0
8002fa4: bd70 pop {r4, r5, r6, pc}
8002fa6: 680b ldr r3, [r1, #0]
8002fa8: 1b5b subs r3, r3, r5
8002faa: d419 bmi.n 8002fe0 <_malloc_r+0x94>
8002fac: 2b0b cmp r3, #11
8002fae: d903 bls.n 8002fb8 <_malloc_r+0x6c>
8002fb0: 600b str r3, [r1, #0]
8002fb2: 18cc adds r4, r1, r3
8002fb4: 6025 str r5, [r4, #0]
8002fb6: e003 b.n 8002fc0 <_malloc_r+0x74>
8002fb8: 684b ldr r3, [r1, #4]
8002fba: 428c cmp r4, r1
8002fbc: d10d bne.n 8002fda <_malloc_r+0x8e>
8002fbe: 6013 str r3, [r2, #0]
8002fc0: 0030 movs r0, r6
8002fc2: f000 f834 bl 800302e <__malloc_unlock>
8002fc6: 0020 movs r0, r4
8002fc8: 2207 movs r2, #7
8002fca: 300b adds r0, #11
8002fcc: 1d23 adds r3, r4, #4
8002fce: 4390 bics r0, r2
8002fd0: 1ac3 subs r3, r0, r3
8002fd2: d0e7 beq.n 8002fa4 <_malloc_r+0x58>
8002fd4: 425a negs r2, r3
8002fd6: 50e2 str r2, [r4, r3]
8002fd8: e7e4 b.n 8002fa4 <_malloc_r+0x58>
8002fda: 6063 str r3, [r4, #4]
8002fdc: 000c movs r4, r1
8002fde: e7ef b.n 8002fc0 <_malloc_r+0x74>
8002fe0: 000c movs r4, r1
8002fe2: 6849 ldr r1, [r1, #4]
8002fe4: e7c3 b.n 8002f6e <_malloc_r+0x22>
8002fe6: 2303 movs r3, #3
8002fe8: 1cc4 adds r4, r0, #3
8002fea: 439c bics r4, r3
8002fec: 42a0 cmp r0, r4
8002fee: d0e1 beq.n 8002fb4 <_malloc_r+0x68>
8002ff0: 1a21 subs r1, r4, r0
8002ff2: 0030 movs r0, r6
8002ff4: f000 f808 bl 8003008 <_sbrk_r>
8002ff8: 1c43 adds r3, r0, #1
8002ffa: d1db bne.n 8002fb4 <_malloc_r+0x68>
8002ffc: e7c7 b.n 8002f8e <_malloc_r+0x42>
8002ffe: 46c0 nop ; (mov r8, r8)
8003000: 2000009c .word 0x2000009c
8003004: 200000a0 .word 0x200000a0
08003008 <_sbrk_r>:
8003008: 2300 movs r3, #0
800300a: b570 push {r4, r5, r6, lr}
800300c: 4c06 ldr r4, [pc, #24] ; (8003028 <_sbrk_r+0x20>)
800300e: 0005 movs r5, r0
8003010: 0008 movs r0, r1
8003012: 6023 str r3, [r4, #0]
8003014: f7fe fa8a bl 800152c <_sbrk>
8003018: 1c43 adds r3, r0, #1
800301a: d103 bne.n 8003024 <_sbrk_r+0x1c>
800301c: 6823 ldr r3, [r4, #0]
800301e: 2b00 cmp r3, #0
8003020: d000 beq.n 8003024 <_sbrk_r+0x1c>
8003022: 602b str r3, [r5, #0]
8003024: bd70 pop {r4, r5, r6, pc}
8003026: 46c0 nop ; (mov r8, r8)
8003028: 200001b0 .word 0x200001b0
0800302c <__malloc_lock>:
800302c: 4770 bx lr
0800302e <__malloc_unlock>:
800302e: 4770 bx lr
08003030 <_init>:
8003030: b5f8 push {r3, r4, r5, r6, r7, lr}
8003032: 46c0 nop ; (mov r8, r8)
8003034: bcf8 pop {r3, r4, r5, r6, r7}
8003036: bc08 pop {r3}
8003038: 469e mov lr, r3
800303a: 4770 bx lr
0800303c <_fini>:
800303c: b5f8 push {r3, r4, r5, r6, r7, lr}
800303e: 46c0 nop ; (mov r8, r8)
8003040: bcf8 pop {r3, r4, r5, r6, r7}
8003042: bc08 pop {r3}
8003044: 469e mov lr, r3
8003046: 4770 bx lr
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