Initial commit

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_dpm_core.h

@@ -0,0 +1,80 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_dpm_core.h
+  * @author  MCD Application Team
+  * @brief   Header file for usbpd_dpm_core.c file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics International N.V.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+#ifndef __USBPD_DPM_CORE_H_
+#define __USBPD_DPM_CORE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported typedef ----------------------------------------------------------*/
+/* USER CODE BEGIN typedef */
+
+/* USER CODE END typedef */
+
+/* Exported define -----------------------------------------------------------*/
+#ifdef _RTOS
+#if defined(USBPD_TCPM_MODULE_ENABLED)
+#define TCPM_ALARMBOX_MESSAGES_MAX      (3U * USBPD_PORT_COUNT)
+#endif /* USBPD_TCPM_MODULE_ENABLED */
+#endif /* _RTOS */
+/* USER CODE BEGIN define */
+
+/* USER CODE END define */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN constants */
+
+/* USER CODE END constants */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN macro */
+
+/* USER CODE END macro */
+
+/* Exported variables --------------------------------------------------------*/
+extern USBPD_ParamsTypeDef DPM_Params[USBPD_PORT_COUNT];
+/* USER CODE BEGIN variables */
+
+/* USER CODE END variables */
+
+/* Exported functions --------------------------------------------------------*/
+USBPD_StatusTypeDef USBPD_DPM_InitCore(void);
+USBPD_StatusTypeDef USBPD_DPM_InitOS(void);
+void                USBPD_DPM_Run(void);
+#if !defined(USBPDCORE_LIB_NO_PD)
+void                USBPD_DPM_TimerCounter(void);
+#endif /* USBPDCORE_LIB_NO_PD */
+/* USER CODE BEGIN functions */
+
+/* USER CODE END functions */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBPD_DPM_H_ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Core/inc/usbpd_trace.h

@@ -0,0 +1,135 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_trace.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of usbpd_cad.h for Cable Attach-Detach
+  *          controls.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+#ifndef __USBPD_TRACE_H_
+#define __USBPD_TRACE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbpd_core.h"
+/** @addtogroup STM32_USBPD_LIBRARY
+  * @{
+  */
+
+/** @addtogroup USBPD_CORE
+  * @{
+  */
+
+/** @addtogroup USBPD_CORE_TRACE
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported define -----------------------------------------------------------*/
+typedef enum {
+  TCPM_TRACE_CORE_ALERT,    /*!< ALERT_TASK */
+  TCPM_TRACE_ALERT,         /*!< USBPD_TCPM_alert */
+  TCPM_TRACE_ALERT_CLEAR,   /*!< USBPD_TCPM_alert: tcpc_clear_alert */
+  TCPM_TRACE_ALERT_GET_POWER_STATUS,  /*!< USBPD_TCPM_alert: get_power_status */
+  TCPM_TRACE_ALERT_GET_FAULT_STATUS,  /*!< USBPD_TCPM_alert: get_fault_status */
+  TCPM_TRACE_ALERT_SET_FAULT_STATUS,  /*!< USBPD_TCPM_alert: set_fault_status */
+  TCPM_TRACE_ALERT_READ_ALERT,  /*!< USBPD_TCPM_alert: set_fault_status */
+  TCPM_TRACE_HW_INIT,  /*!< USBPD_TCPM_HWInit */
+  TCPM_TRACE_SET_CC,  /*!< USBPD_TCPM_set_cc */
+  TCPM_TRACE_VBUS_GET_VOLTAGE,  /*!< USBPD_TCPM_VBUS_GetVoltage */
+  TCPM_TRACE_VBUS_IS_VSAFE0V,  /*!< USBPD_TCPM_VBUS_IsVsafe0V */
+  TCPM_TRACE_VBUS_IS_VSAFEEV,  /*!< USBPD_TCPM_VBUS_IsVsafe5V */
+  TCPM_TRACE_VBUS_ENABLE,  /*!< USBPD_TCPM_VBUS_Enable */
+  TCPM_TRACE_VBUS_DISABLE,  /*!< USBPD_TCPM_VBUS_Disable */
+  TCPM_TRACE_INIT,          /*USBPD_PHY_Init*/
+  TCPM_TRACE_DEINIT,        /*USBPD_PHY_Deinit*/
+  TCPM_TRACE_RESET,         /*USBPD_PHY_Reset*/
+  TCPM_TRACE_SOP_SUPPORTED, /*USBPD_PHY_SOPSupported*/
+  TCPM_TRACE_GET_CC,        /*USBPD_TCPM_get_cc*/
+  TCPM_TRACE_SET_POLARITY, /*USBPD_TCPM_set_polarity*/
+  TCPM_TRACE_SET_VCONN,     /*USBPD_TCPM_set_vconn*/
+  TCPM_TRACE_SET_MSG_HEADER, /*USBPD_TCPM_set_msg_header*/
+  TCPM_TRACE_SET_RX_STATE,  /*USBPD_TCPM_set_rx_state*/
+  TCPM_TRACE_SET_GET_MESSAGE, /*USBPD_TCPM_get_message*/
+  TCPM_TRACE_TRANSMIT,      /*USBPD_TCPM_transmit*/
+  TCPM_TRACE_RESET_REQUEST, /*USBPD_PHY_ResetRequest*/
+  TCPM_TRACE_SEND_BIST,     /*USBPD_PHY_Send_BIST_Pattern*/
+  TCPM_TRACE_SEND_BIST_PATTERN, /*USBPD_TCPM_Send_BIST_Pattern*/
+  TCPM_TRACE_SINK_TXNG,     /*USBPD_PHY_SetResistor_SinkTxNG*/
+  TCPM_TRACE_SINK_TXOK,     /*USBPD_PHY_SetResistor_SinkTxOK*/
+  TCPM_TRACE_SINK_IF_TXOK,  /*USBPD_PHY_IsResistor_SinkTxOk*/
+  TCPM_TRACE_FAST_ROLE_SWAP, /*USBPD_PHY_FastRoleSwapSignalling*/
+  TCPM_TRACE_ENABLE_RX,     /* tcpc_EnableRx */
+  TCPM_TRACE_DISABLE_RX,    /* tcpc_DisableRx */
+  TCPM_TRACE_SET_PIN_ROLE,  /* tcpc_tcpc_set_cc */
+} USBPD_TCPM_TRACE;
+
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported variables --------------------------------------------------------*/
+extern TRACE_ENTRY_POINT USBPD_Trace;
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup USBPD_CORE_TRACE_Exported_Functions USBPD CORE TRACE Exported Functions
+  * @{
+  */
+/**
+  * @brief  Initialize the TRACE module
+  * @retval None
+  */
+void            USBPD_TRACE_Init(void);
+
+/**
+  * @brief  DeInitialize the TRACE module
+  * @retval None
+  */
+void            USBPD_TRACE_DeInit(void);
+
+/**
+  * @brief  Add information in debug trace buffer
+  * @param  Type    Trace Type based on @ref TRACE_EVENT
+  * @param  PortNum Port number value
+  * @param  Sop     SOP type
+  * @param  Ptr     Pointer on the data to send
+  * @param  Size    Size of the data to send
+  * @retval None.
+  */
+void            USBPD_TRACE_Add(TRACE_EVENT Type, uint8_t PortNum, uint8_t Sop, uint8_t *Ptr, uint32_t Size);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBPD_CAD_H_ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Core/src/usbpd_trace.c

@@ -0,0 +1,217 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_trace.c
+  * @author  MCD Application Team
+  * @brief   This file contains trace control functions.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#define USBPD_TRACE_C
+
+#include "usbpd_def.h"
+#include "usbpd_core.h"
+#include "usbpd_trace.h"
+#ifdef _TRACE
+#include "tracer_emb.h"
+#endif
+
+/** @addtogroup STM32_USBPD_LIBRARY
+  * @{
+  */
+
+/** @addtogroup USBPD_CORE
+  * @{
+  */
+
+/** @addtogroup USBPD_CORE_TRACE
+  * @{
+  */
+
+/* Private enums -------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/** @defgroup USBPD_CORE_TRACE_Private_Defines USBPD TRACE Private Defines
+  * @{
+  */
+
+#define TRACE_SIZE_HEADER_TRACE   9u      /* Type + Time x 2 + PortNum + Sop + Size */
+
+#define TRACE_PORT_BIT_POSITION   5u      /* Bit position of port number in TAG id */
+
+#define TLV_SOF                   (uint8_t)0xFDu
+#define TLV_EOF                   (uint8_t)0xA5u
+#define TLV_SIZE_MAX              256u
+#define TLV_HEADER_SIZE           3u /* Size of TLV header (TAG(1) + LENGTH(2)  */
+#define TLV_SOF_SIZE              4u /* TLV_SOF * 4                             */
+#define TLV_EOF_SIZE              4u /* TLV_EOF * 4                             */
+
+#define DEBUG_STACK_MESSAGE       0x12u
+/**
+  * @}
+  */
+
+/* Private macro -------------------------------------------------------------*/
+/** @defgroup USBPD_CORE_TRACE_Private_Macros USBPD TRACE Private Macros
+  * @{
+  */
+#define __TRACE_SET_TAG_ID(_PORT_, _TAG_)  (((_PORT_) << TRACE_PORT_BIT_POSITION) | (_TAG_))
+
+#define TRACER_EMB_WRITE_DATA(_POSITION_,_DATA_)  TRACER_EMB_WriteData((_POSITION_),(_DATA_));\
+                                                  (_POSITION_) = ((_POSITION_) + 1u);
+
+/**
+  * @}
+  */
+
+/* Private function prototypes -----------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+const uint8_t OverFlow_String[] = { TLV_SOF, TLV_SOF, TLV_SOF, TLV_SOF,   /* Buffer header */
+                                    0x32,                                 /* Tag id */
+                                    0x0, 0x18,                            /* Length */
+                                    0x6,                                  /* Type */
+                                    0x0, 0x0, 0x0, 0x0,                   /* Time   */
+                                    0x0,                                  /* PortNum */
+                                    0x0,                                  /* SOP */
+                                    0x0, 0x0F,                                                    /* Size */
+                                    'T','R','A','C','E',' ','O','V','E','R','_','F','L','O','W',  /* Data */
+                                    TLV_EOF, TLV_EOF, TLV_EOF, TLV_EOF                            /* Buffer end */
+                                  };
+
+/** @defgroup USBPD_CORE_TRACE_Private_Variables USBPD TRACE Private Variables
+  * @{
+  */
+extern uint32_t HAL_GetTick(void);
+extern void     USBPD_DPM_TraceWakeUp(void);
+/**
+  * @}
+  */
+
+/* Exported functions ---------------------------------------------------------*/
+
+/** @addtogroup USBPD_CORE_TRACE_Exported_Functions
+  * @{
+  */
+void USBPD_TRACE_Init(void)
+{
+#if defined(_TRACE)
+  /* initialize tracer module */
+  TRACER_EMB_Init();
+
+  /* Initialize PE trace */
+  USBPD_PE_SetTrace(USBPD_TRACE_Add, 3u);
+
+  /* Initialize the overflow detection */
+  (void)TRACER_EMB_EnableOverFlow(OverFlow_String, sizeof(OverFlow_String));
+#else
+  return;
+#endif
+}
+
+void USBPD_TRACE_DeInit(void)
+{
+  /* Nothing to do */
+  return;
+}
+
+void  USBPD_TRACE_Add(TRACE_EVENT Type, uint8_t PortNum, uint8_t Sop, uint8_t *Ptr, uint32_t Size)
+{
+#if defined(_TRACE)
+  uint32_t _time;
+  int32_t _writepos;
+  uint32_t index;
+
+  /*  Get trace timing */
+  _time = HAL_GetTick();
+
+  TRACER_EMB_Lock();
+
+  /* Data are encapsulate inside a TLV string*/
+  /* Allocate buffer Size */
+  _writepos = TRACER_EMB_AllocateBufer(Size + TRACE_SIZE_HEADER_TRACE + TLV_HEADER_SIZE + TLV_SOF_SIZE + TLV_EOF_SIZE);
+
+  /* Check allocation */
+  if (_writepos  != -1)
+  {
+    /* Copy SOF bytes */
+    for (index = 0u; index < TLV_SOF_SIZE; index++)
+    {
+      TRACER_EMB_WRITE_DATA(_writepos, TLV_SOF);
+    }
+    /* Copy the TAG */
+    TRACER_EMB_WRITE_DATA(_writepos, __TRACE_SET_TAG_ID((PortNum + 1u), DEBUG_STACK_MESSAGE));
+    /* Copy the LENGTH */
+    TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)((Size + TRACE_SIZE_HEADER_TRACE) >> 8u));
+    TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)(Size+ TRACE_SIZE_HEADER_TRACE));
+
+    /* Trace type */
+    TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)Type);
+
+    TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)_time);
+    TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)(_time >> 8u));
+    TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)(_time >> 16u));
+    TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)(_time >> 24u));
+
+    TRACER_EMB_WRITE_DATA(_writepos, PortNum);
+    TRACER_EMB_WRITE_DATA(_writepos, Sop);
+
+    TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)(Size >> 8u));
+    TRACER_EMB_WRITE_DATA(_writepos, (uint8_t)Size);
+
+    /* initialize the Ptr for Read/Write */
+    for (index = 0u; index < Size; index++)
+    {
+      TRACER_EMB_WRITE_DATA(_writepos, Ptr[index]);
+    }
+
+    /* Copy EOF bytes */
+    for (index = 0u; index < TLV_EOF_SIZE; index++)
+    {
+      TRACER_EMB_WRITE_DATA(_writepos, TLV_EOF);
+    }
+  }
+
+  TRACER_EMB_UnLock();
+
+  TRACER_EMB_SendData();
+#else
+  return;
+#endif
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup USBPD_CORE_TRACE_Private_Functions USBPD TRACE Private Functions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/inc/usbpd_cad_hw_if.h

@@ -0,0 +1,88 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_cad_hw_if.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of usbpd_cad_hw_if.c for Cable Attach-Detach
+  *          controls.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+#ifndef __USBPD_CAD_HW_IF_H_
+#define __USBPD_CAD_HW_IF_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbpd_core.h"
+
+/** @addtogroup STM32_USBPD_LIBRARY
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE_CAD_HW_IF
+  * @{
+  */
+
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported define -----------------------------------------------------------*/
+
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported variables --------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+#if defined(USBPDCORE_DRP) || defined(USBPDCORE_SRC)
+/* Keep for legacy */
+uint32_t                          CAD_Set_ResistorRp(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef RpValue);
+#endif /* USBPDCORE_DRP || USBPDCORE_SRC */
+
+/** @addtogroup USBPD_DEVICE_CAD_HW_IF_Exported_Functions
+  * @{
+  */
+void                              CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *Settings, USBPD_ParamsTypeDef *Params, void (*PtrWakeUp)(void));
+uint32_t                          CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *Event, CCxPin_TypeDef *CCXX);
+void                              CAD_Enter_ErrorRecovery(uint8_t PortNum);
+#if defined(USBPDCORE_DRP) || defined(USBPDCORE_SRC)
+uint32_t                          CAD_SRC_Set_ResistorRp(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef RpValue);
+#endif /* USBPDCORE_DRP || USBPDCORE_SRC */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBPD_CAD_HW_IF_H_ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/inc/usbpd_devices_conf_template.h

@@ -0,0 +1,156 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_devices_conf.h
+  * @author  MCD Application Team
+  * @brief   This file contains the device define.
+  ******************************************************************************
+  *
+  * Copyright (c) 2017 STMicroelectronics. All rights reserved.
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+#ifndef USBPD_DEVICE_CONF_H
+#define USBPD_DEVICE_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g0xx_ll_adc.h"
+#include "stm32g0xx_ll_bus.h"
+#if defined(USBPD_HW_C)||defined(USBPD_BSP_TRACE_C)
+#include "stm32g0xx_ll_dma.h"
+#endif
+#if defined(USBPD_HW_C)||defined(USBPD_BSP_TRACE_C)
+#include "stm32g0xx_ll_gpio.h"
+#endif
+#include "stm32g0xx_ll_usart.h"
+#include "stm32g0xx_ll_ucpd.h"
+#include "stm32g0xx_ll_rcc.h"
+#include "stm32g0xx_ll_tim.h"
+
+/* Following include file may be replaced with the BSP UBSPD PWR header file */
+#if defined(STM32G081xx)
+#include "stm32g081b_eval_usbpd_pwr.h"
+#else
+#include "usbpd_bsp_pwr.h"
+#endif
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+/* -----------------------------------------------------------------------------
+      usbpd_hw.c
+-------------------------------------------------------------------------------*/
+
+/* defined used to configure function : USBPD_HW_GetUSPDInstance */
+#define UCPD_INSTANCE0 UCPD1
+#define UCPD_INSTANCE1 UCPD2
+
+/* defined used to configure function : USBPD_HW_Init_DMARxInstance,USBPD_HW_DeInit_DMARxInstance */
+#define UCPDDMA_INSTANCE0_CLOCKENABLE_RX  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1)
+#define UCPDDMA_INSTANCE1_CLOCKENABLE_RX  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1)
+
+#define UCPDDMA_INSTANCE0_DMA_RX  DMA1
+#define UCPDDMA_INSTANCE1_DMA_RX  DMA1
+
+#define UCPDDMA_INSTANCE0_REQUEST_RX   DMA_REQUEST_UCPD1_RX
+#define UCPDDMA_INSTANCE1_REQUEST_RX   DMA_REQUEST_UCPD2_RX
+
+#define UCPDDMA_INSTANCE0_LL_CHANNEL_RX   LL_DMA_CHANNEL_5
+#define UCPDDMA_INSTANCE1_LL_CHANNEL_RX   LL_DMA_CHANNEL_2
+
+#define UCPDDMA_INSTANCE0_CHANNEL_RX   DMA1_Channel5
+#define UCPDDMA_INSTANCE1_CHANNEL_RX   DMA1_Channel2
+
+/* defined used to configure function : USBPD_HW_Init_DMATxInstance, USBPD_HW_DeInit_DMATxInstance */
+#define UCPDDMA_INSTANCE0_CLOCKENABLE_TX  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1)
+#define UCPDDMA_INSTANCE1_CLOCKENABLE_TX  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1)
+
+#define UCPDDMA_INSTANCE0_DMA_TX  DMA1
+#define UCPDDMA_INSTANCE1_DMA_TX  DMA1
+
+#define UCPDDMA_INSTANCE0_REQUEST_TX   DMA_REQUEST_UCPD1_TX
+#define UCPDDMA_INSTANCE1_REQUEST_TX   DMA_REQUEST_UCPD2_TX
+
+#define UCPDDMA_INSTANCE0_LL_CHANNEL_TX   LL_DMA_CHANNEL_3
+#define UCPDDMA_INSTANCE1_LL_CHANNEL_TX   LL_DMA_CHANNEL_4
+
+#define UCPDDMA_INSTANCE0_CHANNEL_TX   DMA1_Channel3
+#define UCPDDMA_INSTANCE1_CHANNEL_TX   DMA1_Channel4
+
+/* defined used to configure  USBPD_HW_SetFRSSignalling */
+#define UCPDFRS_INSTANCE0_FRSCC1  do{                                                                  \
+                                     LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);              \
+                                     LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_2, LL_GPIO_MODE_ALTERNATE); \
+                                     LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_2, LL_GPIO_AF_4);        \
+                                    } while(0)
+
+#define UCPDFRS_INSTANCE1_FRSCC1
+
+#define UCPDFRS_INSTANCE0_FRSCC2  do{                                                                  \
+                                     LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);              \
+                                     LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_0, LL_GPIO_MODE_ALTERNATE); \
+                                     LL_GPIO_SetAFPin_0_7(GPIOB, LL_GPIO_PIN_0, LL_GPIO_AF_6);        \
+                                    } while(0)
+
+#define UCPDFRS_INSTANCE1_FRSCC2
+
+#define UCPD_INSTANCE0_ENABLEIRQ  do{                                                                  \
+                                        NVIC_SetPriority(UCPD1_2_IRQn,2);                                \
+                                        NVIC_EnableIRQ(UCPD1_2_IRQn);                                    \
+                                    } while(0)
+
+#define UCPD_INSTANCE1_ENABLEIRQ  do{                                                                  \
+                                        NVIC_SetPriority(UCPD1_2_IRQn,2);                                \
+                                        NVIC_EnableIRQ(UCPD1_2_IRQn);                                    \
+                                    } while(0)
+
+/* -----------------------------------------------------------------------------
+      Definitions for timer service feature
+-------------------------------------------------------------------------------*/
+#define TIMX                           TIM2
+#define TIMX_CLK_ENABLE                LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2)
+#define TIMX_CLK_DISABLE               LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_TIM2)
+#define TIMX_IRQ                       TIM2_IRQn
+#define TIMX_CHANNEL_CH1               LL_TIM_CHANNEL_CH1
+#define TIMX_CHANNEL_CH2               LL_TIM_CHANNEL_CH2
+#define TIMX_CHANNEL_CH3               LL_TIM_CHANNEL_CH3
+#define TIMX_CHANNEL_CH4               LL_TIM_CHANNEL_CH4
+#define TIMX_CHANNEL1_SETEVENT         do{                                                                    \
+                                          LL_TIM_OC_SetCompareCH1(TIMX, (TimeUs + TIMX->CNT) % TIM_MAX_TIME);\
+                                          LL_TIM_ClearFlag_CC1(TIMX);                                         \
+                                       }while(0)
+#define TIMX_CHANNEL2_SETEVENT         do{                                                                    \
+                                          LL_TIM_OC_SetCompareCH2(TIMX, (TimeUs + TIMX->CNT) % TIM_MAX_TIME);\
+                                          LL_TIM_ClearFlag_CC2(TIMX);                                         \
+                                       }while(0)
+#define TIMX_CHANNEL3_SETEVENT         do{                                                                    \
+                                          LL_TIM_OC_SetCompareCH3(TIMX, (TimeUs + TIMX->CNT) % TIM_MAX_TIME);\
+                                          LL_TIM_ClearFlag_CC3(TIMX);                                         \
+                                       }while(0)
+#define TIMX_CHANNEL4_SETEVENT         do{                                                                    \
+                                          LL_TIM_OC_SetCompareCH4(TIMX, (TimeUs + TIMX->CNT) % TIM_MAX_TIME);\
+                                          LL_TIM_ClearFlag_CC4(TIMX);                                         \
+                                       }while(0)
+#define TIMX_CHANNEL1_GETFLAG          LL_TIM_IsActiveFlag_CC1
+#define TIMX_CHANNEL2_GETFLAG          LL_TIM_IsActiveFlag_CC2
+#define TIMX_CHANNEL3_GETFLAG          LL_TIM_IsActiveFlag_CC3
+#define TIMX_CHANNEL4_GETFLAG          LL_TIM_IsActiveFlag_CC4
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* USBPD_DEVICE_CONF_H */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/inc/usbpd_hw.h

@@ -0,0 +1,36 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_hw.h
+  * @author  MCD Application Team
+  * @brief   This file contains interface hw control.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+#ifndef USBPD_HW_H
+#define USBPD_HW_H
+/* Includes ------------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Variable containing ADC conversions results */
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+UCPD_TypeDef *USBPD_HW_GetUSPDInstance(uint8_t PortNum);
+DMA_Channel_TypeDef *USBPD_HW_Init_DMARxInstance(uint8_t PortNum);
+void USBPD_HW_DeInit_DMARxInstance(uint8_t PortNum);
+DMA_Channel_TypeDef *USBPD_HW_Init_DMATxInstance(uint8_t PortNum);
+void USBPD_HW_DeInit_DMATxInstance(uint8_t PortNum);
+uint32_t USBPD_HW_GetRpResistorValue(uint8_t Portnum);
+void USBPD_HW_SetFRSSignalling(uint8_t Portnum, uint8_t cc);
+#endif /* USBPD_BSP_HW_H */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/inc/usbpd_hw_if.h

@@ -0,0 +1,379 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_hw_if.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of usbpd_hw_if.h for USB-PD Hardware
+             Interface layer. This file is specific for each device.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+#ifndef __USBPD_HW_IF_H_
+#define __USBPD_HW_IF_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbpd_def.h"
+#include "usbpd_devices_conf.h"
+
+/** @addtogroup STM32_USBPD_LIBRARY
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE_HW_IF
+  * @{
+  */
+
+/* Exported typedef ----------------------------------------------------------*/
+/** @defgroup USBPD_DEVICE_DEVICE_HW_IF_Exported_Types USBPD DEVICE HW_IF Exported Types
+  * @{
+  */
+
+/**
+  * @brief Enum used to get the status of decoding
+  */
+typedef enum
+{
+  USBPD_PHY_RX_STATUS_NONE,
+  USBPD_PHY_RX_STATUS_OK,
+  USBPD_PHY_RX_STATUS_SOP_DETECTING,
+  USBPD_PHY_RX_STATUS_DATA,
+  USBPD_PHY_RX_STATUS_MESSAGE_READY,
+  USBPD_PHY_RX_STATUS_ERROR,
+  USBPD_PHY_RX_STATUS_ERROR_UNSUPPORTED_SOP,
+  USBPD_PHY_RX_STATUS_ERROR_INVALID_SOP,
+  USBPD_PHY_RX_STATUS_ERROR_INVALID_SYMBOL,
+  USBPD_PHY_RX_STATUS_ERROR_EOP_NOT_FOUND,
+  USBPD_PHY_RX_STATUS_ERROR_CRC_FAILED,
+}
+USBPD_PHY_RX_Status_TypeDef;
+
+/**
+  * @brief CallBacks exposed by the HW_IF to the PHY
+  */
+typedef struct
+{
+  /**
+  * @brief  The message transfer has been completed
+  * @param  PortNum Port number
+  * @param  Status (0 means OK)
+  * @retval None
+  */
+  void (*USBPD_HW_IF_TxCompleted)(uint8_t PortNum, uint32_t Status);
+
+  /**
+  * @brief  Bist data sent callback from PHY_HW_IF
+  * @param  PortNum Port number
+  * @param  bistmode: Bist mode
+  * @retval None
+  */
+  void (*USBPD_HW_IF_BistCompleted)(uint8_t PortNum, USBPD_BISTMsg_TypeDef bistmode);
+
+  /**
+  * @brief  The reception phase of an hard reset is completed notify it.
+  * @param  PortNum Port number
+  * @param  SOPType SOP Message Type based on @ref USBPD_SOPType_TypeDef
+  * @retval None
+  */
+  void (*USBPD_HW_IF_RX_ResetIndication)(uint8_t PortNum, USBPD_SOPType_TypeDef Type);
+
+  /**
+  * @brief  The reception phase of the current message is completed and notify it.
+  * @param  PortNum Port number
+  * @param  MsgType Message Type
+  * @retval None
+  */
+  void (*USBPD_HW_IF_RX_Completed)(uint8_t PortNum, uint32_t MsgType);
+
+  /**
+  * @brief  The emission of HRST has been completed.
+  * @param  PortNum Port number
+  * @retval None
+  */
+  void (*USBPD_HW_IF_TX_HardResetCompleted)(uint8_t PortNum, USBPD_SOPType_TypeDef Type);
+
+  /**
+  * @brief  FRS reception.
+  * @param  PortNum Port number
+  * @retval None
+  */
+  void (*USBPD_HW_IF_TX_FRSReception)(uint8_t PortNum);
+
+} USBPD_HW_IF_Callbacks;
+
+/** @defgroup USBPD_PORT_HandleTypeDef USB PD handle Structure definition for USBPD_PHY_HW_IF
+  * @brief  USBPD PORT handle Structure definition
+  * @{
+  */
+typedef struct
+{
+  UCPD_TypeDef                *husbpd;          /*!< UCPD Handle parameters             */
+  DMA_Channel_TypeDef         *hdmatx;          /*!< Tx DMA Handle parameters           */
+  DMA_Channel_TypeDef         *hdmarx;          /*!< Rx DMA Handle parameters           */
+
+  USBPD_SettingsTypeDef       *settings;
+  USBPD_ParamsTypeDef         *params;
+  USBPD_HW_IF_Callbacks        cbs;             /*!< USBPD_PHY_HW_IF callbacks         */
+
+  void (*USBPD_CAD_WakeUp)(void);               /*!< function used to wakeup cad task   */
+
+  uint8_t                     *ptr_RxBuff;     /*!< Pointer to Raw Rx transfer Buffer  */
+
+  CCxPin_TypeDef               CCx;             /*!< CC pin used for communication      */
+} USBPD_PORT_HandleTypeDef;
+
+extern USBPD_PORT_HandleTypeDef Ports[USBPD_PORT_COUNT];
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported define -----------------------------------------------------------*/
+
+/** @defgroup USBPD_DEVICE_DEVICE_HW_IF_Exported_Defines USBPD DEVICE HW_IF Exported Defines
+  * @{
+  */
+
+#define SIZE_MAX_PD_TRANSACTION_CHUNK   30u
+#define SIZE_MAX_PD_TRANSACTION_UNCHUNK (260u + 4u)
+
+/**
+  * @}
+  */
+
+/* Exported variables --------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup USBPD_DEVICE_DEVICE_HW_IF_Exported_Functions USBPD DEVICE HW_IF Exported Functions
+  * @{
+  */
+
+/**
+  * @brief  Enable the interrupt for the reception.
+  * @param  PortNum The handle of the port.
+  * @retval None
+  */
+void USBPDM1_RX_EnableInterrupt(uint8_t PortNum);
+
+/**
+  * @brief  stop bist carrier mode 2.
+  * @param  PortNum The port handle.
+  * @retval None
+  */
+void USBPD_HW_IF_StopBISTMode2(uint8_t PortNum);
+
+/**
+  * @brief  Initialize specific peripheral for the APP.
+  * @retval None
+  */
+void USBPD_HW_IF_GlobalHwInit(void);
+
+/**
+  * @brief  Send a Buffer .
+  * @note   The data will be converted in bmc and send through the line
+  * @param  PortNum     The port handle.
+  * @param  Type        SOP Message Type based on @ref USBPD_SOPType_TypeDef
+  * @param  pBuffer     Data buffer to be transmitted
+  * @param  Bitsize     The number of bits to be transmitted
+  * @retval USBPD status
+  */
+USBPD_StatusTypeDef USBPD_HW_IF_SendBuffer(uint8_t PortNum, USBPD_SOPType_TypeDef Type, uint8_t *pBuffer, uint32_t Bitsize);
+
+#if defined(_SRC) || defined(_DRP)
+/**
+  * @brief  Enable the VBUS on a specified port.
+  * @param  PortNum     The port handle.
+  * @param  State       ENABLE or DISABLE.
+  * @param  Cc          CC pin based on @ref CCxPin_TypeDef
+  * @param  VconnState  VCONN State activation
+  * @param  role        The role of the port.
+  * @retval USBPD status
+  */
+USBPD_StatusTypeDef HW_IF_PWR_Enable(uint8_t PortNum, USBPD_FunctionalState State, CCxPin_TypeDef Cc, uint32_t VconnState, USBPD_PortPowerRole_TypeDef role);
+#endif /* _SRC || _DRP */
+
+/**
+  * @brief  Retrieve the VBUS status for a specified port.
+  * @param  PortNum The port handle.
+  * @retval FunctionalState
+  */
+USBPD_FunctionalState HW_IF_PWR_VBUSIsEnabled(uint8_t PortNum);
+
+/**
+  * @brief  Set the VBUS voltage level on a specified port.
+  * @param  PortNum The port handle.
+  * @param  Voltage voltage value to be set.
+  * @retval USBPD status
+  */
+USBPD_StatusTypeDef HW_IF_PWR_SetVoltage(uint8_t PortNum, uint16_t Voltage);
+
+/**
+  * @brief  Get the voltage level on a specified port.
+  * @param  PortNum The port handle.
+  * @retval The voltage value
+  */
+uint16_t HW_IF_PWR_GetVoltage(uint8_t PortNum);
+
+/**
+  * @brief  Get the current level on a specified port.
+  * @param  PortNum The port handle.
+  * @retval The current value
+  */
+int16_t HW_IF_PWR_GetCurrent(uint8_t PortNum);
+
+/**
+  * @brief  Connect the Rp resitors on the CC lines
+  * @param  PortNum The port handle.
+  * @retval none
+  */
+void USBPDM1_AssertRp(uint8_t PortNum);
+
+/**
+  * @brief  Disconnect the Rp resitors on the CC lines
+  * @param  PortNum The port handle.
+  * @retval none
+  */
+void USBPDM1_DeAssertRp(uint8_t PortNum);
+
+/**
+  * @brief  Connect the Rd resitors on the CC lines
+  * @param  PortNum The port handle.
+  * @retval none
+  */
+void USBPDM1_AssertRd(uint8_t PortNum);
+
+/**
+  * @brief  Disconnect the Rd resitors on the CC lines
+  * @param  PortNum The port handle.
+  * @retval none
+  */
+void USBPDM1_DeAssertRd(uint8_t PortNum);
+
+/**
+  * @brief  Set the CCx pin.
+  * @param  PortNum The port handle.
+  * @param  cc      Specify the ccx to be selected.
+  * @retval None
+  */
+void USBPDM1_Set_CC(uint8_t PortNum, CCxPin_TypeDef cc);
+
+/**
+  * @brief  Sends the BIST pattern
+  * @param  PortNum The port handle.
+  * @retval none
+  */
+void USBPD_HW_IF_Send_BIST_Pattern(uint8_t PortNum);
+
+/**
+  * @brief  Sends a detachemnt signal.
+  * @param  PortNum The port handle.
+  * @retval none
+  */
+void HW_SignalDetachment(uint8_t PortNum);
+
+/**
+  * @brief  Sends an Attachment signal.
+  * @param  PortNum The port handle.
+  * @param  cc the PD pin.
+  * @retval none
+  */
+void HW_SignalAttachement(uint8_t PortNum, CCxPin_TypeDef cc);
+
+/**
+  * @brief  Set SinkTxNG resistor.
+  * @param  PortNum The port handle.
+  * @retval none
+  */
+void USBPD_HW_IF_SetResistor_SinkTxNG(uint8_t PortNum);
+
+/**
+  * @brief  Set SinkTxOk resistor.
+  * @param  PortNum The port handle.
+  * @retval none
+  */
+void USBPD_HW_IF_SetResistor_SinkTxOK(uint8_t PortNum);
+
+/**
+  * @brief  Is SinkTxOk resistor.
+  * @param  PortNum The port handle.
+  * @retval TRUE FALSE
+  */
+uint8_t USBPD_HW_IF_IsResistor_SinkTxOk(uint8_t PortNum);
+
+/**
+  * @brief  send a Fast Role swap signalling.
+  * @param  PortNum The port handle.
+  * @retval None
+  */
+void USBPD_HW_IF_FastRoleSwapSignalling(uint8_t PortNum);
+
+/**
+  * @brief  enter in error recovery state.
+  * @param  PortNum The port handle.
+  * @retval None
+  */
+void USBPDM1_EnterErrorRecovery(uint8_t PortNum);
+
+
+void USBPD_PORT0_IRQHandler(void);
+void USBPD_PORT1_IRQHandler(void);
+
+/**
+  * @brief  Enable RX
+  * @param  PortNum The port handle.
+  * @retval None
+  */
+void    USBPD_HW_IF_EnableRX(uint8_t PortNum);
+
+/**
+  * @brief  Disable RX
+  * @param  PortNum The port handle.
+  * @retval None
+  */
+void    USBPD_HW_IF_DisableRX(uint8_t PortNum);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBPD_HW_IF_H_ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/inc/usbpd_phy.h

@@ -0,0 +1,155 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_phy.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of usbpd_phy.h.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+#ifndef __USBPD_PHY_H_
+#define __USBPD_PHY_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/** @addtogroup STM32_USBPD_LIBRARY
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE_PHY
+  * @{
+  */
+
+/* Exported typedef ----------------------------------------------------------*/
+/** @defgroup USBPD_DEVICE_PHY_Exported_TypeDef USBPD DEVICE PHY Exported TypeDef
+  * @{
+  */
+/**
+  * @brief CallBacks exposed by the @ref USBPD_DEVICE_PHY to the USBPD_CORE_PRL
+  */
+typedef struct
+{
+  /**
+   * @brief  Reports that a message has been received on a specified port.
+   * @note   Received data are stored inside PortNum->pRxBuffPtr
+   *         function called in the interrupt context
+   * @param  PortNum The handle of the port
+   * @param  Type    The type of the message received @ref USBPD_SOPType_TypeDef
+   * @retval None
+   */
+  void (*USBPD_PHY_MessageReceived)(uint8_t PortNum, USBPD_SOPType_TypeDef Type);
+
+  /**
+   * @brief  Reports to the PRL that a Reset received from channel.
+   * @param  PortNum The handle of the port
+   * @param  Type The type of reset performed @ref USBPD_SOPTYPE_HARD_RESET or @ref USBPD_SOPTYPE_CABLE_RESET
+   * @retval None
+   */
+  void (*USBPD_PHY_ResetIndication)(uint8_t PortNum, USBPD_SOPType_TypeDef Type);
+
+  /**
+   * @brief  Reports to the PRL that a Reset operation has been completed.
+   * @param  PortNum The handle of the port
+   * @param  Type The type of reset performed @ref USBPD_SOPTYPE_HARD_RESET or @ref USBPD_SOPTYPE_CABLE_RESET
+   * @retval None
+   */
+  void (*USBPD_PHY_ResetCompleted)(uint8_t PortNum, USBPD_SOPType_TypeDef Type);
+
+  /**
+   * @brief  Reports to the PRL that a Bist operation has been completed.
+   * @param  PortNum The handle of the port
+   * @param  Type The type of Bist performed @ref USBPD_BISTMsg_TypeDef
+   * @retval None
+   */
+  void (*USBPD_PHY_BistCompleted)(uint8_t PortNum, USBPD_BISTMsg_TypeDef bistmode);
+
+  /**
+    * @brief  Reports to the PRL that a tx operation has been completed.
+    * @param  PortNum:    The handle of the port
+    * @param  Status:  0 if no error else error
+    * @retval None
+    */
+  void (*USBPD_PHY_TxCompleted)(uint8_t PortNum, uint32_t Status);
+
+  /**
+    * @brief  Reports to the PRL that an FRS has been detected.
+    * @param  PortNum:    The handle of the port
+    * @retval None
+    */
+  void (*USBPD_PHY_FastRoleSwapReception)(uint8_t PortNum);
+
+} USBPD_PHY_Callbacks;
+
+/**
+  * @}
+  */
+
+/* Exported define -----------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported variables --------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @addtogroup USBPD_DEVICE_PHY_Exported_Functions
+  * @{
+  */
+USBPD_StatusTypeDef USBPD_PHY_Init(uint8_t PortNum, const USBPD_PHY_Callbacks *cbs, uint8_t *pRxBuffer, USBPD_PortPowerRole_TypeDef role, uint32_t SupportedSOP);
+void                USBPD_PHY_Reset(uint8_t PortNum);
+uint16_t            USBPD_PHY_GetRetryTimerValue(uint8_t PortNum);
+uint16_t            USBPD_PHY_GetMinGOODCRCTimerValue(uint8_t PortNum);
+
+USBPD_StatusTypeDef USBPD_PHY_ResetRequest(uint8_t PortNum, USBPD_SOPType_TypeDef Type);
+USBPD_StatusTypeDef USBPD_PHY_SendMessage(uint8_t PortNum, USBPD_SOPType_TypeDef Type, uint8_t *pBuffer, uint16_t Size);
+USBPD_StatusTypeDef USBPD_PHY_Send_BIST_Pattern(uint8_t PortNum);
+USBPD_StatusTypeDef USBPD_PHY_ExitTransmit(uint8_t PortNum, USBPD_SOPType_TypeDef BistType);
+void                USBPD_PHY_SetResistor_SinkTxNG(uint8_t PortNum);
+void                USBPD_PHY_SetResistor_SinkTxOK(uint8_t PortNum);
+uint8_t             USBPD_PHY_IsResistor_SinkTxOk(uint8_t PortNum);
+void                USBPD_PHY_FastRoleSwapSignalling(uint8_t PortNum);
+void                USBPD_PHY_SOPSupported(uint8_t PortNum, uint32_t SOPSupported);
+
+void                USBPD_PHY_EnableRX(uint8_t PortNum);
+void                USBPD_PHY_DisableRX(uint8_t PortNum);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBPD_PHY_H_ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/inc/usbpd_timersserver.h

@@ -0,0 +1,80 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_timersserver.h
+  * @author  MCD Application Team
+  * @brief   This file contains the headers of usbpd_timerserver.h.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+#ifndef __USBPD_TIMERSSERVER_H_
+#define __USBPD_TIMERSSERVER_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/** @addtogroup STM32_USBPD_LIBRARY
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE_TIMESERVER
+  * @{
+  */
+
+/* Exported constants --------------------------------------------------------*/
+typedef enum {
+  TIM_PORT0_CRC,
+  TIM_PORT0_RETRY,
+  TIM_PORT1_CRC,
+  TIM_PORT1_RETRY,
+  TIM_MAX
+}
+TIM_identifier;
+
+#define TIM_MAX_TIME 10000u /*time in us, means 10 ms */
+/* Exported types ------------------------------------------------------------*/
+/* External variables --------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+void     USBPD_TIM_Init(void);
+void     USBPD_TIM_DeInit(void);
+void     USBPD_TIM_Start(TIM_identifier Id, uint32_t TimeUs);
+uint32_t USBPD_TIM_IsExpired(TIM_identifier Id);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBPD_TIMERSSERVER_H_ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/src/usbpd_hw.c

@@ -0,0 +1,191 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_phy_hw_if.c
+  * @author  MCD Application Team
+  * @brief   This file contains phy interface control functions.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+#define USBPD_HW_C
+/* Includes ------------------------------------------------------------------*/
+#include "usbpd_devices_conf.h"
+#include "usbpd_hw.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Variable containing ADC conversions results */
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+UCPD_TypeDef *USBPD_HW_GetUSPDInstance(uint8_t PortNum)
+{
+#if defined(UCPD_INSTANCE0) && defined(UCPD_INSTANCE1)
+  return PortNum == 0u ? UCPD_INSTANCE0 : UCPD_INSTANCE1;
+#else
+  return UCPD_INSTANCE0;
+#endif
+}
+
+DMA_Channel_TypeDef *USBPD_HW_Init_DMARxInstance(uint8_t PortNum)
+{
+  LL_DMA_InitTypeDef DMA_InitStruct;
+
+  /* Initialise the DMA */
+  LL_DMA_StructInit(&DMA_InitStruct);
+  DMA_InitStruct.Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY;
+  DMA_InitStruct.Mode = LL_DMA_MODE_NORMAL;
+  DMA_InitStruct.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
+  DMA_InitStruct.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
+  DMA_InitStruct.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE;
+  DMA_InitStruct.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE;
+  DMA_InitStruct.NbData = 0;
+  DMA_InitStruct.MemoryOrM2MDstAddress = 0x0;
+  DMA_InitStruct.PeriphOrM2MSrcAddress = 0x0;
+  DMA_InitStruct.Priority = LL_DMA_PRIORITY_HIGH;
+
+  switch (PortNum)
+  {
+    case 0 :
+      /* Enable the clock */
+      UCPDDMA_INSTANCE0_CLOCKENABLE_RX;
+
+      /* Initialise the DMA */
+      DMA_InitStruct.PeriphRequest = UCPDDMA_INSTANCE0_REQUEST_RX;
+
+      (void)LL_DMA_Init(UCPDDMA_INSTANCE0_DMA_RX, UCPDDMA_INSTANCE0_LL_CHANNEL_RX, &DMA_InitStruct);
+      break;
+#if defined(UCPD_INSTANCE1)
+    case 1 :
+      /* Enable the clock */
+      UCPDDMA_INSTANCE1_CLOCKENABLE_RX;
+
+      /* Initialise the DMA */
+      DMA_InitStruct.PeriphRequest = UCPDDMA_INSTANCE1_REQUEST_RX;
+
+      (void)LL_DMA_Init(UCPDDMA_INSTANCE1_DMA_RX, UCPDDMA_INSTANCE1_LL_CHANNEL_RX, &DMA_InitStruct);
+      break;
+#endif
+    default:
+      break;
+  }
+
+#if defined(UCPD_INSTANCE1)
+  return (PortNum == 0u) ? UCPDDMA_INSTANCE0_CHANNEL_RX : UCPDDMA_INSTANCE1_CHANNEL_RX;
+#else
+  return UCPDDMA_INSTANCE0_CHANNEL_RX;
+#endif
+}
+
+void USBPD_HW_DeInit_DMARxInstance(uint8_t PortNum)
+{
+  (void)PortNum;
+}
+
+DMA_Channel_TypeDef *USBPD_HW_Init_DMATxInstance(uint8_t PortNum)
+{
+  LL_DMA_InitTypeDef DMA_InitStruct;
+
+  /* Initialise the DMA */
+  LL_DMA_StructInit(&DMA_InitStruct);
+  DMA_InitStruct.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
+  DMA_InitStruct.Mode = LL_DMA_MODE_NORMAL;
+  DMA_InitStruct.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
+  DMA_InitStruct.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
+  DMA_InitStruct.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE;
+  DMA_InitStruct.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE;
+  DMA_InitStruct.NbData = 0;
+  DMA_InitStruct.MemoryOrM2MDstAddress = 0x0;
+  DMA_InitStruct.PeriphOrM2MSrcAddress = 0x0;
+
+  switch (PortNum)
+  {
+    case 0 :
+      /* Enable the clock */
+      UCPDDMA_INSTANCE0_CLOCKENABLE_TX;
+
+      DMA_InitStruct.PeriphRequest = UCPDDMA_INSTANCE0_REQUEST_TX;
+      DMA_InitStruct.Priority = LL_DMA_PRIORITY_MEDIUM;
+      (void)LL_DMA_Init(UCPDDMA_INSTANCE0_DMA_TX, UCPDDMA_INSTANCE0_LL_CHANNEL_TX, &DMA_InitStruct);
+      break;
+#if defined(UCPD_INSTANCE1)
+    case 1 :
+      UCPDDMA_INSTANCE1_CLOCKENABLE_TX;
+
+      DMA_InitStruct.PeriphRequest = UCPDDMA_INSTANCE1_REQUEST_TX;
+      DMA_InitStruct.Priority = LL_DMA_PRIORITY_MEDIUM;
+      (void)LL_DMA_Init(UCPDDMA_INSTANCE1_DMA_TX, UCPDDMA_INSTANCE1_LL_CHANNEL_TX, &DMA_InitStruct);
+      break;
+#endif
+    default:
+      break;
+  }
+
+#if defined(UCPD_INSTANCE1)
+  return (PortNum == 0u) ? UCPDDMA_INSTANCE0_CHANNEL_TX : UCPDDMA_INSTANCE1_CHANNEL_TX;
+#else
+  return UCPDDMA_INSTANCE0_CHANNEL_TX;
+#endif
+}
+
+void USBPD_HW_DeInit_DMATxInstance(uint8_t PortNum)
+{
+  (void)PortNum;
+}
+
+uint32_t USBPD_HW_GetRpResistorValue(uint8_t PortNum)
+{
+  (void)PortNum;
+  return LL_UCPD_RESISTOR_3_0A;
+}
+
+void USBPD_HW_SetFRSSignalling(uint8_t PortNum, uint8_t cc)
+{
+  switch (PortNum)
+  {
+    case 0 :
+    {
+      /* Configure the GPIO with the AF corresponding to UCPD */
+      if (1u == cc)
+      {
+        /* FRS_TX1 PA2 (CC1) */
+        UCPDFRS_INSTANCE0_FRSCC1;
+      }
+      else
+      {
+        /* FRS_TX2 PB0 (CC2) */
+        UCPDFRS_INSTANCE0_FRSCC2;
+      }
+      break;
+    }
+#if defined(UCPD_INSTANCE1)
+    case 1 :
+    {
+      /* the FRS is not available for the second port */
+      if (1u == cc)
+      {
+        UCPDFRS_INSTANCE1_FRSCC1;
+      }
+      else
+      {
+        UCPDFRS_INSTANCE1_FRSCC2;
+      }
+      break;
+    }
+#endif
+    default:
+      break;
+  }
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/src/usbpd_hw_if_it.c

@@ -0,0 +1,193 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_hw_if_it.c
+  * @author  MCD Application Team
+  * @brief   This file contains HW interface interrupt routines.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbpd_devices_conf.h"
+#include "usbpd_core.h"
+#include "usbpd_hw_if.h"
+#include "usbpd_trace.h"
+#if defined(_LOW_POWER)
+#include "usbpd_lowpower.h"
+#endif
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+void PORTx_IRQHandler(uint8_t PortNum);
+
+void USBPD_PORT0_IRQHandler(void)
+{
+  PORTx_IRQHandler(USBPD_PORT_0);
+}
+
+void USBPD_PORT1_IRQHandler(void)
+{
+  PORTx_IRQHandler(USBPD_PORT_1);
+}
+
+void PORTx_IRQHandler(uint8_t PortNum)
+{
+  UCPD_TypeDef *hucpd = Ports[PortNum].husbpd;
+  uint32_t _interrupt = LL_UCPD_ReadReg(hucpd, SR);
+  static uint8_t ovrflag[2] = {0,0};
+
+  if ((hucpd->IMR & _interrupt) != 0u)
+  {
+    /* TXIS no need to enable it all the transfer are done by DMA */
+    if (UCPD_SR_TXMSGDISC == (_interrupt & UCPD_SR_TXMSGDISC))
+    {
+      /* the message has been discarded */
+      LL_UCPD_ClearFlag_TxMSGDISC(hucpd);
+      CLEAR_BIT(Ports[PortNum].hdmatx->CCR, DMA_CCR_EN);
+      Ports[PortNum].cbs.USBPD_HW_IF_TxCompleted(PortNum, 1);
+      return;
+    }
+
+    if (UCPD_SR_TXMSGSENT == (_interrupt & UCPD_SR_TXMSGSENT))
+    {
+      /* Message has been fully transferred */
+      LL_UCPD_ClearFlag_TxMSGSENT(hucpd);
+      CLEAR_BIT(Ports[PortNum].hdmatx->CCR, DMA_CCR_EN);
+      Ports[PortNum].cbs.USBPD_HW_IF_TxCompleted(PortNum, 0);
+
+#if defined(_LOW_POWER)
+      LPM_SetStopMode((LPM_Id_t)(LPM_PE_0 + PortNum), LPM_Enable);
+#endif
+      return;
+    }
+
+    if (UCPD_SR_TXMSGABT == (_interrupt & UCPD_SR_TXMSGABT))
+    {
+      LL_UCPD_ClearFlag_TxMSGABT(hucpd);
+      CLEAR_BIT(Ports[PortNum].hdmatx->CCR, DMA_CCR_EN);
+      Ports[PortNum].cbs.USBPD_HW_IF_TxCompleted(PortNum, 2);
+      return;
+    }
+
+    /* TXUND : tx underrun detected */
+    if (UCPD_SR_HRSTDISC == (_interrupt & UCPD_SR_HRSTDISC))
+    {
+      LL_UCPD_ClearFlag_TxHRSTDISC(hucpd);
+      return;
+    }
+
+    /* TXUND : tx underrun detected */
+    if (UCPD_SR_HRSTSENT == (_interrupt & UCPD_SR_HRSTSENT))
+    {
+      /* Mhum, the stack is not expected to get this answer */
+      LL_UCPD_ClearFlag_TxHRSTSENT(hucpd);
+      Ports[PortNum].cbs.USBPD_HW_IF_TX_HardResetCompleted(PortNum, USBPD_SOPTYPE_HARD_RESET);
+      return;
+    }
+
+    /* TXUND : tx underrun detected */
+    if (UCPD_SR_TXUND == (_interrupt & UCPD_SR_TXUND))
+    {
+      /* nothing to do the port partner check message integrity with CRC so PRL will repeat the sent
+         can be used for debug purpose */
+      LL_UCPD_ClearFlag_TxUND(hucpd);
+      return;
+    }
+
+    /* RXNE : not needed the stack only perform transfer by DMA */
+    /* RXORDDET: not needed so stack will not enabled this interrupt */
+    if (UCPD_SR_RXORDDET == (_interrupt & UCPD_SR_RXORDDET))
+    {
+      LL_UCPD_ClearFlag_RxOrderSet(hucpd);
+#if defined(_LOW_POWER)
+      LPM_SetStopMode((LPM_Id_t)(LPM_PE_0 + PortNum), LPM_Disable);
+#endif
+      return;
+    }
+
+    /* check RXHRSTDET */
+    if (UCPD_SR_RXHRSTDET == (_interrupt & UCPD_SR_RXHRSTDET))
+    {
+      Ports[PortNum].cbs.USBPD_HW_IF_RX_ResetIndication(PortNum, USBPD_SOPTYPE_HARD_RESET);
+      LL_UCPD_ClearFlag_RxHRST(hucpd);
+      return;
+    }
+
+    /* check RXOVR */
+    if (UCPD_SR_RXOVR == (_interrupt & UCPD_SR_RXOVR))
+    {
+      /* nothing to do the message will be discarded and the port partner retry the send */
+      ovrflag[PortNum] = 1;
+      LL_UCPD_ClearFlag_RxOvr(hucpd);
+      return;
+    }
+
+    /* check RXMSGEND an Rx message has been received */
+    if (UCPD_SR_RXMSGEND == (_interrupt & UCPD_SR_RXMSGEND))
+    {
+      /* for DMA mode add a control to check if the number of data received is corresponding with the number of
+         data receive by USBPD */
+      LL_UCPD_ClearFlag_RxMsgEnd(hucpd);
+
+      /* disable DMA */
+      CLEAR_BIT(Ports[PortNum].hdmarx->CCR, DMA_CCR_EN);
+
+#if defined(_LOW_POWER)
+      LPM_SetStopMode((LPM_Id_t)(LPM_PE_0 + PortNum), LPM_Enable);
+#endif
+
+      if (((_interrupt & UCPD_SR_RXERR) == 0u) && (ovrflag[PortNum] == 0u))
+      {
+        /* Rx message has been received without error */
+        Ports[PortNum].cbs.USBPD_HW_IF_RX_Completed(PortNum, hucpd->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET);
+      }
+      ovrflag[PortNum] = 0;
+
+      /* Ready for next transaction */
+      WRITE_REG(Ports[PortNum].hdmarx->CMAR, (uint32_t)Ports[PortNum].ptr_RxBuff);
+      WRITE_REG(Ports[PortNum].hdmarx->CNDTR, SIZE_MAX_PD_TRANSACTION_UNCHUNK);
+
+      SET_BIT(Ports[PortNum].hdmarx->CCR, DMA_CCR_EN);
+      return;
+    }
+
+    /* check TYPECEVT1IE/TYPECEVT1IE || check TYPECEVT2IE/TYPECEVT2IE */
+    if ((UCPD_SR_TYPECEVT1 == (_interrupt & UCPD_SR_TYPECEVT1)) || (UCPD_SR_TYPECEVT2 == (_interrupt & UCPD_SR_TYPECEVT2)))
+    {
+      /* clear both interrupt */
+      LL_UCPD_ClearFlag_TypeCEventCC1(hucpd);
+      LL_UCPD_ClearFlag_TypeCEventCC2(hucpd);
+      Ports[PortNum].USBPD_CAD_WakeUp();
+      /* Wakeup CAD to check the detection event */
+      return;
+    }
+
+    /* check FRSEVTIE */
+    if (UCPD_SR_FRSEVT == (_interrupt & UCPD_SR_FRSEVT))
+    {
+      LL_UCPD_ClearFlag_FRS(hucpd);
+      if (USBPD_PORTPOWERROLE_SNK == Ports[PortNum].params->PE_PowerRole)
+      {
+        /* we shall calculate the FRS timing to confirm the timing */
+        Ports[PortNum].cbs.USBPD_HW_IF_TX_FRSReception(PortNum);
+      }
+    }
+  }
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/src/usbpd_phy.c

@@ -0,0 +1,388 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_phy.c
+  * @author  MCD Application Team
+  * @brief   This file contains PHY layer functions.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbpd_def.h"
+#include "usbpd_phy.h"
+#include "usbpd_hw_if.h"
+#include "usbpd_pwr_if.h"
+
+/** @addtogroup STM32_USBPD_LIBRARY
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE_PHY
+  * @brief   This file contains PHY layer functions.
+  * @details Receive from PRL a message and create a structured packet (according to the USBPD specifications):
+  *          |SOP|DATA:[HEADER|DATAOBJECTS]|CRC|EOP|
+  * @{
+  */
+
+/* Private defines -----------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/** @defgroup USBPD_DEVICE_PHY_Private_typedef USBPD DEVICE PHY Private typedef
+  * @brief Structures and enums internally used by the PHY layer
+  * @{
+  */
+
+
+/**
+  * @brief Handle to support the data of the layer
+  */
+typedef struct
+{
+  /**
+   * @brief  Reports that a message has been received on a specified port.
+   * @note   Received data are stored inside PortNum->pRxBuffPtr
+   *         function called in the interrupt context
+   * @param  PortNum The handle of the port
+   * @param  Type    The type of the message received @ref USBPD_SOPType_TypeDef
+   * @retval None
+   */
+  void (*USBPD_PHY_MessageReceived)(uint8_t PortNum, USBPD_SOPType_TypeDef Type);
+
+  uint32_t  SupportedSOP;        /*!<bit field SOP"Debug SOP'Debug SOP" SOP' SOP */
+} PHY_HandleTypeDef;
+
+/**
+  * @brief prototype definition shared in several callbacks
+  */
+typedef void (*PHY_CB_t)(uint8_t PortNum, USBPD_SOPType_TypeDef Type); /*!<  Common callback definition */
+
+/**
+  * @}
+  */
+
+/* Private define and macro --------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/** @defgroup USBPD_DEVICE_PHY_Private_variables USBPD DEVICE PHY Private variables
+  * @{
+  */
+
+/** Internal struct for RXTX */
+static PHY_HandleTypeDef PHY_Ports[USBPD_PORT_COUNT];
+/**
+  * @}
+  */
+
+/* Private function prototypes -----------------------------------------------*/
+/** @defgroup USBPD_DEVICE_PHY_Private_functions USBPD DEVICE PHY Private functions
+  * @{
+  */
+USBPD_StatusTypeDef         PHY_PortInit(uint8_t PortNum, const USBPD_PHY_Callbacks *cbs, uint8_t *pRxBuffer, uint32_t SupportedSOP);
+void                        PHY_ResetCompleted(uint8_t PortNum, USBPD_SOPType_TypeDef Type);
+void                        PHY_Rx_HardReset(uint8_t PortNum);
+void                        PHY_Rx_Completed(uint8_t PortNum, uint32_t MsgType);
+
+/**
+  * @}
+  */
+
+/* Exported functions ---------------------------------------------------------*/
+
+/** @defgroup USBPD_DEVICE_PHY_Exported_Functions USBPD DEVICE PHY Exported functions
+  * @{
+  */
+/**
+  * @brief  Initialize the PHY of a specified port.
+  * @param  PortNum       Number of the port.
+  * @param  pCallbacks    PHY callbacks
+  * @param  pRxBuffer     Buffer to storage received message.
+  * @param  PowerRole     Power Role of the board.
+  * @param  SupportedSOP  bit field of the supported SOP
+  * @retval status        @ref USBPD_OK
+  */
+USBPD_StatusTypeDef USBPD_PHY_Init(uint8_t PortNum, const USBPD_PHY_Callbacks *pCallbacks, uint8_t *pRxBuffer, USBPD_PortPowerRole_TypeDef PowerRole, uint32_t SupportedSOP)
+{
+  (void)PowerRole;
+
+  /* set all callbacks */
+  Ports[PortNum].cbs.USBPD_HW_IF_TxCompleted            = pCallbacks->USBPD_PHY_TxCompleted;
+  Ports[PortNum].cbs.USBPD_HW_IF_BistCompleted          = pCallbacks->USBPD_PHY_BistCompleted;
+  Ports[PortNum].cbs.USBPD_HW_IF_RX_ResetIndication     = pCallbacks->USBPD_PHY_ResetIndication;
+  Ports[PortNum].cbs.USBPD_HW_IF_RX_Completed           = PHY_Rx_Completed;
+  Ports[PortNum].cbs.USBPD_HW_IF_TX_HardResetCompleted  = pCallbacks->USBPD_PHY_ResetCompleted;
+  Ports[PortNum].cbs.USBPD_HW_IF_TX_FRSReception        = pCallbacks->USBPD_PHY_FastRoleSwapReception;
+  /* Initialize the hardware for the port */
+  Ports[PortNum].ptr_RxBuff = pRxBuffer;
+
+  /* Initialize port related functionalities inside this layer */
+  PHY_Ports[PortNum].SupportedSOP = SupportedSOP;
+  PHY_Ports[PortNum].USBPD_PHY_MessageReceived = pCallbacks->USBPD_PHY_MessageReceived;
+
+  return USBPD_OK;
+}
+
+/**
+  * @brief  this function return the retry counter value in us.
+  * @note   time used to determine when the protocol layer must re-send a message not aknowledge by a goodCRC
+  * @param  PortNum    Number of the port.
+  * @retval retry counter value in us.
+  */
+uint16_t USBPD_PHY_GetRetryTimerValue(uint8_t PortNum)
+{
+  (void)PortNum;
+  return 905u;
+}
+
+/**
+  * @brief  this function return the min time to wait before sending a goodCRC to ack a message (in us).
+  * @note   time used to guarantee the min time of 26us between two PD message.
+  * @param  PortNum    Number of the port.
+  * @retval value in us.
+  */
+uint16_t USBPD_PHY_GetMinGOODCRCTimerValue(uint8_t PortNum)
+{
+  return 30u;
+}
+
+/**
+  * @brief  Reset the PHY of a specified port.
+  * @param  PortNum    Number of the port.
+  * @retval None
+  */
+void USBPD_PHY_Reset(uint8_t PortNum)
+{
+  (void)PortNum;
+  /* reset PHY layer   */
+  /* reset HW_IF layer */
+}
+
+/**
+  * @brief  Request to send a reset on a port.
+  * @param  PortNum   Number of the port
+  * @param  Type      Type of reset (hard or cable reset) @ref USBPD_SOPTYPE_HARD_RESET or @ref USBPD_SOPTYPE_CABLE_RESET
+  * @retval status    @ref USBPD_OK
+  */
+USBPD_StatusTypeDef USBPD_PHY_ResetRequest(uint8_t PortNum, USBPD_SOPType_TypeDef Type)
+{
+  /* Send the requested reset */
+  return USBPD_PHY_SendMessage(PortNum, Type, NULL, 0);
+}
+
+/**
+  * @brief  Send a Message.
+  * @param  PortNum   Number of the port
+  * @param  Type      Type of the message
+  * @param  pBuffer   Pointer to the buffer to be transmitted
+  * @param  Size      Size of the buffer (bytes)
+  * @retval status    @ref USBPD_OK
+  */
+USBPD_StatusTypeDef USBPD_PHY_SendMessage(uint8_t PortNum, USBPD_SOPType_TypeDef Type, uint8_t *pBuffer, uint16_t Size)
+{
+  /* Trace to track message */
+  return USBPD_HW_IF_SendBuffer(PortNum, Type, pBuffer,  Size);
+}
+
+/**
+  * @brief  Send BIST pattern.
+  * @param  PortNum   Number of the port
+  * @retval status    @ref USBPD_OK
+  */
+USBPD_StatusTypeDef USBPD_PHY_Send_BIST_Pattern(uint8_t PortNum)
+{
+  /* Call the low-level function (HW_IF) to accomplish the BIST Carrier Mode Transmission */
+  USBPD_HW_IF_Send_BIST_Pattern(PortNum);
+  return USBPD_OK;
+}
+
+/**
+  * @brief  Request PHY to exit of BIST mode 2
+  * @param  PortNum port number value
+  * @param  mode    SOP BIST MODE 2
+  * @retval USBPD   status
+  */
+USBPD_StatusTypeDef USBPD_PHY_ExitTransmit(uint8_t PortNum, USBPD_SOPType_TypeDef mode)
+{
+  if (USBPD_SOPTYPE_BIST_MODE_2 == mode)
+  {
+    USBPD_HW_IF_StopBISTMode2(PortNum);
+  }
+  return USBPD_OK;
+}
+
+/**
+  * @brief  Set the SinkTxNg value of the resistor,
+  * @note   used to manage the collision avoidance
+  * @param  PortNum  Number of the port
+  * @retval None
+  */
+void USBPD_PHY_SetResistor_SinkTxNG(uint8_t PortNum)
+{
+  USBPD_HW_IF_SetResistor_SinkTxNG(PortNum);
+}
+
+/**
+  * @brief  function to set the SinkTxOK
+  * @note   used to manage the collision avoidance
+  * @param  PortNum  Number of the port.
+  * @retval none.
+  */
+void USBPD_PHY_SetResistor_SinkTxOK(uint8_t PortNum)
+{
+  USBPD_HW_IF_SetResistor_SinkTxOK(PortNum);
+}
+
+/**
+  * @brief  function to set the supported SOP
+  * @param  PortNum  Number of the port.
+  * @param  SOPSupported  List of the supported SOP
+  * @retval None.
+  */
+void USBPD_PHY_SOPSupported(uint8_t PortNum, uint32_t SOPSupported)
+{
+  PHY_Ports[PortNum].SupportedSOP = SOPSupported;
+}
+
+/**
+  * @brief  Check if SinkTxOK is set or not
+  * @note   used to manage the collision avoidance
+  * @param  PortNum  Number of the port.
+  * @retval USBPD_TRUE or USBPD_FALSE
+  */
+uint8_t USBPD_PHY_IsResistor_SinkTxOk(uint8_t PortNum)
+{
+  return USBPD_HW_IF_IsResistor_SinkTxOk(PortNum);
+}
+
+/**
+ * @brief  function to generate an FRS signalling
+ * @param  PortNum  Number of the port.
+ * @retval None.
+  */
+void USBPD_PHY_FastRoleSwapSignalling(uint8_t PortNum)
+{
+  USBPD_HW_IF_FastRoleSwapSignalling(PortNum);
+}
+
+/**
+  * @brief  function used to enable RX
+  * @param  PortNum    Number of the port.
+  * @retval None
+  */
+void USBPD_PHY_EnableRX(uint8_t PortNum)
+{
+  USBPD_HW_IF_EnableRX(PortNum);
+}
+
+/**
+  * @brief  function used to disable RX
+  * @param  PortNum    Number of the port.
+  * @retval None
+  */
+void USBPD_PHY_DisableRX(uint8_t PortNum)
+{
+  USBPD_HW_IF_DisableRX(PortNum);
+}
+
+/**
+  * @}
+  */
+
+/** @addtogroup USBPD_DEVICE_PHY_Private_functions
+  * @brief PHY internally used functions
+  * @{
+  */
+
+/**
+  * @brief  Callback to notify the end of the current reception
+  * @param  PortNum   Number of the port.
+  * @param  MsgType   SOP Message Type
+  * @retval None.
+  */
+void PHY_Rx_Completed(uint8_t PortNum, uint32_t MsgType)
+{
+  const USBPD_SOPType_TypeDef tab_sop_value[] = { USBPD_SOPTYPE_SOP,              USBPD_SOPTYPE_SOP1, USBPD_SOPTYPE_SOP2,
+                                                  USBPD_SOPTYPE_SOP1_DEBUG, USBPD_SOPTYPE_SOP2_DEBUG, USBPD_SOPTYPE_CABLE_RESET
+                                                };
+  USBPD_SOPType_TypeDef _msgtype;
+
+  _msgtype = tab_sop_value[MsgType];
+
+  /* check if the message must be forwarded to usbpd stack */
+  switch (_msgtype)
+  {
+    case USBPD_SOPTYPE_CABLE_RESET :
+      if (0x1Eu == (PHY_Ports[PortNum].SupportedSOP & 0x1Eu))
+      {
+        /* nothing to do the message will be discarded and the port partner retry the send */
+        Ports[PortNum].cbs.USBPD_HW_IF_RX_ResetIndication(PortNum, USBPD_SOPTYPE_CABLE_RESET);
+      }
+      break;
+    case USBPD_SOPTYPE_SOP :
+    case USBPD_SOPTYPE_SOP1 :
+    case USBPD_SOPTYPE_SOP2 :
+    case USBPD_SOPTYPE_SOP1_DEBUG :
+    case USBPD_SOPTYPE_SOP2_DEBUG :
+      if (!((uint8_t)(0x1u << _msgtype) != (PHY_Ports[PortNum].SupportedSOP & (uint8_t)(0x1u << _msgtype))))
+      {
+         PHY_Ports[PortNum].USBPD_PHY_MessageReceived(PortNum, _msgtype);
+      }
+#if defined(DEBUG_NOTFWD)
+      else
+      {
+        typedef union
+        {
+          uint16_t d16;
+          struct
+          {
+            uint16_t MessageType            :5;   /*!< Message Header's message Type                      */
+            uint16_t PortDataRole           :1;   /*!< Message Header's Port Data Role                    */
+            uint16_t SpecificationRevision  :2;   /*!< Message Header's Spec Revision                     */
+            uint16_t PortPowerRole_CablePlug:1;   /*!< Message Header's Port Power Role/Cable Plug field  */
+            uint16_t MessageID              :3;   /*!< Message Header's message ID                        */
+            uint16_t NumberOfDataObjects    :3;   /*!< Message Header's Number of data object             */
+            uint16_t Extended               :1;   /*!< Reserved                                           */
+          }
+          b;
+        } USBPD_MsgHeader_TypeDef;
+
+        USBPD_MsgHeader_TypeDef header_rx;
+        header_rx.d16 = LE16(Ports[PortNum].ptr_RxBuff);
+        USBPD_TRACE_Add( USBPD_TRACE_PHY_NOTFRWD,PortNum, _msgtype, Ports[PortNum].ptr_RxBuff, 2u + (header_rx.b.NumberOfDataObjects * 4u));
+      }
+#endif
+      break;
+    default :
+      break;
+  }
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/src/usbpd_phy_hw_if.c

@@ -0,0 +1,379 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_phy_hw_if.c
+  * @author  MCD Application Team
+  * @brief   This file contains phy interface control functions.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#define USBPD_PHY_HW_IF_C
+
+#include "usbpd_devices_conf.h"
+#include "usbpd_hw.h"
+#include "usbpd_core.h"
+#include "usbpd_hw_if.h"
+#if !defined(USBPDCORE_LIB_NO_PD)
+#include "usbpd_timersserver.h"
+#endif /* !USBPDCORE_LIB_NO_PD */
+#if defined(_LOW_POWER)
+#include "usbpd_lowpower.h"
+#endif
+
+/* Private typedef -----------------------------------------------------------*/
+
+/* Private function prototypes -----------------------------------------------*/
+USBPD_PORT_HandleTypeDef Ports[USBPD_PORT_COUNT];
+
+
+/* Private functions ---------------------------------------------------------*/
+
+
+void USBPD_HW_IF_GlobalHwInit(void)
+{
+  /* PWR register access (for disabling dead battery feature) */
+  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
+  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC);
+}
+
+#if !defined(USBPDCORE_LIB_NO_PD)
+void USBPD_HW_IF_StopBISTMode2(uint8_t PortNum)
+{
+  uint32_t  _cr = READ_REG(Ports[PortNum].husbpd->CR) & ~(UCPD_CR_TXMODE | UCPD_CR_TXSEND);
+
+  LL_UCPD_Disable(Ports[PortNum].husbpd);
+  LL_UCPD_Enable(Ports[PortNum].husbpd);
+
+  Ports[PortNum].husbpd->CR = _cr;
+}
+
+USBPD_StatusTypeDef USBPD_HW_IF_SendBuffer(uint8_t PortNum, USBPD_SOPType_TypeDef Type, uint8_t *pBuffer, uint32_t Size)
+{
+  USBPD_StatusTypeDef _status = USBPD_OK;
+
+  if (USBPD_SOPTYPE_HARD_RESET == Type)
+  {
+    LL_UCPD_SendHardReset(Ports[PortNum].husbpd);
+  }
+  else
+  {
+    switch (Type)
+    {
+      case USBPD_SOPTYPE_SOP :
+      {
+        LL_UCPD_WriteTxOrderSet(Ports[PortNum].husbpd, LL_UCPD_ORDERED_SET_SOP);
+        LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_NORMAL);
+        break;
+      }
+      case USBPD_SOPTYPE_SOP1 :
+      {
+        LL_UCPD_WriteTxOrderSet(Ports[PortNum].husbpd, LL_UCPD_ORDERED_SET_SOP1);
+        LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_NORMAL);
+        break;
+      }
+      case USBPD_SOPTYPE_SOP2 :
+      {
+        LL_UCPD_WriteTxOrderSet(Ports[PortNum].husbpd, LL_UCPD_ORDERED_SET_SOP2);
+        LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_NORMAL);
+        break;
+      }
+      case USBPD_SOPTYPE_CABLE_RESET :
+      {
+        LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_CABLE_RESET);
+        break;
+      }
+      case USBPD_SOPTYPE_BIST_MODE_2 :
+      {
+        LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_BIST_CARRIER2);
+        break;
+      }
+      default :
+        _status = USBPD_ERROR;
+        break;
+    }
+
+    if (USBPD_OK == _status)
+    {
+#if defined(_LOW_POWER)
+      LPM_SetStopMode((LPM_Id_t)(LPM_PE_0 + PortNum), LPM_Disable);
+#endif
+      WRITE_REG(Ports[PortNum].hdmatx->CMAR, (uint32_t)pBuffer);
+      WRITE_REG(Ports[PortNum].hdmatx->CNDTR, Size);
+      Ports[PortNum].hdmatx->CCR |= DMA_CCR_EN;
+
+      LL_UCPD_WriteTxPaySize(Ports[PortNum].husbpd, Size);
+      LL_UCPD_SendMessage(Ports[PortNum].husbpd);
+    }
+  }
+  return _status;
+}
+
+void USBPD_HW_IF_Send_BIST_Pattern(uint8_t PortNum)
+{
+  LL_UCPD_SetTxMode(Ports[PortNum].husbpd, LL_UCPD_TXMODE_BIST_CARRIER2);
+  LL_UCPD_SendMessage(Ports[PortNum].husbpd);
+}
+#endif /* !USBPDCORE_LIB_NO_PD */
+
+void USBPDM1_AssertRp(uint8_t PortNum)
+{
+  LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
+  switch (Ports[PortNum].params->RpResistor)
+  {
+    case vRp_Default :
+      LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_DEFAULT);
+      break;
+    case vRp_1_5A:
+      LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_1_5A);
+      break;
+    case vRp_3_0A:
+      LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_3_0A);
+      break;
+    default:
+      break;
+  }
+  LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_NONE);
+  LL_UCPD_SetSRCRole(Ports[PortNum].husbpd);
+  if (CCNONE == Ports[PortNum].CCx)
+  {
+    LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_CC1CC2);
+  }
+  else
+  {
+    LL_UCPD_SetccEnable(Ports[PortNum].husbpd, (Ports[PortNum].CCx == CC1) ? LL_UCPD_CCENABLE_CC1 : LL_UCPD_CCENABLE_CC2);
+  }
+  SET_BIT(SYSCFG->CFGR1, (Ports[PortNum].husbpd == UCPD1) ? SYSCFG_CFGR1_UCPD1_STROBE : SYSCFG_CFGR1_UCPD2_STROBE);
+}
+
+void USBPDM1_DeAssertRp(uint8_t PortNum)
+{
+  /* not needed on STM32G0xx, so nothing to do, keep only for compatibility */
+  UNUSED(PortNum);
+}
+
+void USBPDM1_AssertRd(uint8_t PortNum)
+{
+  LL_UCPD_TypeCDetectionCC2Disable(Ports[PortNum].husbpd);
+  LL_UCPD_TypeCDetectionCC1Disable(Ports[PortNum].husbpd);
+
+  LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
+  LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_NONE);
+  LL_UCPD_SetSNKRole(Ports[PortNum].husbpd);
+  if (CCNONE == Ports[PortNum].CCx)
+  {
+    LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_CC1CC2);
+  }
+  else
+  {
+    LL_UCPD_SetccEnable(Ports[PortNum].husbpd, (Ports[PortNum].CCx == CC1) ? LL_UCPD_CCENABLE_CC1 : LL_UCPD_CCENABLE_CC2);
+  }
+
+  SET_BIT(SYSCFG->CFGR1, (Ports[PortNum].husbpd == UCPD1) ? SYSCFG_CFGR1_UCPD1_STROBE : SYSCFG_CFGR1_UCPD2_STROBE);
+  HAL_Delay(1);
+
+#ifndef _LOW_POWER
+  LL_UCPD_TypeCDetectionCC2Enable(Ports[PortNum].husbpd);
+  LL_UCPD_TypeCDetectionCC1Enable(Ports[PortNum].husbpd);
+#endif
+}
+
+void USBPDM1_DeAssertRd(uint8_t PortNum)
+{
+  /* not needed on STM32G0xx, so nothing to do, keep only for compatibility */
+  UNUSED(PortNum);
+}
+
+void USBPDM1_EnterErrorRecovery(uint8_t PortNum)
+{
+  LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
+  LL_UCPD_SetSRCRole(Ports[PortNum].husbpd);
+  LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_NONE);
+  LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_NONE);
+  SET_BIT(SYSCFG->CFGR1, (Ports[PortNum].husbpd == UCPD1) ? SYSCFG_CFGR1_UCPD1_STROBE : SYSCFG_CFGR1_UCPD2_STROBE);
+  LL_UCPD_RxDisable(Ports[PortNum].husbpd);
+}
+
+void USBPDM1_Set_CC(uint8_t PortNum, CCxPin_TypeDef cc)
+{
+  /* Set the correct pin on the comparator*/
+  Ports[PortNum].CCx = cc;
+  LL_UCPD_SetCCPin(Ports[PortNum].husbpd , (cc == CC1) ? LL_UCPD_CCPIN_CC1 : LL_UCPD_CCPIN_CC2);
+}
+
+void USBPDM1_RX_EnableInterrupt(uint8_t PortNum)
+{
+  /* Enable the RX interrupt process */
+  MODIFY_REG(Ports[PortNum].husbpd->IMR, UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE,
+             UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE);
+  LL_UCPD_RxDMAEnable(Ports[PortNum].husbpd);
+}
+
+void USBPD_HW_IF_EnableRX(uint8_t PortNum)
+{
+  LL_UCPD_RxEnable(Ports[PortNum].husbpd);
+}
+
+void USBPD_HW_IF_DisableRX(uint8_t PortNum)
+{
+  LL_UCPD_RxDisable(Ports[PortNum].husbpd);
+}
+
+void HW_SignalAttachement(uint8_t PortNum, CCxPin_TypeDef cc)
+{
+#if !defined(USBPDCORE_LIB_NO_PD)
+  uint32_t _temp;
+
+  /* Init timer to detect the reception of goodCRC */
+  USBPD_TIM_Init();
+
+  /* Prepare ucpd to handle PD message
+            RX message start listen
+            TX prepare the DMA to be transfer ready
+            Detection listen only the line corresponding CC=Rd for SRC/SNK */
+  Ports[PortNum].hdmatx = USBPD_HW_Init_DMATxInstance(PortNum);
+  Ports[PortNum].hdmarx = USBPD_HW_Init_DMARxInstance(PortNum);
+
+  /* Set the RX dma to allow reception */
+  _temp = (uint32_t)&Ports[PortNum].husbpd->RXDR;
+  WRITE_REG(Ports[PortNum].hdmarx->CPAR, _temp);
+  WRITE_REG(Ports[PortNum].hdmarx->CMAR, (uint32_t)Ports[PortNum].ptr_RxBuff);
+  Ports[PortNum].hdmarx->CNDTR = SIZE_MAX_PD_TRANSACTION_UNCHUNK;
+  Ports[PortNum].hdmarx->CCR |= DMA_CCR_EN;
+
+  /* Set the TX dma only UCPD address */
+  _temp = (uint32_t)&Ports[PortNum].husbpd->TXDR;
+  Ports[PortNum].hdmatx->CPAR = _temp;
+
+  /* disabled non Rd line set CC line enable */
+#define INTERRUPT_MASK  UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_HRSTDISCIE  | UCPD_IMR_HRSTSENTIE | UCPD_IMR_TXMSGABTIE |\
+                        UCPD_IMR_TXUNDIE     | UCPD_IMR_RXORDDETIE  | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE    | UCPD_IMR_RXMSGENDIE
+
+  MODIFY_REG(Ports[PortNum].husbpd->IMR, INTERRUPT_MASK, INTERRUPT_MASK);
+#endif /* !USBPDCORE_LIB_NO_PD */
+
+#if !defined(USBPDCORE_LIB_NO_PD)||defined(USBPD_TYPE_STATE_MACHINE)
+  /* Handle CC enable */
+  Ports[PortNum].CCx = cc;
+#endif /* !USBPDCORE_LIB_NO_PD || USBPD_TYPE_STATE_MACHINE */
+
+#if !defined(USBPDCORE_LIB_NO_PD)
+  /* Set CC pin for PD message */
+  LL_UCPD_SetCCPin(Ports[PortNum].husbpd, (Ports[PortNum].CCx == CC1) ? LL_UCPD_CCPIN_CC1 : LL_UCPD_CCPIN_CC2);
+
+
+#if defined(_VCONN_SUPPORT)
+  /* Initialize Vconn management */
+  (void)BSP_USBPD_PWR_VCONNInit(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u);
+#endif /* _VCONN_SUPPORT */
+
+#if defined(USBPD_REV30_SUPPORT)
+  if (Ports[PortNum].settings->PE_PD3_Support.d.PE_FastRoleSwapSupport == USBPD_TRUE)
+  {
+    /* Set GPIO to allow the FRSTX handling */
+    USBPD_HW_SetFRSSignalling(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u);
+    LL_UCPD_FRSDetectionEnable(Ports[PortNum].husbpd);
+    Ports[PortNum].husbpd->IMR |= UCPD_IMR_FRSEVTIE;
+  }
+#endif /* USBPD_REV30_SUPPORT */
+
+  /* Disable the Resistor on Vconn PIN */
+  (Ports[PortNum].CCx == CC1) ? LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_CC1) : LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_CC2);
+
+  /* Prepare the rx processing */
+  LL_UCPD_SetRxMode(Ports[PortNum].husbpd, LL_UCPD_RXMODE_NORMAL);
+  LL_UCPD_RxDMAEnable(Ports[PortNum].husbpd);
+  LL_UCPD_TxDMAEnable(Ports[PortNum].husbpd);
+#endif /* !USBPDCORE_LIB_NO_PD */
+}
+
+
+void HW_SignalDetachment(uint8_t PortNum)
+{
+#if !defined(USBPDCORE_LIB_NO_PD)
+  /* stop DMA RX/TX */
+  LL_UCPD_RxDMADisable(Ports[PortNum].husbpd);
+  LL_UCPD_TxDMADisable(Ports[PortNum].husbpd);
+  LL_UCPD_RxDisable(Ports[PortNum].husbpd);
+
+#if !defined(_LOW_POWER) && !defined(USBPDM1_VCC_FEATURE_ENABLED)
+  /* Enable only detection interrupt */
+  WRITE_REG(Ports[PortNum].husbpd->IMR, UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE);
+#endif /* !_LOW_POWER && !USBPDM1_VCC_FEATURE_ENABLED */
+
+  USBPD_HW_DeInit_DMATxInstance(PortNum);
+  USBPD_HW_DeInit_DMARxInstance(PortNum);
+
+  LL_UCPD_SetccEnable(Ports[PortNum].husbpd, LL_UCPD_CCENABLE_CC1CC2);
+
+  if (USBPD_PORTPOWERROLE_SNK == Ports[PortNum].params->PE_PowerRole)
+  {
+#if defined(_VCONN_SUPPORT)
+    /* DeInitialize Vconn management */
+  (void)BSP_USBPD_PWR_VCONNDeInit(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u);
+#endif
+    /* DeInitialise VBUS power */
+  (void)BSP_USBPD_PWR_VBUSDeInit(PortNum);
+  }
+#endif /* !USBPDCORE_LIB_NO_PD */
+#if !defined(USBPDCORE_LIB_NO_PD)||defined(USBPD_TYPE_STATE_MACHINE)
+  Ports[PortNum].CCx = CCNONE;
+#endif /* !USBPDCORE_LIB_NO_PD || USBPD_TYPE_STATE_MACHINE */
+#if !defined(USBPDCORE_LIB_NO_PD)
+  /* DeInit timer to detect the reception of goodCRC */
+  USBPD_TIM_DeInit();
+#endif /* !USBPDCORE_LIB_NO_PD */
+}
+
+void USBPD_HW_IF_SetResistor_SinkTxNG(uint8_t PortNum)
+{
+  /* set the resistor SinkTxNG 1.5A5V */
+  LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_1_5A);
+}
+
+void USBPD_HW_IF_SetResistor_SinkTxOK(uint8_t PortNum)
+{
+  /* set the resistor SinkTxNG 3.0A5V */
+  LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_3_0A);
+}
+
+uint8_t USBPD_HW_IF_IsResistor_SinkTxOk(uint8_t PortNum)
+{
+  switch (Ports[PortNum].CCx)
+  {
+    case CC1 :
+      if((Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1) == LL_UCPD_SNK_CC1_VRP30A)
+      {
+        return USBPD_TRUE;
+      }
+      break;
+    case CC2 :
+      if((Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2) == LL_UCPD_SNK_CC2_VRP30A)
+      {
+        return USBPD_TRUE;
+      }
+      break;
+    default:
+      break;
+  }
+
+  return USBPD_FALSE;
+}
+
+void USBPD_HW_IF_FastRoleSwapSignalling(uint8_t PortNum)
+{
+  LL_UCPD_SignalFRSTX(Ports[PortNum].husbpd);
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/src/usbpd_pwr_hw_if.c

@@ -0,0 +1,107 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_pwr_hw_if.c
+  * @author  MCD Application Team
+  * @brief   This file contains power hardware interface functions.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbpd_hw_if.h"
+
+
+#define _USBPD_POWER_DEBUG
+#if  defined(_TRACE)
+#include "usbpd_core.h"
+#include "usbpd_trace.h"
+#endif
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#if  defined(_TRACE)
+#define POWER_DEBUG(__MSG__,__SIZE__)   USBPD_TRACE_Add(USBPD_TRACE_DEBUG, PortNum, 0,__MSG__,__SIZE__);
+#else
+#define POWER_DEBUG(__MSG__,__SIZE__)
+#endif
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+USBPD_StatusTypeDef HW_IF_PWR_SetVoltage(uint8_t PortNum, uint16_t voltage)
+{
+  UNUSED(PortNum);
+  UNUSED(voltage);
+  return USBPD_OK;
+}
+
+uint16_t HW_IF_PWR_GetVoltage(uint8_t PortNum)
+{
+  uint32_t _voltage;
+  BSP_USBPD_PWR_VBUSGetVoltage(PortNum, &_voltage);
+  return (uint16_t)_voltage;
+}
+
+int16_t HW_IF_PWR_GetCurrent(uint8_t PortNum)
+{
+  int32_t _current;
+  BSP_USBPD_PWR_VBUSGetCurrent(PortNum, &_current);
+  return (int16_t)_current;
+}
+
+#if defined(_SRC) || defined(_DRP)
+USBPD_StatusTypeDef HW_IF_PWR_Enable(uint8_t PortNum, USBPD_FunctionalState state, CCxPin_TypeDef Cc, uint32_t VconnState, USBPD_PortPowerRole_TypeDef role)
+{
+  UNUSED(role);
+  int32_t status;
+  if (USBPD_ENABLE == state)
+  {
+#if defined(_VCONN_SUPPORT)
+    if (USBPD_TRUE == VconnState)
+    {
+      POWER_DEBUG((uint8_t *)"VCONN ON", 8);
+      (void)BSP_USBPD_PWR_VCONNOn(PortNum, Cc);
+    }
+#endif /* _VCONN_SUPPORT */
+    POWER_DEBUG((uint8_t *)"VBUS ON", 7);
+    status = BSP_USBPD_PWR_VBUSOn(PortNum);
+  }
+  else
+  {
+#if defined(_VCONN_SUPPORT)
+    if (VconnState == USBPD_TRUE)
+    {
+      POWER_DEBUG((uint8_t *)"VCONN OFF", 9);
+      (void)BSP_USBPD_PWR_VCONNOff(PortNum, Cc);
+    }
+#endif /* _VCONN_SUPPORT */
+    POWER_DEBUG((uint8_t *)"VBUS OFF", 8);
+    status = BSP_USBPD_PWR_VBUSOff(PortNum);
+  }
+  return (status == BSP_ERROR_NONE) ? USBPD_OK : USBPD_FAIL;
+}
+#endif /* _SRC || _DRP */
+
+USBPD_FunctionalState HW_IF_PWR_VBUSIsEnabled(uint8_t PortNum)
+{
+#if defined(_SRC)||defined(_DRP)
+  uint8_t _state;
+  BSP_USBPD_PWR_VBUSIsOn(PortNum, &_state);
+  return (_state == BSP_ERROR_NONE) ? USBPD_DISABLE : USBPD_ENABLE;
+#else
+  return USBPD_DISABLE;
+#endif /* _SRC || _DRP */
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

USB-PD_Provider_1port/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G0XX/src/usbpd_timersserver.c

@@ -0,0 +1,170 @@
+/**
+  ******************************************************************************
+  * @file    usbpd_timersserver.c
+  * @author  MCD Application Team
+  * @brief   This file contains timer server functions.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbpd_devices_conf.h"
+#include "usbpd_timersserver.h"
+
+/** @addtogroup STM32_USBPD_LIBRARY
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE
+  * @{
+  */
+
+/** @addtogroup USBPD_DEVICE_TIMESERVER
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+int8_t timer_initcounter = 0;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  Initialize a timer to manage timing in us
+  * @retval None
+  */
+void USBPD_TIM_Init(void)
+{
+  if (0 == timer_initcounter)
+  {
+    TIMX_CLK_ENABLE;
+    /***************************/
+    /* Time base configuration */
+    /***************************/
+    /* Counter mode: select up-counting mode */
+    LL_TIM_SetCounterMode(TIMX, LL_TIM_COUNTERMODE_UP);
+    
+    /* Set the pre-scaler value to have TIMx counter clock equal to 1 MHz */
+    LL_TIM_SetPrescaler(TIMX, __LL_TIM_CALC_PSC(SystemCoreClock, 1000000u));
+    
+    /* Set the auto-reload value to have a counter frequency of 100Hz */
+    LL_TIM_SetAutoReload(TIMX, __LL_TIM_CALC_ARR(SystemCoreClock, LL_TIM_GetPrescaler(TIMX), 100u));
+    
+    /*********************************/
+    /* Output waveform configuration */
+    /*********************************/
+    /* Set output compare mode: TOGGLE */
+    LL_TIM_OC_SetMode(TIMX, TIMX_CHANNEL_CH1, LL_TIM_OCMODE_TOGGLE);
+    LL_TIM_OC_SetMode(TIMX, TIMX_CHANNEL_CH2, LL_TIM_OCMODE_TOGGLE);
+    LL_TIM_OC_SetMode(TIMX, TIMX_CHANNEL_CH3, LL_TIM_OCMODE_TOGGLE);
+    LL_TIM_OC_SetMode(TIMX, TIMX_CHANNEL_CH4, LL_TIM_OCMODE_TOGGLE);
+    
+    /* Set output channel polarity: OC is active high */
+    LL_TIM_OC_SetPolarity(TIMX, TIMX_CHANNEL_CH1, LL_TIM_OCPOLARITY_HIGH);
+    LL_TIM_OC_SetPolarity(TIMX, TIMX_CHANNEL_CH2, LL_TIM_OCPOLARITY_HIGH);
+    LL_TIM_OC_SetPolarity(TIMX, TIMX_CHANNEL_CH3, LL_TIM_OCPOLARITY_HIGH);
+    LL_TIM_OC_SetPolarity(TIMX, TIMX_CHANNEL_CH4, LL_TIM_OCPOLARITY_HIGH);
+    
+    /* Enable counter */
+    LL_TIM_EnableCounter(TIMX);
+  }
+
+  /* Enable the timer counter */
+  timer_initcounter++;
+}
+
+/**
+  * @brief  UnInitialize a timer to manage timing in us
+  * @retval None
+  */
+void USBPD_TIM_DeInit(void)
+{
+  timer_initcounter--;
+  if(0 == timer_initcounter)
+  {
+    TIMX_CLK_DISABLE;
+  }
+}
+
+/**
+  * @brief  start the timer counting
+  * @param  timer id @TIM_identifier
+  * @param  time in us
+  * @retval None
+  */
+void USBPD_TIM_Start(TIM_identifier Id, uint32_t TimeUs)
+{
+  /* Positionne l'evenement pour sa detection */
+  switch (Id)
+  {
+    case TIM_PORT0_CRC:
+      TIMX_CHANNEL1_SETEVENT;
+      break;
+    case TIM_PORT0_RETRY:
+      TIMX_CHANNEL2_SETEVENT;
+      break;
+    case TIM_PORT1_CRC:
+      TIMX_CHANNEL3_SETEVENT;
+      break;
+    case TIM_PORT1_RETRY:
+      TIMX_CHANNEL4_SETEVENT;
+      break;
+    default:
+      break;
+  }
+}
+
+/**
+  * @brief  check timer expiration
+  * @param  timer id @TIM_identifier
+  * @retval None
+  */
+uint32_t USBPD_TIM_IsExpired(TIM_identifier Id)
+{
+  uint32_t _expired = 1u;
+  switch (Id)
+  {
+    case TIM_PORT0_CRC:
+      _expired = TIMX_CHANNEL1_GETFLAG(TIMX);
+      break;
+    case TIM_PORT0_RETRY:
+      _expired = TIMX_CHANNEL2_GETFLAG(TIMX);
+      break;
+    case TIM_PORT1_CRC:
+      _expired = TIMX_CHANNEL3_GETFLAG(TIMX);
+      break;
+    case TIM_PORT1_RETRY:
+      _expired = TIMX_CHANNEL4_GETFLAG(TIMX);
+      break;
+    default:
+      break;
+  }
+  return _expired;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+